begriffs open source - freertos/blob - portable/Softune/MB91460/port.c

   1 /*
   2  * FreeRTOS SMP Kernel V202110.00
   3  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of
   6  * this software and associated documentation files (the "Software"), to deal in
   7  * the Software without restriction, including without limitation the rights to
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
   9  * the Software, and to permit persons to whom the Software is furnished to do so,
  10  * subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in all
  13  * copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * https://www.FreeRTOS.org
  23  * https://github.com/FreeRTOS
  24  *
  25  * 1 tab == 4 spaces!
  26  */
  27
  28 #include "FreeRTOS.h"
  29 #include "task.h"
  30 #include "mb91467d.h"
  31
  32 /*-----------------------------------------------------------*/
  33
  34 /* We require the address of the pxCurrentTCB variable, but don't want to know
  35 any details of its type. */
  36 typedef void TCB_t;
  37 extern volatile TCB_t * volatile pxCurrentTCB;
  38
  39 /*-----------------------------------------------------------*/
  40
  41 #pragma asm
  42 #macro  SaveContext
  43          ORCCR #0x20                                                            ;Switch to user stack
  44          ST RP,@-R15                                                            ;Store RP
  45          STM0 (R7,R6,R5,R4,R3,R2,R1,R0)                         ;Store R7-R0
  46          STM1 (R14,R13,R12,R11,R10,R9,R8)                       ;Store R14-R8
  47          ST MDH, @-R15                                                          ;Store MDH
  48          ST MDL, @-R15                                                          ;Store MDL
  49
  50          ANDCCR #0xDF                                                           ;Switch back to system stack
  51          LD @R15+,R0                                                            ;Store PC to R0
  52          ORCCR #0x20                                                            ;Switch to user stack
  53          ST R0,@-R15                                                            ;Store PC to User stack
  54
  55          ANDCCR #0xDF                                                           ;Switch back to system stack
  56          LD @R15+,R0                                                            ;Store PS to R0
  57          ORCCR #0x20                                                            ;Switch to user stack
  58          ST R0,@-R15                                                            ;Store PS to User stack
  59
  60          LDI #_pxCurrentTCB, R0                                         ;Get pxCurrentTCB address
  61          LD @R0, R0                                                                     ;Get the pxCurrentTCB->pxTopOfStack address
  62          ST R15,@R0                                                                     ;Store USP to pxCurrentTCB->pxTopOfStack
  63
  64          ANDCCR #0xDF                                                           ;Switch back to system stack for the rest of tick ISR
  65 #endm
  66
  67 #macro RestoreContext
  68          LDI #_pxCurrentTCB, R0                                         ;Get pxCurrentTCB address
  69          LD @R0, R0                                                                     ;Get the pxCurrentTCB->pxTopOfStack address
  70          ORCCR #0x20                                                            ;Switch to user stack
  71          LD @R0, R15                                                            ;Restore USP from pxCurrentTCB->pxTopOfStack
  72
  73          LD @R15+,R0                                                            ;Store PS to R0
  74          ANDCCR #0xDF                                                           ;Switch to system stack
  75          ST R0,@-R15                                                            ;Store PS to system stack
  76
  77          ORCCR #0x20                                                            ;Switch to user stack
  78          LD @R15+,R0                                                            ;Store PC to R0
  79          ANDCCR #0xDF                                                           ;Switch to system stack
  80          ST R0,@-R15                                                            ;Store PC to system stack
  81
  82          ORCCR #0x20                                                            ;Switch back to retrieve the remaining context
  83
  84          LD @R15+, MDL                                                          ;Restore MDL
  85          LD @R15+, MDH                                                          ;Restore MDH
  86          LDM1 (R14,R13,R12,R11,R10,R9,R8)                       ;Restore R14-R8
  87          LDM0 (R7,R6,R5,R4,R3,R2,R1,R0)                         ;Restore R7-R0
  88          LD @R15+, RP                                                           ;Restore RP
  89
  90          ANDCCR #0xDF                                                           ;Switch back to system stack for the rest of tick ISR
  91 #endm
  92 #pragma endasm
  93
  94 /*-----------------------------------------------------------*/
  95
  96 /*
  97  * Perform hardware setup to enable ticks from timer 1,
  98  */
  99 static void prvSetupTimerInterrupt( void );
 100 /*-----------------------------------------------------------*/
 101
 102 /*
 103  * Initialise the stack of a task to look exactly as if a call to
 104  * portSAVE_CONTEXT had been called.
 105  *
 106  * See the header file portable.h.
 107  */
 108 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
 109 {
 110         /* Place a few bytes of known values on the bottom of the stack.
 111         This is just useful for debugging. */
 112
 113         *pxTopOfStack = 0x11111111;
 114         pxTopOfStack--;
 115         *pxTopOfStack = 0x22222222;
 116         pxTopOfStack--;
 117         *pxTopOfStack = 0x33333333;
 118         pxTopOfStack--;
 119
 120         /* This is a redundant push to the stack, it may be required if
 121         in some implementations of the compiler the parameter to the task
 122         is passed on to the stack rather than in R4 register. */
 123         *pxTopOfStack = (StackType_t)(pvParameters);
 124         pxTopOfStack--;
 125
 126         *pxTopOfStack = ( StackType_t ) 0x00000000;     /* RP */
 127         pxTopOfStack--;
 128         *pxTopOfStack = ( StackType_t ) 0x00007777;     /* R7 */
 129         pxTopOfStack--;
 130         *pxTopOfStack = ( StackType_t ) 0x00006666;     /* R6 */
 131         pxTopOfStack--;
 132         *pxTopOfStack = ( StackType_t ) 0x00005555;     /* R5 */
 133         pxTopOfStack--;
 134
 135         /* In the current implementation of the compiler the first
 136         parameter to the task (or function) is passed via R4 parameter
 137         to the task, hence the pvParameters pointer is copied into the R4
 138         register. See compiler manual section 4.6.2 for more information. */
 139         *pxTopOfStack = ( StackType_t ) (pvParameters); /* R4 */
 140         pxTopOfStack--;
 141         *pxTopOfStack = ( StackType_t ) 0x00003333;     /* R3 */
 142         pxTopOfStack--;
 143         *pxTopOfStack = ( StackType_t ) 0x00002222;     /* R2 */
 144         pxTopOfStack--;
 145         *pxTopOfStack = ( StackType_t ) 0x00001111;     /* R1 */
 146         pxTopOfStack--;
 147         *pxTopOfStack = ( StackType_t ) 0x00000001;     /* R0 */
 148         pxTopOfStack--;
 149         *pxTopOfStack = ( StackType_t ) 0x0000EEEE;     /* R14 */
 150         pxTopOfStack--;
 151         *pxTopOfStack = ( StackType_t ) 0x0000DDDD;     /* R13 */
 152         pxTopOfStack--;
 153         *pxTopOfStack = ( StackType_t ) 0x0000CCCC;     /* R12 */
 154         pxTopOfStack--;
 155         *pxTopOfStack = ( StackType_t ) 0x0000BBBB;     /* R11 */
 156         pxTopOfStack--;
 157         *pxTopOfStack = ( StackType_t ) 0x0000AAAA;     /* R10 */
 158         pxTopOfStack--;
 159         *pxTopOfStack = ( StackType_t ) 0x00009999;     /* R9 */
 160         pxTopOfStack--;
 161         *pxTopOfStack = ( StackType_t ) 0x00008888;     /* R8 */
 162         pxTopOfStack--;
 163         *pxTopOfStack = ( StackType_t ) 0x11110000;     /* MDH */
 164         pxTopOfStack--;
 165         *pxTopOfStack = ( StackType_t ) 0x22220000;     /* MDL */
 166         pxTopOfStack--;
 167
 168         /* The start of the task code. */
 169         *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
 170         pxTopOfStack--;
 171
 172     /* PS - User Mode, USP, ILM=31, Interrupts enabled */
 173         *pxTopOfStack = ( StackType_t ) 0x001F0030;     /* PS */
 174
 175         return pxTopOfStack;
 176 }
 177 /*-----------------------------------------------------------*/
 178
 179 BaseType_t xPortStartScheduler( void )
 180 {
 181         /* Setup the hardware to generate the tick. */
 182         prvSetupTimerInterrupt();
 183
 184         /* Restore the context of the first task that is going to run. */
 185         #pragma asm
 186                 RestoreContext
 187         #pragma endasm
 188
 189         /* Simulate a function call end as generated by the compiler.  We will now
 190         jump to the start of the task the context of which we have just restored. */
 191         __asm(" reti ");
 192
 193         /* Should not get here. */
 194         return pdFAIL;
 195 }
 196 /*-----------------------------------------------------------*/
 197
 198 void vPortEndScheduler( void )
 199 {
 200         /* Not implemented - unlikely to ever be required as there is nothing to
 201         return to. */
 202 }
 203 /*-----------------------------------------------------------*/
 204
 205 static void prvSetupTimerInterrupt( void )
 206 {
 207 /* The peripheral clock divided by 32 is used by the timer. */
 208 const uint16_t usReloadValue = ( uint16_t ) ( ( ( configPER_CLOCK_HZ / configTICK_RATE_HZ ) / 32UL ) - 1UL );
 209
 210         /* Setup RLT0 to generate a tick interrupt. */
 211
 212         TMCSR0_CNTE = 0;                /* Count Disable */
 213     TMCSR0_CSL = 0x2;           /* CLKP/32 */
 214     TMCSR0_MOD = 0;                     /* Software trigger */
 215     TMCSR0_RELD = 1;            /* Reload */
 216
 217     TMCSR0_UF = 0;                      /* Clear underflow flag */
 218         TMRLR0 = usReloadValue;
 219         TMCSR0_INTE = 1;                /* Interrupt Enable */
 220         TMCSR0_CNTE = 1;                /* Count Enable */
 221         TMCSR0_TRG = 1;                 /* Trigger */
 222
 223     PORTEN = 0x3;                       /* Port Enable */
 224 }
 225 /*-----------------------------------------------------------*/
 226
 227 #if configUSE_PREEMPTION == 1
 228
 229         /*
 230          * Tick ISR for preemptive scheduler. The tick count is incremented
 231          * after the context is saved. Then the context is switched if required,
 232          * and last the context of the task which is to be resumed is restored.
 233          */
 234
 235         #pragma asm
 236
 237         .global _ReloadTimer0_IRQHandler
 238         _ReloadTimer0_IRQHandler:
 239
 240         ANDCCR #0xEF                                                    ;Disable Interrupts
 241         SaveContext                                                             ;Save context
 242         ORCCR #0x10                                                             ;Re-enable Interrupts
 243
 244         LDI #0xFFFB,R1
 245         LDI #_tmcsr0, R0
 246         AND R1,@R0                                                              ;Clear RLT0 interrupt flag
 247
 248         CALL32   _xTaskIncrementTick,R12                ;Increment Tick
 249         CALL32   _vTaskSwitchContext,R12                ;Switch context if required
 250
 251         ANDCCR #0xEF                                                    ;Disable Interrupts
 252         RestoreContext                                                  ;Restore context
 253         ORCCR #0x10                                                             ;Re-enable Interrupts
 254
 255         RETI
 256
 257         #pragma endasm
 258
 259 #else
 260
 261         /*
 262          * Tick ISR for the cooperative scheduler.  All this does is increment the
 263          * tick count.  We don't need to switch context, this can only be done by
 264          * manual calls to taskYIELD();
 265          */
 266         __interrupt void ReloadTimer0_IRQHandler( void )
 267         {
 268                 /* Clear RLT0 interrupt flag */
 269                 TMCSR0_UF = 0;
 270                 xTaskIncrementTick();
 271         }
 272
 273 #endif
 274
 275 /*
 276  * Manual context switch. We can use a __nosavereg attribute  as the context
 277  * would be saved by PortSAVE_CONTEXT().  The context is switched and then
 278  * the context of the new task is restored saved.
 279  */
 280 #pragma asm
 281
 282         .global _vPortYieldDelayed
 283         _vPortYieldDelayed:
 284
 285         ANDCCR #0xEF                                                    ;Disable Interrupts
 286         SaveContext                                                             ;Save context
 287         ORCCR #0x10                                                             ;Re-enable Interrupts
 288
 289         LDI #_dicr, R0
 290         BANDL #0x0E, @R0                                                ;Clear Delayed interrupt flag
 291
 292         CALL32   _vTaskSwitchContext,R12                ;Switch context if required
 293
 294         ANDCCR #0xEF                                                    ;Disable Interrupts
 295         RestoreContext                                                  ;Restore context
 296         ORCCR #0x10                                                             ;Re-enable Interrupts
 297
 298         RETI
 299
 300 #pragma endasm
 301 /*-----------------------------------------------------------*/
 302
 303 /*
 304  * Manual context switch. We can use a __nosavereg attribute  as the context
 305  * would be saved by PortSAVE_CONTEXT().  The context is switched and then
 306  * the context of the new task is restored saved.
 307  */
 308 #pragma asm
 309
 310         .global _vPortYield
 311         _vPortYield:
 312
 313         SaveContext                                                             ;Save context
 314         CALL32   _vTaskSwitchContext,R12                ;Switch context if required
 315         RestoreContext                                                  ;Restore context
 316
 317         RETI
 318
 319 #pragma endasm
 320 /*-----------------------------------------------------------*/
 321