begriffs open source - freertos/blob - portable/GCC/AVR_Mega0/porthardware.h

   1 /*
   2  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
   3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
   4  *
   5  * SPDX-License-Identifier: MIT
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
   8  * this software and associated documentation files (the "Software"), to deal in
   9  * the Software without restriction, including without limitation the rights to
  10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11  * the Software, and to permit persons to whom the Software is furnished to do so,
  12  * subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in all
  15  * copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * https://www.FreeRTOS.org
  25  * https://github.com/FreeRTOS
  26  *
  27  */
  28
  29 #ifndef PORTHARDWARE_H
  30 #define PORTHARDWARE_H
  31
  32 #include "FreeRTOSConfig.h"
  33
  34 /*-----------------------------------------------------------*/
  35
  36 #define CLR_INT( FLAG_REG, FLAG_MASK )                                         \
  37     asm volatile (                                                             \
  38         "push r16\n\t"                                                         \
  39         "ldi r16, %1\n\t"                                                      \
  40         "sts %0, r16\n\t"                                                      \
  41         "pop r16\n\t"                                                          \
  42         :                                                                      \
  43         : "i" ( _SFR_MEM_ADDR( FLAG_REG ) ), "i" ( ( uint8_t ) ( FLAG_MASK ) ) \
  44         );
  45
  46 #if ( configUSE_TIMER_INSTANCE == 0 )
  47
  48     #define TICK_INT_vect    TCB0_INT_vect
  49     #define INT_FLAGS        TCB0_INTFLAGS
  50     #define INT_MASK         TCB_CAPT_bm
  51
  52     #define TICK_init()                                      \
  53     {                                                        \
  54         TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
  55         TCB0.INTCTRL = TCB_CAPT_bm;                          \
  56         TCB0.CTRLA = TCB_ENABLE_bm;                          \
  57     }
  58
  59 #elif ( configUSE_TIMER_INSTANCE == 1 )
  60
  61     #define TICK_INT_vect    TCB1_INT_vect
  62     #define INT_FLAGS        TCB1_INTFLAGS
  63     #define INT_MASK         TCB_CAPT_bm
  64
  65     #define TICK_init()                                      \
  66     {                                                        \
  67         TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
  68         TCB1.INTCTRL = TCB_CAPT_bm;                          \
  69         TCB1.CTRLA = TCB_ENABLE_bm;                          \
  70     }
  71
  72 #elif ( configUSE_TIMER_INSTANCE == 2 )
  73
  74     #define TICK_INT_vect    TCB2_INT_vect
  75     #define INT_FLAGS        TCB2_INTFLAGS
  76     #define INT_MASK         TCB_CAPT_bm
  77
  78     #define TICK_init()                                      \
  79     {                                                        \
  80         TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
  81         TCB2.INTCTRL = TCB_CAPT_bm;                          \
  82         TCB2.CTRLA = TCB_ENABLE_bm;                          \
  83     }
  84
  85 #elif ( configUSE_TIMER_INSTANCE == 3 )
  86
  87     #define TICK_INT_vect    TCB3_INT_vect
  88     #define INT_FLAGS        TCB3_INTFLAGS
  89     #define INT_MASK         TCB_CAPT_bm
  90
  91     #define TICK_init()                                      \
  92     {                                                        \
  93         TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
  94         TCB3.INTCTRL = TCB_CAPT_bm;                          \
  95         TCB3.CTRLA = TCB_ENABLE_bm;                          \
  96     }
  97
  98 #elif ( configUSE_TIMER_INSTANCE == 4 )
  99
 100     #define TICK_INT_vect    RTC_CNT_vect
 101     #define INT_FLAGS        RTC_INTFLAGS
 102     #define INT_MASK         RTC_OVF_bm
 103
 104 /* Hertz to period for RTC setup */
 105     #define RTC_PERIOD_HZ( x )    ( 32768 * ( ( 1.0 / x ) ) )
 106     #define TICK_init()                                        \
 107     {                                                          \
 108         while( RTC.STATUS > 0 ) {; }                           \
 109         RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
 110         RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ );         \
 111         RTC.INTCTRL |= 1 << RTC_OVF_bp;                        \
 112     }
 113
 114 #else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
 115     #undef TICK_INT_vect
 116     #undef INT_FLAGS
 117     #undef INT_MASK
 118     #undef TICK_init()
 119     #error Invalid timer setting.
 120 #endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
 121
 122 /*-----------------------------------------------------------*/
 123
 124 #endif /* PORTHARDWARE_H */