2 * FreeRTOS Kernel <DEVELOPMENT BRANCH>
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3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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8 * this software and associated documentation files (the "Software"), to deal in
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9 * the Software without restriction, including without limitation the rights to
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10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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11 * the Software, and to permit persons to whom the Software is furnished to do so,
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12 * subject to the following conditions:
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14 * The above copyright notice and this permission notice shall be included in all
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15 * copies or substantial portions of the Software.
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17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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24 * https://www.FreeRTOS.org
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25 * https://github.com/FreeRTOS
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29 /* Secure context includes. */
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30 #include "secure_context.h"
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32 /* Secure port macros. */
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33 #include "secure_port_macros.h"
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35 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
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37 /* xSecureContextHandle value is in r0. */
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40 " .syntax unified \n"
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42 " mrs r1, ipsr \n"/* r1 = IPSR. */
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43 " cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
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44 " ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
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45 #if ( configENABLE_MPU == 1 )
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46 " ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
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47 " msr control, r3 \n"/* CONTROL = r3. */
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48 #endif /* configENABLE_MPU */
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49 " msr psplim, r2 \n"/* PSPLIM = r2. */
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50 " msr psp, r1 \n"/* PSP = r1. */
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52 " load_ctx_therad_mode: \n"
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55 ::: "r0", "r1", "r2"
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58 /*-----------------------------------------------------------*/
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60 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
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62 /* xSecureContextHandle value is in r0. */
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65 " .syntax unified \n"
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67 " mrs r1, ipsr \n"/* r1 = IPSR. */
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68 " cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
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69 " mrs r1, psp \n"/* r1 = PSP. */
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70 #if ( configENABLE_FPU == 1 )
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71 " vstmdb r1!, {s0} \n"/* Trigger the defferred stacking of FPU registers. */
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72 " vldmia r1!, {s0} \n"/* Nullify the effect of the pervious statement. */
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73 #endif /* configENABLE_FPU */
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74 #if ( configENABLE_MPU == 1 )
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75 " mrs r2, control \n"/* r2 = CONTROL. */
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76 " stmdb r1!, {r2} \n"/* Store CONTROL value on the stack. */
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77 #endif /* configENABLE_MPU */
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78 " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
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79 " movs r1, %0 \n"/* r1 = securecontextNO_STACK. */
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80 " msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */
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81 " msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
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83 " save_ctx_therad_mode: \n"
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86 ::"i" ( securecontextNO_STACK ) : "r1", "memory"
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89 /*-----------------------------------------------------------*/
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