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[freertos] / portable / GCC / ARM_CM33 / secure / secure_context_port.c
1 /*\r
2  * FreeRTOS Kernel <DEVELOPMENT BRANCH>\r
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
4  *\r
5  * SPDX-License-Identifier: MIT
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
8  * this software and associated documentation files (the "Software"), to deal in\r
9  * the Software without restriction, including without limitation the rights to\r
10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
11  * the Software, and to permit persons to whom the Software is furnished to do so,\r
12  * subject to the following conditions:\r
13  *\r
14  * The above copyright notice and this permission notice shall be included in all\r
15  * copies or substantial portions of the Software.\r
16  *\r
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
23  *\r
24  * https://www.FreeRTOS.org\r
25  * https://github.com/FreeRTOS\r
26  *\r
27  */\r
28 \r
29 /* Secure context includes. */\r
30 #include "secure_context.h"\r
31 \r
32 /* Secure port macros. */\r
33 #include "secure_port_macros.h"\r
34 \r
35 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )\r
36 {\r
37     /* xSecureContextHandle value is in r0. */\r
38     __asm volatile\r
39     (\r
40         "       .syntax unified                                                 \n"\r
41         "                                                                                       \n"\r
42         "       mrs r1, ipsr                                                    \n"/* r1 = IPSR. */\r
43         "       cbz r1, load_ctx_therad_mode                    \n"/* Do nothing if the processor is running in the Thread Mode. */\r
44         "       ldmia r0!, {r1, r2}                                             \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */\r
45         #if ( configENABLE_MPU == 1 )\r
46             "   ldmia r1!, {r3}                                                 \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */\r
47             "   msr control, r3                                                 \n"/* CONTROL = r3. */\r
48         #endif /* configENABLE_MPU */\r
49         "       msr psplim, r2                                                  \n"/* PSPLIM = r2. */\r
50         "       msr psp, r1                                                             \n"/* PSP = r1. */\r
51         "                                                                                       \n"\r
52         " load_ctx_therad_mode:                                         \n"\r
53         "       nop                                                                             \n"\r
54         "                                                                                       \n"\r
55         ::: "r0", "r1", "r2"\r
56     );\r
57 }\r
58 /*-----------------------------------------------------------*/\r
59 \r
60 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )\r
61 {\r
62     /* xSecureContextHandle value is in r0. */\r
63     __asm volatile\r
64     (\r
65         "       .syntax unified                                                 \n"\r
66         "                                                                                       \n"\r
67         "       mrs r1, ipsr                                                    \n"/* r1 = IPSR. */\r
68         "       cbz r1, save_ctx_therad_mode                    \n"/* Do nothing if the processor is running in the Thread Mode. */\r
69         "       mrs r1, psp                                                             \n"/* r1 = PSP. */\r
70         #if ( configENABLE_FPU == 1 )\r
71             "   vstmdb r1!, {s0}                                                \n"/* Trigger the defferred stacking of FPU registers. */\r
72             "   vldmia r1!, {s0}                                                \n"/* Nullify the effect of the pervious statement. */\r
73         #endif /* configENABLE_FPU */\r
74         #if ( configENABLE_MPU == 1 )\r
75             "   mrs r2, control                                                 \n"/* r2 = CONTROL. */\r
76             "   stmdb r1!, {r2}                                                 \n"/* Store CONTROL value on the stack. */\r
77         #endif /* configENABLE_MPU */\r
78         "       str r1, [r0]                                                    \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */\r
79         "       movs r1, %0                                                             \n"/* r1 = securecontextNO_STACK. */\r
80         "       msr psplim, r1                                                  \n"/* PSPLIM = securecontextNO_STACK. */\r
81         "       msr psp, r1                                                             \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */\r
82         "                                                                                       \n"\r
83         " save_ctx_therad_mode:                                         \n"\r
84         "       nop                                                                             \n"\r
85         "                                                                                       \n"\r
86         ::"i" ( securecontextNO_STACK ) : "r1", "memory"\r
87     );\r
88 }\r
89 /*-----------------------------------------------------------*/\r