2 * FreeRTOS Kernel <DEVELOPMENT BRANCH>
\r
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
\r
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
\r
8 * this software and associated documentation files (the "Software"), to deal in
\r
9 * the Software without restriction, including without limitation the rights to
\r
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
\r
11 * the Software, and to permit persons to whom the Software is furnished to do so,
\r
12 * subject to the following conditions:
\r
14 * The above copyright notice and this permission notice shall be included in all
\r
15 * copies or substantial portions of the Software.
\r
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
\r
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
\r
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
\r
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
\r
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
\r
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
\r
24 * https://www.FreeRTOS.org
\r
25 * https://github.com/FreeRTOS
\r
37 /*-----------------------------------------------------------
\r
38 * Port specific definitions.
\r
40 * The settings in this file configure FreeRTOS correctly for the
\r
41 * given hardware and compiler.
\r
43 * These settings should not be altered.
\r
44 *-----------------------------------------------------------
\r
47 /* Type definitions. */
\r
48 #define portCHAR char
\r
49 #define portFLOAT float
\r
50 #define portDOUBLE double
\r
51 #define portLONG long
\r
52 #define portSHORT short
\r
53 #define portSTACK_TYPE uint8_t
\r
54 #define portBASE_TYPE char
\r
56 typedef portSTACK_TYPE StackType_t;
\r
57 typedef signed char BaseType_t;
\r
58 typedef unsigned char UBaseType_t;
\r
61 #if( configUSE_16_BIT_TICKS == 1 )
\r
62 typedef uint16_t TickType_t;
\r
63 #define portMAX_DELAY ( TickType_t ) 0xffff
\r
65 typedef uint32_t TickType_t;
\r
66 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
\r
68 /*-----------------------------------------------------------*/
\r
70 /* Hardware specifics. */
\r
71 #define portBYTE_ALIGNMENT 1
\r
72 #define portSTACK_GROWTH ( -1 )
\r
73 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
\r
74 #define portYIELD() __asm( "swi" );
\r
75 /*-----------------------------------------------------------*/
\r
77 /* Critical section handling. */
\r
78 #define portENABLE_INTERRUPTS() __asm( "cli" )
\r
79 #define portDISABLE_INTERRUPTS() __asm( "sei" )
\r
82 * Disable interrupts before incrementing the count of critical section nesting.
\r
83 * The nesting count is maintained so we know when interrupts should be
\r
84 * re-enabled. Once interrupts are disabled the nesting count can be accessed
\r
85 * directly. Each task maintains its own nesting count.
\r
87 #define portENTER_CRITICAL() \
\r
89 extern volatile UBaseType_t uxCriticalNesting; \
\r
91 portDISABLE_INTERRUPTS(); \
\r
92 uxCriticalNesting++; \
\r
96 * Interrupts are disabled so we can access the nesting count directly. If the
\r
97 * nesting is found to be 0 (no nesting) then we are leaving the critical
\r
98 * section and interrupts can be re-enabled.
\r
100 #define portEXIT_CRITICAL() \
\r
102 extern volatile UBaseType_t uxCriticalNesting; \
\r
104 uxCriticalNesting--; \
\r
105 if( uxCriticalNesting == 0 ) \
\r
107 portENABLE_INTERRUPTS(); \
\r
110 /*-----------------------------------------------------------*/
\r
112 /* Task utilities. */
\r
115 * These macros are very simple as the processor automatically saves and
\r
116 * restores its registers as interrupts are entered and exited. In
\r
117 * addition to the (automatically stacked) registers we also stack the
\r
118 * critical nesting count. Each task maintains its own critical nesting
\r
119 * count as it is legitimate for a task to yield from within a critical
\r
120 * section. If the banked memory model is being used then the PPAGE
\r
121 * register is also stored as part of the tasks context.
\r
124 #ifdef BANKED_MODEL
\r
126 * Load the stack pointer for the task, then pull the critical nesting
\r
127 * count and PPAGE register from the stack. The remains of the
\r
128 * context are restored by the RTI instruction.
\r
130 #define portRESTORE_CONTEXT() \
\r
133 .globl pxCurrentTCB ; void * \n\
\r
134 .globl uxCriticalNesting ; char \n\
\r
136 ldx pxCurrentTCB \n\
\r
137 lds 0,x ; Stack \n\
\r
139 movb 1,sp+,uxCriticalNesting \n\
\r
140 movb 1,sp+,0x30 ; PPAGE \n\
\r
145 * By the time this macro is called the processor has already stacked the
\r
146 * registers. Simply stack the nesting count and PPAGE value, then save
\r
147 * the task stack pointer.
\r
149 #define portSAVE_CONTEXT() \
\r
152 .globl pxCurrentTCB ; void * \n\
\r
153 .globl uxCriticalNesting ; char \n\
\r
155 movb 0x30, 1,-sp ; PPAGE \n\
\r
156 movb uxCriticalNesting, 1,-sp \n\
\r
158 ldx pxCurrentTCB \n\
\r
159 sts 0,x ; Stack \n\
\r
165 * These macros are as per the BANKED versions above, but without saving
\r
166 * and restoring the PPAGE register.
\r
169 #define portRESTORE_CONTEXT() \
\r
172 .globl pxCurrentTCB ; void * \n\
\r
173 .globl uxCriticalNesting ; char \n\
\r
175 ldx pxCurrentTCB \n\
\r
176 lds 0,x ; Stack \n\
\r
178 movb 1,sp+,uxCriticalNesting \n\
\r
182 #define portSAVE_CONTEXT() \
\r
185 .globl pxCurrentTCB ; void * \n\
\r
186 .globl uxCriticalNesting ; char \n\
\r
188 movb uxCriticalNesting, 1,-sp \n\
\r
190 ldx pxCurrentTCB \n\
\r
191 sts 0,x ; Stack \n\
\r
197 * Utility macros to save/restore correct software registers for GCC. This is
\r
198 * useful when GCC does not generate appropriate ISR head/tail code.
\r
200 #define portISR_HEAD() \
\r
203 movw _.frame, 2,-sp \n\
\r
204 movw _.tmp, 2,-sp \n\
\r
205 movw _.z, 2,-sp \n\
\r
206 movw _.xy, 2,-sp \n\
\r
207 ;movw _.d2, 2,-sp \n\
\r
208 ;movw _.d1, 2,-sp \n\
\r
212 #define portISR_TAIL() \
\r
215 movw 2,sp+, _.xy \n\
\r
216 movw 2,sp+, _.z \n\
\r
217 movw 2,sp+, _.tmp \n\
\r
218 movw 2,sp+, _.frame \n\
\r
219 ;movw 2,sp+, _.d1 \n\
\r
220 ;movw 2,sp+, _.d2 \n\
\r
226 * Utility macro to call macros above in correct order in order to perform a
\r
227 * task switch from within a standard ISR. This macro can only be used if
\r
228 * the ISR does not use any local (stack) variables. If the ISR uses stack
\r
229 * variables portYIELD() should be used in it's place.
\r
232 #define portTASK_SWITCH_FROM_ISR() \
\r
233 portSAVE_CONTEXT(); \
\r
234 vTaskSwitchContext(); \
\r
235 portRESTORE_CONTEXT();
\r
238 /* Task function macros as described on the FreeRTOS.org WEB site. */
\r
239 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
\r
240 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
\r
246 #endif /* PORTMACRO_H */
\r