begriffs open source - freertos/blob - portable/Softune/MB91460/port.c

   1 /*\r
   2  * FreeRTOS Kernel <DEVELOPMENT BRANCH>\r
   3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4  *\r
   5  * SPDX-License-Identifier: MIT
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   8  * this software and associated documentation files (the "Software"), to deal in\r
   9  * the Software without restriction, including without limitation the rights to\r
  10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
  11  * the Software, and to permit persons to whom the Software is furnished to do so,\r
  12  * subject to the following conditions:\r
  13  *\r
  14  * The above copyright notice and this permission notice shall be included in all\r
  15  * copies or substantial portions of the Software.\r
  16  *\r
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  23  *\r
  24  * https://www.FreeRTOS.org\r
  25  * https://github.com/FreeRTOS\r
  26  *\r
  27  */\r
  28 \r
  29 #include "FreeRTOS.h"\r
  30 #include "task.h"\r
  31 #include "mb91467d.h"\r
  32 \r
  33 /*-----------------------------------------------------------*/\r
  34 \r
  35 /* We require the address of the pxCurrentTCB variable, but don't want to know\r
  36 any details of its type. */\r
  37 typedef void TCB_t;\r
  38 extern volatile TCB_t * volatile pxCurrentTCB;\r
  39 \r
  40 /*-----------------------------------------------------------*/\r
  41  \r
  42 #pragma asm\r
  43 #macro  SaveContext\r
  44          ORCCR #0x20                                                            ;Switch to user stack\r
  45          ST RP,@-R15                                                            ;Store RP\r
  46          STM0 (R7,R6,R5,R4,R3,R2,R1,R0)                         ;Store R7-R0\r
  47          STM1 (R14,R13,R12,R11,R10,R9,R8)                       ;Store R14-R8\r
  48          ST MDH, @-R15                                                          ;Store MDH\r
  49          ST MDL, @-R15                                                          ;Store MDL\r
  50          \r
  51          ANDCCR #0xDF                                                           ;Switch back to system stack\r
  52          LD @R15+,R0                                                            ;Store PC to R0 \r
  53          ORCCR #0x20                                                            ;Switch to user stack\r
  54          ST R0,@-R15                                                            ;Store PC to User stack\r
  55          \r
  56          ANDCCR #0xDF                                                           ;Switch back to system stack\r
  57          LD @R15+,R0                                                            ;Store PS to R0\r
  58          ORCCR #0x20                                                            ;Switch to user stack\r
  59          ST R0,@-R15                                                            ;Store PS to User stack\r
  60          \r
  61          LDI #_pxCurrentTCB, R0                                         ;Get pxCurrentTCB address\r
  62          LD @R0, R0                                                                     ;Get the pxCurrentTCB->pxTopOfStack address\r
  63          ST R15,@R0                                                                     ;Store USP to pxCurrentTCB->pxTopOfStack\r
  64          \r
  65          ANDCCR #0xDF                                                           ;Switch back to system stack for the rest of tick ISR\r
  66 #endm\r
  67 \r
  68 #macro RestoreContext\r
  69          LDI #_pxCurrentTCB, R0                                         ;Get pxCurrentTCB address\r
  70          LD @R0, R0                                                                     ;Get the pxCurrentTCB->pxTopOfStack address\r
  71          ORCCR #0x20                                                            ;Switch to user stack\r
  72          LD @R0, R15                                                            ;Restore USP from pxCurrentTCB->pxTopOfStack\r
  73 \r
  74          LD @R15+,R0                                                            ;Store PS to R0\r
  75          ANDCCR #0xDF                                                           ;Switch to system stack\r
  76          ST R0,@-R15                                                            ;Store PS to system stack\r
  77 \r
  78          ORCCR #0x20                                                            ;Switch to user stack\r
  79          LD @R15+,R0                                                            ;Store PC to R0\r
  80          ANDCCR #0xDF                                                           ;Switch to system stack\r
  81          ST R0,@-R15                                                            ;Store PC to system stack\r
  82 \r
  83          ORCCR #0x20                                                            ;Switch back to retrieve the remaining context\r
  84 \r
  85          LD @R15+, MDL                                                          ;Restore MDL\r
  86          LD @R15+, MDH                                                          ;Restore MDH\r
  87          LDM1 (R14,R13,R12,R11,R10,R9,R8)                       ;Restore R14-R8\r
  88          LDM0 (R7,R6,R5,R4,R3,R2,R1,R0)                         ;Restore R7-R0\r
  89          LD @R15+, RP                                                           ;Restore RP\r
  90          \r
  91          ANDCCR #0xDF                                                           ;Switch back to system stack for the rest of tick ISR\r
  92 #endm\r
  93 #pragma endasm\r
  94 \r
  95 /*-----------------------------------------------------------*/\r
  96 \r
  97 /*\r
  98  * Perform hardware setup to enable ticks from timer 1,\r
  99  */\r
 100 static void prvSetupTimerInterrupt( void );\r
 101 /*-----------------------------------------------------------*/\r
 102 \r
 103 /* \r
 104  * Initialise the stack of a task to look exactly as if a call to \r
 105  * portSAVE_CONTEXT had been called.\r
 106  * \r
 107  * See the header file portable.h.\r
 108  */\r
 109 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
 110 {\r
 111         /* Place a few bytes of known values on the bottom of the stack. \r
 112         This is just useful for debugging. */\r
 113 \r
 114         *pxTopOfStack = 0x11111111;\r
 115         pxTopOfStack--;\r
 116         *pxTopOfStack = 0x22222222;\r
 117         pxTopOfStack--;\r
 118         *pxTopOfStack = 0x33333333;\r
 119         pxTopOfStack--;\r
 120 \r
 121         /* This is a redundant push to the stack, it may be required if \r
 122         in some implementations of the compiler the parameter to the task \r
 123         is passed on to the stack rather than in R4 register. */\r
 124         *pxTopOfStack = (StackType_t)(pvParameters);\r
 125         pxTopOfStack--;                  \r
 126     \r
 127         *pxTopOfStack = ( StackType_t ) 0x00000000;     /* RP */\r
 128         pxTopOfStack--;\r
 129         *pxTopOfStack = ( StackType_t ) 0x00007777;     /* R7 */\r
 130         pxTopOfStack--;\r
 131         *pxTopOfStack = ( StackType_t ) 0x00006666;     /* R6 */\r
 132         pxTopOfStack--;\r
 133         *pxTopOfStack = ( StackType_t ) 0x00005555;     /* R5 */\r
 134         pxTopOfStack--;\r
 135         \r
 136         /* In the current implementation of the compiler the first \r
 137         parameter to the task (or function) is passed via R4 parameter \r
 138         to the task, hence the pvParameters pointer is copied into the R4 \r
 139         register. See compiler manual section 4.6.2 for more information. */\r
 140         *pxTopOfStack = ( StackType_t ) (pvParameters); /* R4 */\r
 141         pxTopOfStack--;\r
 142         *pxTopOfStack = ( StackType_t ) 0x00003333;     /* R3 */\r
 143         pxTopOfStack--;\r
 144         *pxTopOfStack = ( StackType_t ) 0x00002222;     /* R2 */\r
 145         pxTopOfStack--;\r
 146         *pxTopOfStack = ( StackType_t ) 0x00001111;     /* R1 */\r
 147         pxTopOfStack--;\r
 148         *pxTopOfStack = ( StackType_t ) 0x00000001;     /* R0 */\r
 149         pxTopOfStack--; \r
 150         *pxTopOfStack = ( StackType_t ) 0x0000EEEE;     /* R14 */\r
 151         pxTopOfStack--;\r
 152         *pxTopOfStack = ( StackType_t ) 0x0000DDDD;     /* R13 */\r
 153         pxTopOfStack--;\r
 154         *pxTopOfStack = ( StackType_t ) 0x0000CCCC;     /* R12 */\r
 155         pxTopOfStack--;\r
 156         *pxTopOfStack = ( StackType_t ) 0x0000BBBB;     /* R11 */\r
 157         pxTopOfStack--;\r
 158         *pxTopOfStack = ( StackType_t ) 0x0000AAAA;     /* R10 */\r
 159         pxTopOfStack--;\r
 160         *pxTopOfStack = ( StackType_t ) 0x00009999;     /* R9 */\r
 161         pxTopOfStack--;\r
 162         *pxTopOfStack = ( StackType_t ) 0x00008888;     /* R8 */\r
 163         pxTopOfStack--; \r
 164         *pxTopOfStack = ( StackType_t ) 0x11110000;     /* MDH */\r
 165         pxTopOfStack--;\r
 166         *pxTopOfStack = ( StackType_t ) 0x22220000;     /* MDL */\r
 167         pxTopOfStack--;\r
 168 \r
 169         /* The start of the task code. */\r
 170         *pxTopOfStack = ( StackType_t ) pxCode; /* PC */\r
 171         pxTopOfStack--;\r
 172          \r
 173     /* PS - User Mode, USP, ILM=31, Interrupts enabled */\r
 174         *pxTopOfStack = ( StackType_t ) 0x001F0030;     /* PS */\r
 175 \r
 176         return pxTopOfStack;\r
 177 }\r
 178 /*-----------------------------------------------------------*/\r
 179 \r
 180 BaseType_t xPortStartScheduler( void )\r
 181 {\r
 182         /* Setup the hardware to generate the tick. */\r
 183         prvSetupTimerInterrupt();\r
 184 \r
 185         /* Restore the context of the first task that is going to run. */\r
 186         #pragma asm\r
 187                 RestoreContext\r
 188         #pragma endasm\r
 189 \r
 190         /* Simulate a function call end as generated by the compiler.  We will now\r
 191         jump to the start of the task the context of which we have just restored. */    \r
 192         __asm(" reti ");\r
 193 \r
 194         /* Should not get here. */\r
 195         return pdFAIL;\r
 196 }\r
 197 /*-----------------------------------------------------------*/\r
 198 \r
 199 void vPortEndScheduler( void )\r
 200 {\r
 201         /* Not implemented - unlikely to ever be required as there is nothing to\r
 202         return to. */\r
 203 }\r
 204 /*-----------------------------------------------------------*/\r
 205 \r
 206 static void prvSetupTimerInterrupt( void )\r
 207 {\r
 208 /* The peripheral clock divided by 32 is used by the timer. */\r
 209 const uint16_t usReloadValue = ( uint16_t ) ( ( ( configPER_CLOCK_HZ / configTICK_RATE_HZ ) / 32UL ) - 1UL );\r
 210 \r
 211         /* Setup RLT0 to generate a tick interrupt. */\r
 212 \r
 213         TMCSR0_CNTE = 0;                /* Count Disable */\r
 214     TMCSR0_CSL = 0x2;           /* CLKP/32 */\r
 215     TMCSR0_MOD = 0;                     /* Software trigger */\r
 216     TMCSR0_RELD = 1;            /* Reload */\r
 217     \r
 218     TMCSR0_UF = 0;                      /* Clear underflow flag */\r
 219         TMRLR0 = usReloadValue;\r
 220         TMCSR0_INTE = 1;                /* Interrupt Enable */\r
 221         TMCSR0_CNTE = 1;                /* Count Enable */\r
 222         TMCSR0_TRG = 1;                 /* Trigger */\r
 223         \r
 224     PORTEN = 0x3;                       /* Port Enable */\r
 225 }\r
 226 /*-----------------------------------------------------------*/\r
 227 \r
 228 #if configUSE_PREEMPTION == 1\r
 229 \r
 230         /* \r
 231          * Tick ISR for preemptive scheduler. The tick count is incremented \r
 232          * after the context is saved. Then the context is switched if required,\r
 233          * and last the context of the task which is to be resumed is restored.\r
 234          */\r
 235 \r
 236         #pragma asm\r
 237 \r
 238         .global _ReloadTimer0_IRQHandler\r
 239         _ReloadTimer0_IRQHandler:\r
 240 \r
 241         ANDCCR #0xEF                                                    ;Disable Interrupts\r
 242         SaveContext                                                             ;Save context\r
 243         ORCCR #0x10                                                             ;Re-enable Interrupts\r
 244 \r
 245         LDI #0xFFFB,R1\r
 246         LDI #_tmcsr0, R0\r
 247         AND R1,@R0                                                              ;Clear RLT0 interrupt flag\r
 248 \r
 249         CALL32   _xTaskIncrementTick,R12                ;Increment Tick\r
 250         CALL32   _vTaskSwitchContext,R12                ;Switch context if required\r
 251 \r
 252         ANDCCR #0xEF                                                    ;Disable Interrupts\r
 253         RestoreContext                                                  ;Restore context\r
 254         ORCCR #0x10                                                             ;Re-enable Interrupts\r
 255 \r
 256         RETI\r
 257 \r
 258         #pragma endasm\r
 259         \r
 260 #else\r
 261         \r
 262         /* \r
 263          * Tick ISR for the cooperative scheduler.  All this does is increment the\r
 264          * tick count.  We don't need to switch context, this can only be done by\r
 265          * manual calls to taskYIELD();\r
 266          */\r
 267         __interrupt void ReloadTimer0_IRQHandler( void )\r
 268         {\r
 269                 /* Clear RLT0 interrupt flag */\r
 270                 TMCSR0_UF = 0; \r
 271                 xTaskIncrementTick();\r
 272         }\r
 273 \r
 274 #endif\r
 275 \r
 276 /*\r
 277  * Manual context switch. We can use a __nosavereg attribute  as the context \r
 278  * would be saved by PortSAVE_CONTEXT().  The context is switched and then \r
 279  * the context of the new task is restored saved. \r
 280  */\r
 281 #pragma asm\r
 282 \r
 283         .global _vPortYieldDelayed\r
 284         _vPortYieldDelayed:\r
 285 \r
 286         ANDCCR #0xEF                                                    ;Disable Interrupts\r
 287         SaveContext                                                             ;Save context\r
 288         ORCCR #0x10                                                             ;Re-enable Interrupts\r
 289 \r
 290         LDI #_dicr, R0\r
 291         BANDL #0x0E, @R0                                                ;Clear Delayed interrupt flag\r
 292 \r
 293         CALL32   _vTaskSwitchContext,R12                ;Switch context if required\r
 294 \r
 295         ANDCCR #0xEF                                                    ;Disable Interrupts\r
 296         RestoreContext                                                  ;Restore context\r
 297         ORCCR #0x10                                                             ;Re-enable Interrupts\r
 298 \r
 299         RETI\r
 300 \r
 301 #pragma endasm\r
 302 /*-----------------------------------------------------------*/\r
 303 \r
 304 /*\r
 305  * Manual context switch. We can use a __nosavereg attribute  as the context \r
 306  * would be saved by PortSAVE_CONTEXT().  The context is switched and then \r
 307  * the context of the new task is restored saved. \r
 308  */      \r
 309 #pragma asm\r
 310 \r
 311         .global _vPortYield\r
 312         _vPortYield:\r
 313 \r
 314         SaveContext                                                             ;Save context\r
 315         CALL32   _vTaskSwitchContext,R12                ;Switch context if required\r
 316         RestoreContext                                                  ;Restore context\r
 317         \r
 318         RETI\r
 319 \r
 320 #pragma endasm\r
 321 /*-----------------------------------------------------------*/\r
 322 \r