begriffs open source - freertos/blob - Source/portable/GCC/RX600/port.c

   1 /*\r
   2     FreeRTOS V6.1.0 - Copyright (C) 2010 Real Time Engineers Ltd.\r
   3 \r
   4     ***************************************************************************\r
   5     *                                                                         *\r
   6     * If you are:                                                             *\r
   7     *                                                                         *\r
   8     *    + New to FreeRTOS,                                                   *\r
   9     *    + Wanting to learn FreeRTOS or multitasking in general quickly       *\r
  10     *    + Looking for basic training,                                        *\r
  11     *    + Wanting to improve your FreeRTOS skills and productivity           *\r
  12     *                                                                         *\r
  13     * then take a look at the FreeRTOS books - available as PDF or paperback  *\r
  14     *                                                                         *\r
  15     *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *\r
  16     *                  http://www.FreeRTOS.org/Documentation                  *\r
  17     *                                                                         *\r
  18     * A pdf reference manual is also available.  Both are usually delivered   *\r
  19     * to your inbox within 20 minutes to two hours when purchased between 8am *\r
  20     * and 8pm GMT (although please allow up to 24 hours in case of            *\r
  21     * exceptional circumstances).  Thank you for your support!                *\r
  22     *                                                                         *\r
  23     ***************************************************************************\r
  24 \r
  25     This file is part of the FreeRTOS distribution.\r
  26 \r
  27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  28     the terms of the GNU General Public License (version 2) as published by the\r
  29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  30     ***NOTE*** The exception to the GPL is included to allow you to distribute\r
  31     a combined work that includes FreeRTOS without being obliged to provide the\r
  32     source code for proprietary components outside of the FreeRTOS kernel.\r
  33     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
  34     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  35     FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  36     more details. You should have received a copy of the GNU General Public \r
  37     License and the FreeRTOS license exception along with FreeRTOS; if not it \r
  38     can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
  39     by writing to Richard Barry, contact details for whom are available on the\r
  40     FreeRTOS WEB site.\r
  41 \r
  42     1 tab == 4 spaces!\r
  43 \r
  44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  45     contact details.\r
  46 \r
  47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  48     critical systems.\r
  49 \r
  50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
  51     licensing and training services.\r
  52 */\r
  53 \r
  54 /*-----------------------------------------------------------\r
  55  * Implementation of functions defined in portable.h for the SH2A port.\r
  56  *----------------------------------------------------------*/\r
  57 \r
  58 /* Scheduler includes. */\r
  59 #include "FreeRTOS.h"\r
  60 #include "task.h"\r
  61 \r
  62 /* Library includes. */\r
  63 #include "string.h"\r
  64 \r
  65 /* Hardware specifics. */\r
  66 #include "iodefine.h"\r
  67 \r
  68 /*-----------------------------------------------------------*/\r
  69 \r
  70 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore \r
  71 PSW is set with U and I set, and PM and IPL clear. */\r
  72 #define portINITIAL_PSW     ( ( portSTACK_TYPE ) 0x00030000 )\r
  73 #define portINITIAL_FPSW    ( ( portSTACK_TYPE ) 0x00000100 )\r
  74 \r
  75 /* These macros allow a critical section to be added around the call to\r
  76 vTaskIncrementTick(), which is only ever called from interrupts at the kernel \r
  77 priority - ie a known priority.  Therefore these local macros are a slight \r
  78 optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros, \r
  79 which would require the old IPL to be read first and stored in a local variable. */\r
  80 #define portDISABLE_INTERRUPTS_FROM_KERNEL_ISR()        __asm volatile ( "MVTIPL        %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )\r
  81 #define portENABLE_INTERRUPTS_FROM_KERNEL_ISR()         __asm volatile ( "MVTIPL        %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )\r
  82 \r
  83 /*-----------------------------------------------------------*/\r
  84 \r
  85 /*\r
  86  * Function to start the first task executing - written in asm code as direct\r
  87  * access to registers is required. \r
  88  */\r
  89 static void prvStartFirstTask( void ) __attribute__((naked));\r
  90 \r
  91 /*\r
  92  * Software interrupt handler.  Performs the actual context switch (saving and\r
  93  * restoring of registers).  Written in asm code as direct register access is\r
  94  * required.\r
  95  */\r
  96 void vSoftwareInterruptISR( void ) __attribute__((naked));\r
  97 \r
  98 /*\r
  99  * The tick interrupt handler.\r
 100  */\r
 101 void vTickISR( void ) __attribute__((interrupt));\r
 102 \r
 103 /*-----------------------------------------------------------*/\r
 104 \r
 105 extern void *pxCurrentTCB;\r
 106 \r
 107 /*-----------------------------------------------------------*/\r
 108 \r
 109 /* \r
 110  * See header file for description. \r
 111  */\r
 112 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 113 {\r
 114         /* R0 is not included as it is the stack pointer. */\r
 115         \r
 116         *pxTopOfStack = 0xdeadbeef;\r
 117         pxTopOfStack--;\r
 118         *pxTopOfStack = portINITIAL_PSW;\r
 119         pxTopOfStack--;\r
 120         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;\r
 121         \r
 122         /* When debugging it can be useful if every register is set to a known\r
 123         value.  Otherwise code space can be saved by just setting the registers\r
 124         that need to be set. */\r
 125         #ifdef USE_FULL_REGISTER_INITIALISATION\r
 126         {\r
 127                 pxTopOfStack--;\r
 128                 *pxTopOfStack = 0xffffffff;     /* r15. */\r
 129                 pxTopOfStack--;\r
 130                 *pxTopOfStack = 0xeeeeeeee;\r
 131                 pxTopOfStack--;\r
 132                 *pxTopOfStack = 0xdddddddd;\r
 133                 pxTopOfStack--;\r
 134                 *pxTopOfStack = 0xcccccccc;\r
 135                 pxTopOfStack--;\r
 136                 *pxTopOfStack = 0xbbbbbbbb;\r
 137                 pxTopOfStack--;\r
 138                 *pxTopOfStack = 0xaaaaaaaa;\r
 139                 pxTopOfStack--;\r
 140                 *pxTopOfStack = 0x99999999;\r
 141                 pxTopOfStack--;\r
 142                 *pxTopOfStack = 0x88888888;\r
 143                 pxTopOfStack--;\r
 144                 *pxTopOfStack = 0x77777777;\r
 145                 pxTopOfStack--;\r
 146                 *pxTopOfStack = 0x66666666;\r
 147                 pxTopOfStack--;\r
 148                 *pxTopOfStack = 0x55555555;\r
 149                 pxTopOfStack--;\r
 150                 *pxTopOfStack = 0x44444444;\r
 151                 pxTopOfStack--;\r
 152                 *pxTopOfStack = 0x33333333;\r
 153                 pxTopOfStack--;\r
 154                 *pxTopOfStack = 0x22222222;\r
 155                 pxTopOfStack--;\r
 156         }\r
 157         #else\r
 158         {\r
 159                 pxTopOfStack -= 15;\r
 160         }\r
 161         #endif\r
 162         \r
 163         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */\r
 164         pxTopOfStack--;                         \r
 165         *pxTopOfStack = portINITIAL_FPSW;\r
 166         pxTopOfStack--;\r
 167         *pxTopOfStack = 0x12345678; /* Accumulator. */\r
 168         pxTopOfStack--;\r
 169         *pxTopOfStack = 0x87654321; /* Accumulator. */\r
 170 \r
 171         return pxTopOfStack;\r
 172 }\r
 173 /*-----------------------------------------------------------*/\r
 174 \r
 175 portBASE_TYPE xPortStartScheduler( void )\r
 176 {\r
 177 extern void vApplicationSetupTimerInterrupt( void );\r
 178 \r
 179         /* Use pxCurrentTCB just so it does not get optimised away. */\r
 180         if( pxCurrentTCB != NULL )\r
 181         {\r
 182                 /* Call an application function to set up the timer that will generate the\r
 183                 tick interrupt.  This way the application can decide which peripheral to \r
 184                 use.  A demo application is provided to show a suitable example. */\r
 185                 vApplicationSetupTimerInterrupt();\r
 186 \r
 187                 /* Enable the software interrupt. */            \r
 188                 _IEN( _ICU_SWINT ) = 1;\r
 189                 \r
 190                 /* Ensure the software interrupt is clear. */\r
 191                 _IR( _ICU_SWINT ) = 0;\r
 192                 \r
 193                 /* Ensure the software interrupt is set to the kernel priority. */\r
 194                 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;\r
 195 \r
 196                 /* Start the first task. */\r
 197                 prvStartFirstTask();\r
 198         }\r
 199 \r
 200         /* Should not get here. */\r
 201         return pdFAIL;\r
 202 }\r
 203 /*-----------------------------------------------------------*/\r
 204 \r
 205 void vPortEndScheduler( void )\r
 206 {\r
 207         /* Not implemented as there is nothing to return to. */\r
 208 }\r
 209 /*-----------------------------------------------------------*/\r
 210 \r
 211 static void prvStartFirstTask( void )\r
 212 {\r
 213         __asm volatile\r
 214         (       \r
 215                 /* When starting the scheduler there is nothing that needs moving to the\r
 216                 interrupt stack because the function is not called from an interrupt.\r
 217                 Just ensure the current stack is the user stack. */\r
 218                 "SETPSW         U                                               \n" \\r
 219 \r
 220                 /* Obtain the location of the stack associated with which ever task \r
 221                 pxCurrentTCB is currently pointing to. */\r
 222                 "MOV.L          #_pxCurrentTCB, R15             \n" \\r
 223                 "MOV.L          [R15], R15                              \n" \\r
 224                 "MOV.L          [R15], R0                               \n" \\r
 225 \r
 226                 /* Restore the registers from the stack of the task pointed to by \r
 227                 pxCurrentTCB. */\r
 228             "POP                R15                                             \n" \\r
 229                 \r
 230                 /* Accumulator low 32 bits. */\r
 231             "MVTACLO    R15                                     \n" \\r
 232             "POP                R15                                             \n" \\r
 233                 \r
 234                 /* Accumulator high 32 bits. */\r
 235             "MVTACHI    R15                                     \n" \\r
 236             "POP                R15                                             \n" \\r
 237                 \r
 238                 /* Floating point status word. */\r
 239             "MVTC               R15, FPSW                               \n" \\r
 240                 \r
 241                 /* R1 to R15 - R0 is not included as it is the SP. */\r
 242             "POPM               R1-R15                                  \n" \\r
 243                 \r
 244                 /* This pops the remaining registers. */\r
 245             "RTE                                                                \n" \\r
 246             "NOP                                                                \n" \\r
 247             "NOP                                                                \n"\r
 248         );\r
 249 }\r
 250 /*-----------------------------------------------------------*/\r
 251 \r
 252 void vSoftwareInterruptISR( void )\r
 253 {\r
 254         __asm volatile\r
 255         (\r
 256                 /* Re-enable interrupts. */\r
 257                 "SETPSW         I                                                       \n" \\r
 258 \r
 259                 /* Move the data that was automatically pushed onto the interrupt stack when\r
 260                 the interrupt occurred from the interrupt stack to the user stack.  \r
 261         \r
 262                 R15 is saved before it is clobbered. */\r
 263                 "PUSH.L         R15                                                     \n" \\r
 264         \r
 265                 /* Read the user stack pointer. */\r
 266                 "MVFC           USP, R15                                        \n" \\r
 267         \r
 268                 /* Move the address down to the data being moved. */\r
 269                 "SUB            #12, R15                                        \n" \\r
 270                 "MVTC           R15, USP                                        \n" \\r
 271         \r
 272                 /* Copy the data across, R15, then PC, then PSW. */\r
 273                 "MOV.L          [ R0 ], [ R15 ]                         \n" \\r
 274                 "MOV.L          4[ R0 ], 4[ R15 ]                       \n" \\r
 275                 "MOV.L          8[ R0 ], 8[ R15 ]                       \n" \\r
 276 \r
 277                 /* Move the interrupt stack pointer to its new correct position. */\r
 278                 "ADD            #12, R0                                         \n" \\r
 279         \r
 280                 /* All the rest of the registers are saved directly to the user stack. */\r
 281                 "SETPSW         U                                                       \n" \\r
 282 \r
 283                 /* Save the rest of the general registers (R15 has been saved already). */\r
 284                 "PUSHM          R1-R14                                          \n" \\r
 285         \r
 286                 /* Save the FPSW and accumulator. */\r
 287                 "MVFC           FPSW, R15                                       \n" \\r
 288                 "PUSH.L         R15                                                     \n" \\r
 289                 "MVFACHI        R15                                                     \n" \\r
 290                 "PUSH.L         R15                                                     \n" \\r
 291                 \r
 292                 /* Middle word. */\r
 293                 "MVFACMI        R15                                                     \n" \\r
 294                 \r
 295                 /* Shifted left as it is restored to the low order word. */\r
 296                 "SHLL           #16, R15                                        \n" \\r
 297                 "PUSH.L         R15                                                     \n" \\r
 298 \r
 299                 /* Save the stack pointer to the TCB. */\r
 300                 "MOV.L          #_pxCurrentTCB, R15                     \n" \\r
 301                 "MOV.L          [ R15 ], R15                            \n" \\r
 302                 "MOV.L          R0, [ R15 ]                                     \n" \\r
 303                         \r
 304                 /* Ensure the interrupt mask is set to the syscall priority while the kernel\r
 305                 structures are being accessed. */\r
 306                 "MVTIPL         %0                                                      \n" \\r
 307 \r
 308                 /* Select the next task to run. */\r
 309                 "BSR.A          _vTaskSwitchContext                     \n" \\r
 310 \r
 311                 /* Reset the interrupt mask as no more data structure access is required. */\r
 312                 "MVTIPL         %1                                                      \n" \\r
 313 \r
 314                 /* Load the stack pointer of the task that is now selected as the Running\r
 315                 state task from its TCB. */\r
 316                 "MOV.L          #_pxCurrentTCB,R15                      \n" \\r
 317                 "MOV.L          [ R15 ], R15                            \n" \\r
 318                 "MOV.L          [ R15 ], R0                                     \n" \\r
 319 \r
 320                 /* Restore the context of the new task.  The PSW (Program Status Word) and\r
 321                 PC will be popped by the RTE instruction. */\r
 322                 "POP            R15                                                     \n" \\r
 323                 "MVTACLO        R15                                                     \n" \\r
 324                 "POP            R15                                                     \n" \\r
 325                 "MVTACHI        R15                                                     \n" \\r
 326                 "POP            R15                                                     \n" \\r
 327                 "MVTC           R15, FPSW                                       \n" \\r
 328                 "POPM           R1-R15                                          \n" \\r
 329                 "RTE                                                                    \n" \\r
 330                 "NOP                                                                    \n" \\r
 331                 "NOP                                                                      "\r
 332                 :: "i"(configMAX_SYSCALL_INTERRUPT_PRIORITY), "i"(configKERNEL_INTERRUPT_PRIORITY)\r
 333         );\r
 334 }\r
 335 /*-----------------------------------------------------------*/\r
 336 \r
 337 void vTickISR( void )\r
 338 {\r
 339         /* Re-enabled interrupts. */\r
 340         __asm volatile( "SETPSW I" );\r
 341         \r
 342         /* Increment the tick, and perform any processing the new tick value\r
 343         necessitates.  Ensure IPL is at the max syscall value first. */\r
 344         portDISABLE_INTERRUPTS_FROM_KERNEL_ISR();\r
 345         {\r
 346                 vTaskIncrementTick(); \r
 347         }\r
 348         portENABLE_INTERRUPTS_FROM_KERNEL_ISR();\r
 349         \r
 350         /* Only select a new task if the preemptive scheduler is being used. */\r
 351         #if( configUSE_PREEMPTION == 1 )\r
 352                 taskYIELD();\r
 353         #endif\r
 354 }\r
 355 /*-----------------------------------------------------------*/\r
 356 \r
 357 unsigned long ulPortGetIPL( void )\r
 358 {\r
 359         __asm volatile\r
 360         ( \r
 361                 "MVFC   PSW, R1                 \n"     \\r
 362                 "SHLR   #24, R1                 \n"     \\r
 363                 "RTS                                      "\r
 364         );\r
 365         \r
 366         /* This will never get executed, but keeps the compiler from complaining. */\r
 367         return 0;\r
 368 }\r
 369 /*-----------------------------------------------------------*/\r
 370 \r
 371 void vPortSetIPL( unsigned long ulNewIPL )\r
 372 {\r
 373         __asm volatile\r
 374         ( \r
 375                 "PUSH   R5                              \n" \\r
 376                 "MVFC   PSW, R5                 \n"     \\r
 377                 "SHLL   #24, R1                 \n" \\r
 378                 "AND    #-0F000001H, R5 \n" \\r
 379                 "OR             R1, R5                  \n" \\r
 380                 "MVTC   R5, PSW                 \n" \\r
 381                 "POP    R5                              \n" \\r
 382                 "RTS                                      "\r
 383          );\r
 384 }\r