1 Documentation and download available at https://www.FreeRTOS.org/
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3 Changes between FreeRTOS V10.4.3 LTS Patch 1 and FreeRTOS V10.4.3 LTS Patch 2
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5 + ARMv7-M and ARMv8-M MPU ports – prevent non-kernel code from calling the
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6 internal functions xPortRaisePrivilege and vPortResetPrivilege by changing
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9 Changes between FreeRTOS V10.4.3 and FreeRTOS V10.4.3 LTS Patch 1 released September 10 2021
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11 See https://www.FreeRTOS.org/FreeRTOS-V10.4.5.html
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13 + ARMv8-M secure-side port: Tasks that call secure functions from the
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14 non-secure side of an ARMv8-M MCU (ARM Cortex-M23 and Cortex-M33) have two
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15 contexts – one on the non-secure side and one on the secure-side. Previous
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16 versions of the FreeRTOS ARMv8-M secure-side ports allocated the structures
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17 that reference secure-side contexts at run time. Now the structures are
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18 allocated statically at compile time. The change necessitates the
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19 introduction of the secureconfigMAX_SECURE_CONTEXTS configuration constant,
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20 which sets the number of statically allocated secure contexts.
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21 secureconfigMAX_SECURE_CONTEXTS defaults to 8 if left undefined.
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22 Applications that only use FreeRTOS code on the non-secure side, such as
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23 those running third-party code on the secure side, are not affected by
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27 Changes between FreeRTOS V10.4.2 and FreeRTOS V10.4.3 released December 14 2020
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29 V10.4.3 is included in the 202012.00 LTS release. Learn more at https:/freertos.org/lts-libraries.html
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31 See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
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33 + Changes to improve robustness and consistency for buffer allocation in
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34 the heap, queue and stream buffer.
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35 + The following functions can no longer be called from unprivileged code.
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36 - xTaskCreateRestricted
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37 - xTaskCreateRestrictedStatic
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38 - vTaskAllocateMPURegions
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41 Changes between FreeRTOS V10.4.1 and FreeRTOS V10.4.2 released November 10 2020
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43 See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
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45 + Fix an issue in the ARMv8-M ports that caused BASEPRI to be masked
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46 between the first task starting to execute and that task making
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47 a FreeRTOS API call.
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48 + Introduced xTaskDelayUntil(), which is functionally equivalent to
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49 vTaskDelayUntil(), with the addition of returning a value to
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50 indicating whether or not the function placed the calling task into
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51 the Blocked state or not.
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52 + Update WolfSSL to 4.5.0 and add the FIPS ready demo.
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53 + Add support for ESP IDF 4.2 to ThirdParty Xtensa port.
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54 + Re-introduce uxTopUsedPriority to support OpenOCD debugging.
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55 + Convert most dependent libraries in FreeRTOS/FreeRTOS to submodules.
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56 + Various general maintenance and improvements to MISRA compliance.
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59 Changes between FreeRTOS V10.4.0 and FreeRTOS V10.4.1 released September 17 2020
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61 See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
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63 + Fixed an incorrectly named parameter that prevented the
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64 ulTaskNotifyTakeIndexed macro compiling, and the name space clash in the
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65 test code that prevented this error causing test failures.
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68 Changes between FreeRTOS V10.3.1 and FreeRTOS V10.4.0 released September 10 2020
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70 See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
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74 + Task notifications: Prior to FreeRTOS V10.4.0 each created task had a
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75 single direct to task notification. From FreeRTOS V10.4.0 each task has
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76 an array of notifications. The direct to task notification API has been
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77 extended with API functions postfixed with "Indexed" to enable the API to
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78 operate on a task notification at any array index. See
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79 https://www.freertos.org/RTOS-task-notifications.html for more information.
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80 + Kernel ports that support memory protection units (MPUs): The ARMv7-M and
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81 ARMv8-M MPU ports now support a privilege access only heap. The ARMv7-M
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82 MPU ports now support devices that have 16 MPU regions, have the ability
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83 to override default memory attributes for privileged code and data
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84 regions, and have the ability to place the FreeRTOS kernel code outside of
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85 the Flash memory. The ARMv8-M MPU ports now support tickless idle mode.
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86 See https://www.freertos.org/FreeRTOS-MPU-memory-protection-unit.html
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87 for more information.
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89 Additional noteworthy updates:
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91 + Code formatting is now automated to facilitate the increase in
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92 collaborative development in Git. The auto-formated code is not identical
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93 to the original formatting conventions. Most notably spaces are now used
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95 + The prototypes for callback functions (those that start with "Application",
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96 such as vApplicationStackOverflowHook()) are now in the FreeRTOS header
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97 files, removing the need for application writers to add prototypes into
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98 the C files in which they define the functions.
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99 + New Renesas RXv3 port layer.
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100 + Updates to the Synopsys ARC code, including support for EM and HS cores,
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102 + Added new POSIX port layer that allows FreeRTOS to run on Linux hosts in
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103 the same way the Windows port layer enables FreeRTOS to run on Windows
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105 + Many other minor optimisations and enhancements. For full details
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106 see https://github.com/FreeRTOS/FreeRTOS-Kernel/commits/master
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109 Changes between FreeRTOS V10.3.0 and FreeRTOS V10.3.1 released February 18 2020
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111 See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
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113 + ./FreeRTOS-Labs directory was removed from this file. The libraries it
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114 contained are now available as a separate download.
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116 Changes between FreeRTOS V10.2.1 and FreeRTOS V10.3.0 released February 7 2020
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118 See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
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120 New and updated kernel ports:
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122 + Added RISC-V port for the IAR compiler.
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123 + Update the Windows simulator port to use a synchronous object to prevent
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124 a user reported error whereby a task continues to run for a short time
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125 after being moved to the Blocked state. Note we were not able to
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126 replicate the reported issue and it likely depends on your CPU model.
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127 + Correct alignment of stack top in RISC-V port when
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128 configISR_STACK_SIZE_WORDS is defined to a non zero value, which causes
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129 the interrupt stack to be statically allocated.
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130 + The RISC-V machine timer compare register can now be for any HART, whereas
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131 previously it was always assumed FreeRTOS was running on HART 0.
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132 + Update the sequence used to update the 64-bit machine timer
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133 compare register on 32-bit cores to match that suggested in RISC-V
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135 + Added tickless low power modes into the ARM, IAR and GCC Cortex-M0 compiler
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137 + Updated the behaviour of the ARMv7-M MPU (Memory Protection Unit) ports to
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138 match that of the ARMv8-M ports whereby privilege escalations can only
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139 originate from within the kernel's own memory segment. Added
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140 configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY configuration constant.
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141 + Update existing MPU ports to correctly disable the MPU before it is
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143 + Added contributed port and demo application for a T-Head (formally C-SKY)
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148 + Added the vPortGetHeapStats() API function which returns information on
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149 the heap_4 and heap_5 state.
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150 + Added xTaskCatchUpTicks(), which corrects the tick count value after the
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151 application code has held interrupts disabled for an extended period.
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152 + Added xTaskNotifyValueClear() API function.
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153 + Added uxTimerGetReloadMode() API function.
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155 Other miscellaneous changes:
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156 + Change type of uxPendedTicks from UBaseType_t to TickType_t to ensure it
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157 has the same type as variables with which it is compared to, and therefore
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158 also renamed the variable xPendingTicks.
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159 + Update Keil projects that use the MPU so memory regions come from linker
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160 script (scatter file) variables instead of being hard coded.
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161 + Added LPC51U68 Cortex-M0+ demos for GCC (MCUXpresso), Keil and IAR
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163 + Added CORTEX_MPU_STM32L4_Discovery_Keil_STM32Cube demo.
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164 + Added LPC54018 MPU demo.
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165 + Rename xTaskGetIdleRunTimeCounter() to ulTaskGetIdleRunTimeCounter().
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168 Changes between FreeRTOS V10.2.1 and FreeRTOS V10.2.0 released May 13 2019:
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170 + Added ARM Cortex-M23 port layer to complement the pre-existing ARM
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171 Cortex-M33 port layer.
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172 + The RISC-V port now automatically switches between 32-bit and 64-bit
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174 + Introduced the portMEMORY_BARRIER macro to prevent instruction re-ordering
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175 when GCC link time optimisation is used.
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176 + Introduced the portDONT_DISCARD macro to the ARMv8-M ports to try and
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177 prevent the secure side builds from removing symbols required by the
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178 non secure side build.
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179 + Introduced the portARCH_NAME to provide additional data to select semi-
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180 automated build environments.
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181 + Cortex-M33 and Cortex-M23 ports now correctly disable the MPU before
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182 updating the MPU registers.
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184 + Added Nuvoton NuMaker-PFM-M2351 ARM Cortex-M23 demo.
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185 + Added LPC55S69 ARM Cortex-M33 demo.
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186 + Added an STM32 dual core AMP stress test demo.
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189 Changes between FreeRTOS V10.1.1 and FreeRTOS V10.2.0 released February 25 2019:
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191 + Added GCC RISC-V MCU port with three separate demo applications.
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192 + Included pre-existing ARM Cortex-M33 (ARMv8-M) GCC/ARMclang and IAR ports
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193 with Keil simulator demo.
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194 + Update the method used to detect if a timer is active. Previously the
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195 timer was deemed to be inactive if it was not referenced from a list.
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196 However, when a timer is updated it is temporarily removed from, then
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197 re-added to a list, so now the timer's active status is stored separately.
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198 + Add vTimerSetReloadMode(), xTaskGetIdleRunTimeCounter(), and
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199 xTaskGetApplicationTaskTagFromISR() API functions.
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200 + Updated third party Xtensa port so it is MIT licensed.
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201 + Added configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H to the Renesas
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202 compiler RX600v2 port to enable switching between platform.h and
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203 iodefine.h includes within that port's port.c file.
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204 + Removed the 'FromISR' functions from the MPU ports as ISRs run privileged
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206 + Added uxTaskGetStackHighWaterMark2() function to enable the return type to
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207 be changed without breaking backward compatibility.
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208 uxTaskGetStackHighWaterMark() returns a UBaseType_t as always,
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209 uxTaskGetStackHighWaterMark2() returns configSTACK_DEPTH_TYPE to allow the
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210 user to determine the return type.
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211 + Fixed issues in memory protected ports related to different combinations
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212 of static memory only and dynamic memory only builds. As a result the
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213 definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE became more
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214 complex and was moved to FreeRTOS.h with a table explaining its definition.
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215 + Added a 'get task tag from ISR' function.
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216 + Change the method used to determine if a timer is active or not from just
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217 seeing if it is referenced from the active timer list to storing its
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218 active state explicitly. The change prevents the timer reporting that it
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219 is inactive while it is being moved from one list to another.
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220 + The pcName parameter passed into the task create functions can be NULL,
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221 previously a name had to be provided.
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222 + When using tickless idle, prvResetNextTaskUnblockTime() is now only called
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223 in xTaskRemoveFromEventList() if the scheduler is not suspended.
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224 + Introduced portHAS_STACK_OVERFLOW_CHECKING, which should be set to 1 for
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225 FreeRTOS ports that run on architectures that have stack limit registers.
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228 Changes between FreeRTOS V10.1.0 and FreeRTOS V10.1.1 released 7 September 2018
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230 + Reverted a few structure name changes that broke several kernel aware
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232 + Updated to the latest trace recorder code.
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233 + Fixed some formatting in the FreeRTOS+TCP TCP/IP stack code.
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234 + Reverted moving some variables from file to function scope as doing so
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235 broke debug scenarios that require the static qualifier to be removed.
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237 Changes between FreeRTOS V10.0.1 and FreeRTOS V10.1.0 released 22 August 2018
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239 FreeRTOS Kernel Changes:
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241 + Update lint checked MISRA compliance to use the latest MISRA standard, was
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242 previously using the original MISRA standard.
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243 + Updated all object handles (TaskHandle_t, QueueHandle_t, etc.) to be
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244 unique types instead of void pointers, improving type safety. (this was
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245 attempted some years back but had to be backed out due to bugs in some
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246 debuggers). Note this required the pvContainer member of a ListItem_t
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247 struct to be renamed - set configENABLE_BACKWARD_COMPATIBILITY to 1 if
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248 this causes an issue.
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249 + Added configUSE_POSIX_ERRNO to enable per task POSIX style errno
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250 functionality in a more user friendly way - previously the generic thread
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251 local storage feature was used for this purpose.
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252 + Added Xtensa port and demo application for the XCC compiler.
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253 + Changed the implementation of vPortEndScheduler() for the Win32 port to
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254 simply call exit( 0 ).
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255 + Bug fix in vPortEnableInterrupt() for the GCC Microblaze port to protect
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256 the read modify write access to an internal Microblaze register.
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257 + Fix minor niggles when the MPU is used with regards to prototype
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258 differences, static struct size differences, etc.
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259 + The usStackHighWaterMark member of the TaskStatus_t structure now has type
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260 configSTACK_DEPTH_TYPE in place of uint16_t - that change should have been
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261 made when the configSTACK_DEPTH_TYPE type (which gets around the previous
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262 16-bit limit on stack size specifications) was introduced.
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263 + Added the xMessageBufferNextLengthBytes() API function and likewise stream
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265 + Introduce configMESSAGE_BUFFER_LENGTH_TYPE to allow the number of bytes
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266 used to hold the length of a message in the message buffer to be reduced.
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267 configMESSAGE_BUFFER_LENGTH_TYPE default to size_t, but if, for example,
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268 messages can never be more than 255 bytes it could be set to uint8_t,
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269 saving 3 bytes each time a message is written into the message buffer
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270 (assuming sizeof( size_t ) is 4).
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271 + Updated the StaticTimer_t structure to ensure it matches the size of the
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272 Timer_t structure when the size of TaskFunction_t does not equal the size
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274 + Update various Xilinx demos to use 2018.1 version of the SDK tools.
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275 + Various updates to demo tasks to maintain test coverage.
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276 + FreeRTOS+UDP was removed in FreeRTOS V10.1.0 as it was replaced by
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277 FreeRTOS+TCP, which was brought into the main download in FreeRTOS
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278 V10.0.0. FreeRTOS+TCP can be configured as a UDP only stack, and
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279 FreeRTOS+UDP does not contain the patches applied to FreeRTOS+TCP.
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281 FreeRTOS+TCP Changes:
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283 + Multiple security improvements and fixes in packet parsing routines, DNS
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284 caching, and TCP sequence number and ID generation.
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285 + Disable NBNS and LLMNR by default.
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286 + Add TCP hang protection by default.
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288 We thank Ori Karliner of Zimperium zLabs Team for reporting these issues.
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291 Changes between FreeRTOS V10.0.0 and FreeRTOS V10.0.1, released December 20 2017
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293 + Fix position of "#if defined( __cplusplus )" in stream_buffer.h.
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294 + Correct declarations of MPU_xQueuePeek() and MPU_xQueueSemaphoreTake() in
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296 + Correct formatting in vTaskList() helper function when it prints the state
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297 of the currently executing task.
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298 + Introduce #error if stream_buffer.c is built without
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299 configUSE_TASK_NOTIFICATIONS set to 1.
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300 + Update FreeRTOS+TCP to V2.0.0
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301 - Improve the formatting of text that displays the available netword
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302 interfaces when FreeRTOS+TCP is used on Windows with WinPCap.
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303 - Introduce ipconfigSOCKET_HAS_USER_WAKE_CALLBACK option to enable a user
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304 definable callback to execute when data arrives on a socket.
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306 Changes between FreeRTOS V9.0.1 and FreeRTOS V10.0.0:
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308 The FreeRTOS kernel is now MIT licensed: https://www.FreeRTOS.org/license
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310 New Features and components:
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312 + Stream Buffers - see https://www.FreeRTOS.org/RTOS-stream-buffer-example.html
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313 + Message Buffers - see https://www.FreeRTOS.org//RTOS-message-buffer-example.html
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314 + Move FreeRTOS+TCP into the main repository, along with the basic Win32
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315 TCP demo FreeRTOS_Plus_TCP_Minimal_Windows_Simulator.
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317 New ports or demos:
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319 + Added demo for TI SimpleLink CC3220 MCU.
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320 + Added MPU and non MPU projects for Microchip CEC and MEC 17xx and 51xx
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322 + Added CORTEX_MPU_Static_Simulator_Keil_GCC demo to test static allocation
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325 Fixes or enhancements:
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327 + Cortex-M ports push additional register prior to calling
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328 vTaskSwitchContext to ensure 8-byte alignment is maintained. Only
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329 important if a user defined tick hook function performs an operation that
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330 requires 8-byte alignment.
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331 + Optimisations to the implementation of the standard tickless idle mode on
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333 + Improvements to the Win32 port including using higher priority threads.
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334 + Ensure interrupt stack alignment on PIC32 ports.
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335 + Updated GCC TriCore port to build with later compiler versions.
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336 + Update mpu_wrappers.c to support static allocation.
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337 + The uxNumberOfItems member of List_t is now volatile - solving an issue
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338 when the IAR compiler was used with maximum optimization.
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339 + Introduced configRECORD_STACK_HIGH_ADDRESS. When set to 1 the stack start
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340 address is saved into each task's TCB (assuming stack grows down).
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341 + Introduced configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H to allow user defined
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342 functionality, and user defined initialisation, to be added to FreeRTOS's
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343 tasks.c source file. When configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H is
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344 set to 1 a user provided header file called freertos_task_c_additions.h
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345 will be included at the bottom of tasks.c. Functions defined in that
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346 header file can call freertos_tasks_c_additions_init(), which in turn
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347 calls a macro called FREERTOS_TASKS_C_ADDITIONS_INIT(), if it is defined.
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348 FREERTOS_TASKS_C_ADDITIONS_INIT() can be defined in FreeRTOSConfig.h.
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349 + Introduced configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x ) which can be
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350 defined by a user in FreeRTOSConfig.h. The macro is called before
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351 assessing whether to enter tickless idle mode or not. If the macro sets
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352 x to zero then tickless idle mode will not be entered. This allows users
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353 to abort tickless idle mode entry before the tickless idle function is
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354 even called - previously it was only possible to abort from within the
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355 tickless idle function itself.
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356 + Added configPRINTF(), which can be defined by users to allow all libraries
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357 to use the same print formatter.
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358 + Introduced configMAX() and configMIN() macros which default to standard
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359 max( x, y ) and min( x, y ) macro behaviour, but can be overridden if the
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360 application writer defines the same macros in FreeRTOSConfig.h.
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361 + Corrected the definition of StaticTask_t in the case where
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362 INCLUDE_xTaskAbortDelay is set to 1.
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363 + Introduced configTIMER_SERVICE_TASK_NAME and configIDLE_TASK_NAME, both of
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364 which can be defined to strings in FreeRTOSConfig.h to change the default
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365 names of the timer service and idle tasks respectively.
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366 + Only fill the stack of a newly created task with a known value if stack
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367 checking, or high water mark checking/viewing, is in use - removing the
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368 dependency on memset() in other cases.
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369 + Introduced xTaskCreateRestrictedStatic() so static allocation can be used
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371 + Ensure suspended tasks cannot be unsuspended by a received task
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373 + Fix race condition in vTaskSetTimeOutState().
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374 + Updated trace recorder files to the latest version.
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376 Changes since FreeRTOS V9.0.0:
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378 + Priority dis-inheritance behaviour has been enhanced in the case where a
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379 task that attempted to take a mutex that was held by a lower priority task
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380 timed out before it was able to obtain the mutex (causing the task that
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381 holds the mutex to have its priority raised, then lowered again, in
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382 accordance with the priority inheritance protocol).
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383 + Split the overloaded xQueueGenericReceive() function into three separate
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384 dedicated functions.
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385 + Allow the default human readable text names given to the Idle and Timer
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386 tasks to be overridden by defining the configIDLE_TASK_NAME and
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387 configTIMER_SERVICE_TASK_NAME definitions respectively in FreeRTOSConfig.h.
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388 + Introduced configINITIAL_TICK_COUNT to allow the tick count to take a
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389 value of than than 0 when the system boots. This can be useful for
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390 testing purposes - although setting configUSE_16_BIT_TICKS to 1 can also
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391 be used to test frequent tick overflows.
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392 + Ensure the Cortex-M SysTick count is cleared to zero before starting the
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394 + Add configASSERT() into ARM Cortex-M ports to check the number of priority
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396 + Clear the 'control' register before starting ARM Cortex-M4F ports in case
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397 the FPU is used before the scheduler is started. This just saves a few
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398 bytes on the main stack as it prevents space being left for a later save
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400 + Added xSemaphoreGetMutexHolderFromISR().
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401 + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
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402 + Introduced configSTACK_DEPTH_TYPE to allow users to change the type used
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403 to specify the stack size when using xTaskCreate(). For historic reasons,
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404 when FreeRTOS was only used on small MCUs, the type was set to uint16_t,
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405 but that can be too restrictive when FreeRTOS is used on larger
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406 processors. configSTACK_DEPTH_TYPE defaults to uint16_t.
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407 xTaskCreateStatic(), being a newer function, used a uint32_t.
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408 + Increase the priority of the Windows threads used by the Win32 port. As
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409 all the threads run on the same core, and the threads run with very high
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410 priority, there is a risk that the host will become unresponsive, so also
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411 prevent the Windows port executing on single core hosts.
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413 Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016:
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415 See https://www.FreeRTOS.org/FreeRTOS-V9.html
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417 RTOS kernel updates:
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419 + The prototype of the new xTaskCreateStatic() API function was modified to
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420 remove a parameter and improve compatibility with other new
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421 "CreateStatic()" API functions. The stack size parameter in
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422 xTaskCreateStatic() is now uint32_t, which changes the prototype of the
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423 callback functions. See the following URL:
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424 https://www.FreeRTOS.org/xTaskCreateStatic.html
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425 + GCC ARM Cortex-A port: Introduced the configUSE_TASK_FPU_SUPPORT
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426 constant. When configUSE_TASK_FPU_SUPPORT is set to 2 every task is
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427 automatically given a floating point (FPU) context.
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428 + GCC ARM Cortex-A port: It is now possible to automatically save and
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429 restore all floating point (FPU) registers on entry to each potentially
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430 nested interrupt by defining vApplicationFPUSafeIRQHandler() instead of
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431 vApplicationIRQHandler().
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432 + All ARM Cortex-M3/4F/7 ports: Clear the least significant bit of the task
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433 entry address placed onto the stack of a task when the task is created for
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434 strict compliance with the ARM Cortex-M3/4/7 architecture documentation
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435 (no noticeable effect unless using the QMEU emulator).
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436 + Added GCC and Keil ARM Cortex-M4F MPU ports - previously the MPU was only
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437 supported on ARM Cortex-M3.
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438 + ARM Cortex-M3/4F MPU ports: Update to fully support the FreeRTOS V9.0.0
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439 API (other than static object creation) and added the
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440 FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC demo application to
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441 demonstrate how to use the updated MPU port.
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442 + All ARM Cortex-M3/4F/7 ports: Add additional barrier instructions to the
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443 default low power tickless implementation.
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444 + All ARM Cortex-M0 ports: Prevent an item being left on the stack of the
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445 first task that executes.
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446 + Win32 ports: Reduce the amount of stack used and change the way Windows
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447 threads are deleted to increase the maximum execution time.
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448 + Add an ARM Cortex-M4F port for the MikroC compiler. Ensure to read the
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449 documentation page for this port before use.
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450 + MPS430X IAR port: Update to be compatible with the latest EW430 tools
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452 + IAR32 GCC port: Correct vPortExitCritical() when
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453 configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.
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454 + For consistency vTaskGetTaskInfo() now has the alias vTaskGetInfo(),
\r
455 xTaskGetTaskHandle() now has the alias xTaskGetHandle() and
\r
456 pcQueueGetQueueName() now has an alias pcQueueGetName().
\r
457 + Fix various errors in comments and compiler warnings.
\r
459 Demo application updates:
\r
461 + Update Atmel Studio projects to use Atmel Studio 7.
\r
462 + Update Xilinx SDK projects to use the 2016.1 version of the SDK.
\r
463 + Remove dependency on legacy IO libraries from the PIC32 demos.
\r
464 + Move the Xilinx UltraScale Cortex-R5 demo into the main distribution.
\r
465 + Update the MSP432 libraries to the latest version.
\r
466 + Add Microchip CEC1302 (ARM Cortex-M4F) demos for GCC, Keil and MikroC
\r
468 + Move the Atmel SAMA5D2 demo into the main distribution.
\r
470 Changes between FreeRTOS V9.0.0rc1 and FreeRTOS V9.0.0rc2 (release candidate 2)
\r
471 released March 30 2016:
\r
473 NOTE - See https://www.FreeRTOS.org/FreeRTOS-V9.html for details
\r
475 + The functions that create RTOS objects using static memory allocation have
\r
476 been simplified and will not revert to using dynamic allocation if a
\r
477 buffer is passed into a function as NULL.
\r
478 + Introduced the configSUPPORT_DYNAMIC_ALLOCATION configuration constant to
\r
479 allow a FreeRTOS application to be built without a heap even being being
\r
480 defined. The Win32 example located in the
\r
481 /FreeRTOS/demo/WIN32-MSVC-Static-Allocation-Only directory is provided as
\r
482 a reference for projects that do not include a FreeRTOS heap.
\r
483 + Minor run-time optimisations.
\r
484 + Two new low power tickless implementations that target Silicon Labs EFM32
\r
486 + Addition of the xTimerGetPeriod() and xTimerGetExpireTime() API functions.
\r
488 Changes between FreeRTOS V8.2.3 and FreeRTOS V9.0.0rc1 (release candidate 1)
\r
489 released February 19 2016:
\r
491 RTOS Kernel Updates:
\r
493 + Major new feature - tasks, semaphores, queues, timers and event groups can
\r
494 now be created using statically allocated memory, so without any calls to
\r
496 + Major new features - Added the xTaskAbortDelay() API function which allows
\r
497 one task to force another task to immediately leave the Blocked state,
\r
498 even if the event the blocked task is waiting for has not occurred, or the
\r
499 blocked task's timeout has not expired.
\r
500 + Updates necessary to allow FreeRTOS to run on 64-bit architectures.
\r
501 + Added vApplicationDaemonTaskStartupHook() which executes when the RTOS
\r
502 daemon task (which used to be called the timer service task) starts
\r
503 running. This is useful if the application includes initialisation code
\r
504 that would benefit from executing after the scheduler has been started.
\r
505 + Added the xTaskGetTaskHandle() API function, which obtains a task handle
\r
506 from the task's name. xTaskGetTaskHandle() uses multiple string compare
\r
507 operations, so it is recommended that it is called only once per task.
\r
508 The handle returned by xTaskGetTaskHandle() can then be stored locally for
\r
510 + Added the pcQueueGetQueueName() API function, which obtains the name of
\r
511 a queue from the queue's handle.
\r
512 + Tickless idling (for low power applications) can now also be used when
\r
513 configUSE_PREEMPTION is 0.
\r
514 + If one task deletes another task, then the stack and TCB of the deleted
\r
515 task is now freed immediately. If a task deletes itself, then the stack
\r
516 and TCB of the deleted task are freed by the Idle task as before.
\r
517 + If a task notification is used to unblock a task from an ISR, but the
\r
518 xHigherPriorityTaskWoken parameter is not used, then pend a context switch
\r
519 that will then occur during the next tick interrupt.
\r
520 + Heap_1.c and Heap_2.c now use the configAPPLICATION_ALLOCATED_HEAP
\r
521 settings, which previously was only used by heap_4.c.
\r
522 configAPPLICATION_ALLOCATED_HEAP allows the application writer to declare
\r
523 the array that will be used as the FreeRTOS heap, and in-so-doing, place
\r
524 the heap at a specific memory location.
\r
525 + TaskStatus_t structures are used to obtain details of a task.
\r
526 TaskStatus_t now includes the bae address of the task's stack.
\r
527 + Added the vTaskGetTaskInfo() API function, which returns a TaskStatus_t
\r
528 structure that contains information about a single task. Previously this
\r
529 information could only be obtained for all the tasks at once, as an array
\r
530 of TaskStatus_t structures.
\r
531 + Added the uxSemaphoreGetCount() API function.
\r
532 + Replicate previous Cortex-M4F and Cortex-M7 optimisations in some
\r
533 Cortex-M3 port layers.
\r
535 Demo Application Updates:
\r
537 Further demo applications will be added prior to the final FreeRTOS V9
\r
540 + Updated SAM4L Atmel Studio project to use Atmel Studio 7.
\r
541 + Added ARM Cortex-A53 64-bit port.
\r
542 + Added a port and demo for the ARM Cortex-A53 64-bit cores on the Xilinx
\r
544 + Added Cortex-M7 SAME70 GCC demo.
\r
545 + Added EFM32 Giant and Wonder Gecko demos.
\r
548 Changes between V8.2.2 and V8.2.3 released October 16, 2015
\r
550 RTOS kernel updates:
\r
552 + Fix bug identified in a modification made in V8.2.2 to the software timer
\r
553 code that allows tickless low power applications to sleep indefinitely
\r
554 when software timers are used.
\r
555 + Simplify and improve efficiency of stack overflow checking.
\r
556 + Add xTaskNotifyStateClear() API function.
\r
557 + New IAR and GCC Cortex-R ports for microprocessors that do not use an ARM
\r
558 generic interrupt controller (GIC).
\r
559 + New PIC32MEC14xx port.
\r
560 + Add support for PIC32MZ EF parts (with floating point) into the PIC32MZ
\r
562 + Zynq7000 port layer now declares the functions that setup and clear the
\r
563 tick interrupt as weak symbols so they can be overridden by the
\r
564 application, and uses a global XScuGic object so the same object can be
\r
565 used by the application code.
\r
566 + Introduced configUSE_TASK_FPU_SUPPORT, although the PIC32MZ EF port is
\r
567 currently the only port that uses it.
\r
568 + Updates to RL78 and 78K0 IAR port layers to improve support for
\r
569 combinations of memory models.
\r
570 + Minor updates to heap_5.c to remove compiler warnings generated by some
\r
572 + License simplifications. See /FreeRTOS/License/license.txt in the
\r
573 official distribution.
\r
577 + Update directory names to use WolfSSL instead of CyaSSL, inline with
\r
578 WolfSSL's re-branding.
\r
579 + Update to latest WolfSSL code.
\r
580 + Update to latest FreeRTOS+Trace recorder code.
\r
581 + Add in the FreeRTOS+Trace recorder library required for streaming trace.
\r
583 Demo application changes:
\r
585 + Add demo applications for Renesas RZ/T (Cortex-R), PIC32MZ EF (PIC32 with
\r
586 floating point hardware), PIC32MEC14xx, RX71M, RX113 and RX231.
\r
587 + General tidy up of spelling and compiler warnings.
\r
590 Changes between V8.2.1 and V8.2.2 released August 12, 2015
\r
592 RTOS kernel updates:
\r
594 + Added Intel IA32/x86 32-bit port.
\r
595 + General maintenance.
\r
596 + PRIVILEGED_FUNCTION and PRIVILEGED_DATA macros, which are used in memory
\r
597 protected systems, have been added to the newer event group and software
\r
599 + Add the errno definitions used by FreeRTOS+ components into projdefs.h.
\r
600 + Remove the restriction that prevented tick-less idle implementations
\r
601 waiting indefinitely when software timers were used in the same
\r
603 + Introduce xTaskNotifyAndQueryFromISR() as the interrupt safe version of
\r
604 xTaskNotifyAndQuery().
\r
605 + Add additional NOPs to the MSP430X port layers to ensure strict compliance
\r
606 with the hardware documentation.
\r
607 + Microblaze port: Added option for port optimised task selection.
\r
608 + Microblaze port: Previously tasks inherited the exception enable state
\r
609 at the time the task was created. Now all tasks are created with
\r
610 exceptions enabled if the Microblaze design supports exceptions.
\r
611 + Windows port: Add additional safe guards to ensure the correct start up
\r
612 sequence and thread switching timing.
\r
613 + Windows port: Improve the implementation of the port optimised task
\r
614 selection assembly code.
\r
615 + Update heap_4 and heap_5 to allow use on 64-bit processors.
\r
616 + Simplify the code that creates a queue.
\r
617 + General improved tick-less idle behaviour.
\r
618 + Ensure none of the variables in the common kernel files are initialised to
\r
619 anything other than zero.
\r
620 + Correct calculation of xHeapStructSize in heap_4 and heap_5.
\r
622 Demo application updates:
\r
624 + Added demo project for the new IA32/x86 port that targets the Galileo
\r
626 + Added MSP430FR5969 demos (previously provided as a separate download).
\r
627 + Added FreeRTOS BSP repository for automatic creation of FreeRTOS
\r
628 applications in the Xilinx SDK.
\r
629 + Added Atmel Studio / GCC project for the SAMV71 (ARM Cortex-M7)
\r
630 + Update Xilinx SDK projects to use version 2015.2 of the SDK.
\r
631 + Remove Microblaze demos that were using obsolete tools.
\r
632 + Add MSP43FR5969 IAR and CCS demos.
\r
636 + Updated FreeRTOS+Trace recorder library, which requires an update to the
\r
637 FreeRTOS+Trace application.
\r
638 + Added Reliance Edge source code and demo application. Reliance edge is
\r
639 a fail safe transactional file system ideal for applications that require
\r
640 file storage, and especially when high reliability is essential.
\r
641 + Introduce configAPPLICATION_PROVIDES_cOutputBuffer to allow FreeRTOS+CLI
\r
642 users to place the output buffer at a fixed memory address.
\r
643 + Improve the NetworkInterface.c file provided for the Windows port of
\r
646 Changes between V8.2.0 and V8.2.1 released 24th March 2015.
\r
648 RTOS kernel updates:
\r
650 + Added user definable and flexible thread local storage facility.
\r
651 + Added vTimerSetTimerID() API function to complement the pvTimerGetTimerID()
\r
652 function to allow the timer's ID to be used as timer local storage.
\r
653 + Fixed a potential issue related to the use of queue sets from an ISR.
\r
654 + Some updates to the Xilinx Microblaze GCC port.
\r
655 + Added ARM Cortex-M4F port for Texas Instruments Code Composer Studio.
\r
656 + Added ARM Cortex-M7 r0p1 port layer for IAR, GCC and Keil which contains a
\r
657 minor errata work around. All other ARM Cortex-M7 core revisions should
\r
658 use the ARM Cortex-M4F port.
\r
659 + Exclude the whole of croutine.c if configUSE_CO_ROUTINES is set to 0.
\r
660 + Change some data types from uint32_t to size_t in preparation for 64-bit
\r
662 + Update the PIC32 port to remove deprecation warnings output by the latest
\r
664 + Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to
\r
665 overwrite items in two queues that are part of the same set.
\r
667 Demo application updates:
\r
669 + Added demo application for TI's ARM Cortex-M4F based MSP432
\r
670 microcontroller using IAR, Keil and CCS compilers.
\r
671 + Added demo application for STM32F ARM Cortex-M7 based microcontroller
\r
672 using IAR and Keil.
\r
673 + Added demo application for Atmel SAMV71 ARM Cortex-M7 based
\r
674 microcontroller using IAR and Keil.
\r
675 + Added Microblaze demo that uses the 2014.4 version of the Xilinx SDK and
\r
676 runs on the KC705 evaluation board (Kintex FPGA).
\r
678 Changes between V8.1.2 and V8.2.0 released 16th January 2015
\r
680 Changes between release candidate 1 and the official release are restricted
\r
681 to maintenance only.
\r
683 Significant RTOS kernel updates:
\r
685 + MAJOR NEW FEATURE! Task notifications. Please see the following URL for
\r
686 details: https://www.FreeRTOS.org/RTOS-task-notifications.html
\r
687 + NEW HEADER FILE REQUIRED! Obsolete definitions have been separated into
\r
688 a new header file called FreeRTOS/Source/include/deprecated_definitions.h.
\r
689 This header file must be present to build. Note some of the obsolete
\r
690 definitions are still used by very old demo application projects.
\r
692 Other RTOS kernel updates:
\r
694 + Made xSemaphoreGiveFromISR() a function rather than a macro that calls
\r
695 xQueueGenericSendFromISR(). This allows for major performance
\r
696 enhancements at the expense of some additional code size if both functions
\r
697 are used in the same application. NOTE: In most uses cases such use of
\r
698 a semaphore can now be replaced with a task notification which is smaller
\r
700 + The TCB is now always allocated such that the task's stack grows away from
\r
701 the TCB (improves debugging of stack overflows as the overflow will not
\r
702 overwrite the task's name).
\r
703 + GCC, IAR and Keil Cortex-M4F ports now use more inlining (performance
\r
704 enhancements at the cost of a little additional code space).
\r
705 + Queues are now allocated with a single call to pvPortMalloc() which
\r
706 allocates both the queue structure and the queue storage area.
\r
707 + Introduced a new critical section macro for reading the tick count that
\r
708 defines away to nothing in cases where the width of the tick allows the
\r
709 tick count to be read atomically (performance benefits - especially when
\r
710 optimisation is on).
\r
711 + Introduced configAPPLICATION_ALLOCATED_HEAP in heap_4.c to allow the
\r
712 application writer to provide their own heap array - and in so doing
\r
713 control the location of the heap.
\r
714 + Introduced configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES which, when set, will
\r
715 include known values in both list and list item structures. The values
\r
716 are intended to assist debugging. If the values get overwritten then it
\r
717 is likely application code has written over RAM used by the kernel.
\r
718 + configASSERT()s in all Cortex-M ports used to test the lowest 5 bits of
\r
719 the interrupt control register to detect taskENTER_CRITICAL() being called
\r
720 from an interrupt. This has been changed to test all 8 bits.
\r
721 + Introduced uxTaskPriorityGetFromISR().
\r
722 + Microblze V8 port now tests XPAR_MICROBLAZE_0_USE_FPU for inequality to 0
\r
723 rather than equality to 1, and 2 and 3 are also valid values.
\r
724 + Cortex-A5 GIC-less port no longer passes the address of the interrupting
\r
725 peripheral into the interrupt handler.
\r
726 + Fix an issue in FreeRTOS-MPU where an attempt was made to free the stack
\r
727 belonging to a task when the task was deleted, even when the stack was
\r
728 allocated statically.
\r
729 + Utility (helper) functions that format task statistic information into
\r
730 human readable tables now pad task names with spaces to ensure columns
\r
731 line up correctly even where task name lengths vary greatly.
\r
732 + Update FreeRTOS+Trace recorder library to version 2.7.0.
\r
734 Demo application updates:
\r
736 + Added two new standard demo task sets: IntSemTest and TaskNotify.
\r
737 + Added port and demo application for Atmel SAMA5D4 Cortex-A5 MPU.
\r
738 + Added demo application for Altera Cyclone V Cortex-A9 MPU.
\r
739 + Updated Zynq demo to use version 2014.4 of Xilinx's SDK and added in
\r
740 demo tasks for new RTOS features.
\r
741 + Updated Atmel SAM4E and SAM4S demos to include a lot of additional test
\r
743 + Fixed a corner case issue in Atmel SAM4L low power tickless
\r
744 implementation, and added button interrupt handling.
\r
745 + Make the interrupt queue tests more tolerant to heave CPU loads.
\r
746 + Updated MSVC FreeRTOS simulator demo to include the latest standard test
\r
748 + Updated MingW/Eclipse FreeRTOS simulator demo to match the FreeRTOS MSVC
\r
750 + Updated all demos that use FreeRTOS+Trace to work with the latest trace
\r
754 Changes between V8.1.1 and V8.1.2 released September 2nd 2014
\r
756 Move the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into the
\r
757 individual port layers where necessary so it does not affect ports that do
\r
758 not support the definition.
\r
760 Changes between V8.1.0 and V8.1.1 released August 29th 2014
\r
762 By popular requests - a minor patch to V8.1.0 to re-instate the ability to
\r
763 give a mutex type semaphore (with priority inheritance) from an interrupt
\r
766 Changes between V8.0.1 and V8.1.0 released August 26th 2014
\r
768 FreeRTOS scheduler, kernel, demo and test updates:
\r
770 + Improved the priority inheritance algorithms to assist integration with
\r
771 off the shelf middleware that may hold multiple mutexes simultaneously.
\r
772 + Introduce heap_5.c, which is similar to heap_4.c but allows the heap to
\r
773 span multiple non-contiguous memory regions.
\r
774 + Updated all Cortex-A9 ports to help trap a couple of common usage errors -
\r
775 the first being when a task incorrectly attempts to exit its implementing
\r
776 function and the second being when a non interrupt safe API function is
\r
777 called from an interrupt.
\r
778 + Update all Cortex-A9 ports to remove obsolete mode switches prior to
\r
779 restoring a task context.
\r
780 + configUSE_PORT_OPTIMISED_TASK_SELECTION now defaults to 1 instead of 0.
\r
781 + Update all Cortex-M3/4F ports to trap a non interrupt safe API function
\r
782 being called from an interrupt handler.
\r
783 + Simplify the alignment checks in heap_4.c.
\r
784 + Update the MSVC Windows simulator demo to use heap_5.c in place of
\r
785 heap_4.c to ensure end users have an example to refer to.
\r
786 + Updated standard demo test code to test the new priority inheritance
\r
788 + Updated the standard demo tasks to make use of stdint and the FreeRTOS
\r
789 specific typedefs that were introduced in FreeRTOS V8.0.0.
\r
790 + Introduce the pdMS_TO_TICKS() macro as a more user friendly and intuitive
\r
791 alternative to pdTICKS_PER_MS - both of which can be used to convert a
\r
792 time specified in milliseconds to a time specified in RTOS ticks.
\r
793 + Fix a bug in the Tasking compiler's Cortex-M port that resulted in an
\r
794 incorrect value being written to the basepri register. This only effects
\r
795 users of the Tasking compiler.
\r
796 + Update the Zynq demo to use version 2014.2 of the SDK and add in an lwIP
\r
797 example that demonstrates lwIP being used with both its raw and sockets
\r
799 + Updated the CCS Cortex-R4 port to enable it to be built with the latest
\r
802 New ports and demo applications:
\r
804 + Two Renesas RX64M ports (RXv2 core) and demos introduced, one for the GCC
\r
805 compiler and one for the Renesas compiler. Both demos use e2 studio.
\r
806 + Generic IAR Cortex-A5 port (without any reliance on a GIC) introduced.
\r
807 The new port is demonstrated on an Atmel SAMA5D3 XPlained board.
\r
809 FreeRTOS+ component updates:
\r
811 + Update CyaSSL to the latest version.
\r
812 + Updated the FreeRTOS+ components supplied directly by Real Time Engineers
\r
813 Ltd. to make use of stdint and the FreeRTOS specific typedefs that were
\r
814 introduced in FreeRTOS V8.0.0.
\r
815 + Rework and simplify the FreeRTOS+FAT SL RAM disk driver.
\r
817 Miscellaneous updates and maintenance:
\r
819 + Update the IAR and DS-5/ARM RZ demos to target the official RZ RSK
\r
820 hardware in place of the previously targeted Renesas internal (not
\r
821 publicly available) hardware.
\r
822 + Various other maintenance tasks.
\r
825 Changes between V8.0.0 and V8.0.1 released 2nd May 2014
\r
827 + Minor fixes to the event group functionality that was released in V8.0.0.
\r
828 The 'clear bits from ISR' functionality is now implemented using a
\r
829 deferred interrupt callback instead of a function, and the 'wait bits' and
\r
830 'task sync' functions now correctly clear internal control bits before
\r
831 returning a value in every possible path through the respective functions.
\r
832 + Ensure the updating of internal control data is protected by a critical
\r
833 section after a task is deleted or suspended.
\r
834 + Minor fixes to FreeRTOS+FAT SL - namely seeking beyond the end of a file
\r
835 when the offset was not a multiple of the sector size.
\r
836 + Ensure Cortex-A9 system registers are only ever accessed as 32-bit values,
\r
837 even when only the lest significant byte of the register is implemented.
\r
841 + Updated the XMC4200 IAR project so it links with version 7.x of the IAR
\r
843 + Add RL78L1C demo.
\r
844 + Add pcTimerGetName() API function.
\r
845 + Call _reclaim_reent() when a task is deleted if configUSE_NEWLIB_REENTRANT
\r
848 Changes between V7.6.0 and V8.0.0 released 19th Feb 2014
\r
850 https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html
\r
852 FreeRTOS V8.x.x is a drop-in compatible replacement for FreeRTOS V7.x.x,
\r
853 although a change to the type used to reference character strings may result
\r
854 in application code generating a few (easily clearable) compiler warnings
\r
855 after the upgrade, and an updated typedef naming convention means use of the
\r
856 old typedef names is now discouraged.
\r
857 See https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html for full
\r
860 New features and functionality:
\r
862 + Event groups - see https://www.FreeRTOS.org/FreeRTOS-Event-Groups.html
\r
863 + Centralised deferred interrupt processing - see
\r
864 https://www.FreeRTOS.org/xTimerPendFunctionCallFromISR.html
\r
868 + Previously, when a task left the Blocked state, a context switch was
\r
869 performed if the priority of the unblocked task was greater than or equal
\r
870 to the priority of the Running task. Now a context switch is only
\r
871 performed if the priority of the unblocked task is greater than the
\r
872 priority of the Running task.
\r
873 + New low power tickless demonstration project that targets the ST STM32L
\r
874 microcontroller - see
\r
875 https://www.FreeRTOS.org/STM32L-discovery-low-power-tickless-RTOS-demo.html
\r
876 + Add xPortGetMinimumEverFreeHeapSize() to heap_4.c.
\r
877 + Small change to the tickless low power implementation on the SAM4L to
\r
878 ensure the alarm value (compare match value) cannot be set to zero when a
\r
879 tickless period is exited due to an interrupt originating from a source
\r
880 other than the RTOS tick.
\r
881 + Update the GCC/Eclipse Win32 simulator demo to make better use of Eclipse
\r
882 resource filters and match the functionality of the MSVC equivalent.
\r
883 + xTaskIsTaskSuspended() is no longer a public function. Use
\r
884 eTaskGetState() in its place.
\r
885 + Improved trace macros, including tracing of heap usage.
\r
886 + Remove one level of indirection when accepting interrupts on the PIC32MZ.
\r
887 + Add Cortex-A9 GCC port layer.
\r
888 + Add Xilinx Zynq demo application.
\r
891 Changes between V7.5.3 and V7.6.0 released 18th November 2013
\r
893 V7.6.0 changes some behaviour when the co-operative scheduler is used (when
\r
894 configUSE_PREEMPTION is set to 0). It is important to note that the
\r
895 behaviour of the pre-emptive scheduler is unchanged - the following
\r
896 description only applies when configUSE_PREEMPTION is set to 0:
\r
898 WHEN configUSE_PREEMPTION IS SET TO 0 (which is in a small minority of
\r
899 cases) a context switch will now only occur when a task places itself into
\r
900 the Blocked state, or explicitly calls taskYIELD(). This differs from
\r
901 previous versions, where a context switch would also occur when implicitly
\r
902 moving a higher priority task out of the Blocked state. For example,
\r
903 previously, WHEN PREEMPTION WAS TURNED OFF, if task A unblocks task B by
\r
904 writing to a queue, then the scheduler would switch to the higher priority
\r
905 task. Now, WHEN PREEMPTION IS TURNED OFF, if task A unblocks task B by
\r
906 writing to a queue, task B will not start running until task A enters the
\r
907 Blocked state or task A calls taskYIELD(). [If configUSE_PREEMPTION is not
\r
908 set to 0, so the normal pre-emptive scheduler is being used, then task B
\r
909 will start running immediately that it is moved out of the Blocked state].
\r
913 + Added a port layer and a demo project for the new PIC32MZ architecture.
\r
914 + Update the PIC32MX port layer to re-introduce some ehb instructions that
\r
915 were previously removed, add the ability to catch interrupt stack
\r
916 overflows (previously only task stack overflows were trapped), and also
\r
917 add the ability to catch an application task incorrectly attempting to
\r
918 return from its implementing function.
\r
919 + Make dramatic improvements to the performance of the Win32 simulator port
\r
921 + Ensure tasks that are blocked indefinitely report their state as Blocked
\r
922 instead of Suspended.
\r
923 + Slight improvement to the Cortex-M4F port layers where previously one
\r
924 register was inadvertently being saved twice.
\r
925 + Introduce the xSemaphoreCreateBinary() API function to ensure consistency
\r
926 in the semantics of how each semaphore type is created. It is no longer
\r
927 recommended to use vSemaphoreCreateBinary() (the version prefixed with a
\r
928 'v'), although it will remain in the code for backward compatibility.
\r
929 + Update the Cortex-M0 port layers to allow the scheduler to be started
\r
930 without using the SVC handler.
\r
931 + Added a build configuration to the PIC32MX MPLAB X demo project that
\r
932 targets the PIC32 USB II starter kit. Previously all the build
\r
933 configurations required the Explorer 16 hardware.
\r
934 + Some of the standard demo tasks have been updated to ensure they execute
\r
935 correctly with the updated co-operative scheduling behaviour.
\r
936 + Added comprehensive demo for the Atmel SAM4E, including use of
\r
937 FreeRTOS+UDP, FreeRTOS+FAT SL and FreeRTOS+CLI.
\r
941 + Minor maintenance on FreeRTOS+UDP.
\r
943 Changes between V7.5.2 and V7.5.3 released October 14 2013
\r
947 + Prior to V7.5.x yields requested from the tick hook would occur in the
\r
948 same tick interrupt - revert to that original behaviour.
\r
949 + New API function uxQueueSpacesAvailable().
\r
950 + Introduced the prvTaskExitError() function to Cortex-M0, Cortex-M3/4
\r
951 and Cortex-M4F ports. prvTaskExitError() is used to trap tasks that
\r
952 attempt to return from their implementing functions (tasks should call
\r
953 vTaskDelete( NULL ); if they want to exit).
\r
954 + The Cortex-M0 version of portSET_INTERRUPT_MASK_FROM_ISR and
\r
955 portCLEAR_INTERRUPT_MASK_FROM_ISR are now fully nestable.
\r
956 + Improved behaviour and robustness of the default Cortex-M tickless idle
\r
958 + Add workaround for silicon errata PMU_CM001 in Infineon XMC4000 devices to
\r
959 all Cortex-M4F ports.
\r
960 + Add Cortex-M0 port for Keil.
\r
961 + Updated Cortus port.
\r
962 + Ensure _impure_ptr is initialised before the scheduler is started.
\r
963 Previously it was not set until the first context switch.
\r
967 + Update FreeRTOS+UDP to V1.0.1 - including direct integration of the
\r
968 FreeRTOS+Nabto task, improvements to the DHCP behaviour, and a correction
\r
969 to the test that prevents the network event hook being called on the first
\r
970 network down event. The FreeRTOS+UDP change history is maintained
\r
972 + Correct the __NVIC_PRIO_BITS setting in the LPC18xx.h header files
\r
973 provided in the NXP CMSIS library, then update the interrupts used by the
\r
974 LPC18xx demos accordingly.
\r
975 + Replace double quotes (") with single quotes (') in FreeRTOS+CLI help
\r
976 strings to ensure the strings can be used with the JSON descriptions used
\r
977 in the FreeRTOS+Nabto demos.
\r
979 Demo and miscellaneous changes:
\r
981 + Added demo for the Atmel SAMD20 Cortex-M0+. The demo includes
\r
983 + Added a demo for the Infineon Cortex-M0 that can be built with the IAR
\r
984 Keil and GCC tools.
\r
985 + Updated the Infineon XMC4000 demos for IAR, Keil, GCC and Tasking tools,
\r
986 with additional build configurations to directly support the XMC4200 and
\r
987 XMC4400 devices, in addition to the previously supported XMC4500.
\r
988 + Updated the demo application.
\r
989 + Added additional trace macros traceMALLOC and traceFREE to track heap
\r
992 Changes between V7.5.0 and V7.5.2 released July 24 2013
\r
994 V7.5.2 makes the new Cortex-M vPortCheckInterruptPriority() function
\r
995 compatible with the STM32 standard peripheral driver library, and adds
\r
996 an extra critical section to the default low power tickless mode
\r
997 implementation. Only users of the STM32 peripheral library or the default
\r
998 tickless implementation need update from version 7.5.0.
\r
1000 Changes between V7.4.2 and V7.5.0 released July 19 2013
\r
1002 V7.5.0 is a major upgrade that includes multiple scheduling and efficiency
\r
1003 improvements, and some new API functions.
\r
1005 Compatibility information for FreeRTOS users:
\r
1006 FreeRTOS V7.5.0 is backward compatible with FreeRTOS V7.4.0 with one
\r
1007 exception; the vTaskList() and vTaskGetRunTimeStats() functions are now
\r
1008 considered legacy, having been replaced by the single uxTaskGetSystemState()
\r
1009 function. configUSE_STATS_FORMATTING_FUNCTIONS must be set to 1 in
\r
1010 FreeRTOSConfig.h for vTaskList() and vTaskGetRunTimeStats() to be
\r
1013 Compatibility information for FreeRTOS port writers:
\r
1014 vTaskIncrementTick() is now called xTaskIncrementTick() (because it now
\r
1019 + Multiple scheduling and efficiency improvements.
\r
1020 + Core kernel files now pass PC-Lint V8 static checking without outputting
\r
1021 any warnings (information on the test conditions will follow).
\r
1023 New API functions:
\r
1025 + uxTaskGetSystemState() https://www.FreeRTOS.org/uxTaskGetSystemState.html
\r
1026 + xQueueOverwrite() https://www.FreeRTOS.org/xQueueOverwrite.html
\r
1027 + xQueueOverwriteFromISR()
\r
1028 + xQueuePeekFromISR()
\r
1030 The following ports and demos, which were previously available separately,
\r
1031 are now incorporated into the main FreeRTOS zip file download:
\r
1033 + ARM Cortex-A9 IAR
\r
1034 + ARM Cortex-A9 ARM compiler
\r
1036 + Microsemi SmartFusion2
\r
1038 New FreeRTOSConfig.h settings
\r
1039 https://freertos.org/a00110.html
\r
1041 + configUSE_TIME_SLICING
\r
1042 + configUSE_NEWLIB_REENTRANT
\r
1043 + configUSE_STATS_FORMATTING_FUNCTIONS
\r
1044 + configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
\r
1048 + (MPU port only) The configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
\r
1049 options provides a mechanism that allows application writers to execute
\r
1050 certain functions in privileged mode even when a task is running in user
\r
1052 + Ports that support interrupt nesting now include a configASSERT() that
\r
1053 will trigger if an interrupt safe FreeRTOS function is called from an
\r
1054 interrupt that has a priority designated as above the maximum system/API
\r
1055 call interrupt priority.
\r
1056 + The included FreeRTOS+Trace recorder code has been updated to the latest
\r
1057 version, and the demo applications that use the trace recorder code have
\r
1058 been updated accordingly.
\r
1059 + The FreeRTOS Windows Simulator (MSVC version only) has been updated to
\r
1060 include a new basic 'blinky' build option in addition to the original
\r
1061 comprehensive build option.
\r
1062 + Improve RAM usage efficiency of heap_4.c and heap_2.c.
\r
1063 + Prevent heap_4.c from attempting to free memory blocks that were not
\r
1064 allocated by heap_4.c, or have already been freed.
\r
1065 + As FreeRTOS now comes with FreeRTOS+FAT SL (donated by HCC) the Chan FATfs
\r
1066 files have been removed from FreeRTOS/Demo/Common.
\r
1067 + Fix build error when R4 port is build in co-operative mode.
\r
1068 + Multiple port and demo application maintenance activities.
\r
1070 Changes between V7.4.1 and V7.4.2 released May 1 2013
\r
1072 NOTE: There are no changes in the FreeRTOS kernel between V7.4.1 and V7.4.2
\r
1074 + Added FreeRTOS+FAT SL source code and demo project. The demo project
\r
1075 runs in the FreeRTOS Windows simulator for easy and hardware independent
\r
1076 experimentation and evaluation. See https://www.FreeRTOS.org/fat_sl
\r
1078 Changes between V7.4.0 and V7.4.1 released April 18 2013
\r
1080 + To ensure strict conformance with the spec and ensure compatibility with
\r
1081 future chips data and instruction barrier instructions have been added to
\r
1082 the yield macros of Cortex-M and Cortex-R port layers. For efficiency
\r
1083 the Cortex-M port layer "yield" and "yield" from ISR are now implemented
\r
1084 separately as the barrier instructions are not required in the ISR case.
\r
1085 + Added FreeRTOS+UDP into main download.
\r
1086 + Reorganised the FreeRTOS+ directory so it now matches the FreeRTOS
\r
1087 directory with Source and Demo subdirectories.
\r
1088 + Implemented the Berkeley sockets select() function in FreeRTOS+UDP.
\r
1089 + Changed (unsigned) casting in calls to standard library functions with
\r
1091 + Added the Atmel SAM4L and Renesas RX100 demos that demonstrates the
\r
1092 tickless (tick suppression) low power FreeRTOS features.
\r
1093 + Add a new RL78 IAR demo that targets numerous new RL78 chips and
\r
1094 evaluation boards.
\r
1095 + Adjusted stack alignment on RX200 ports to ensure an assert was not
\r
1096 falsely triggered when configASSERT() is defined.
\r
1097 + Updated the Cortex_M4F_Infineon_XMC4500_IAR demo to build with the latest
\r
1099 + Corrected header comments in the het.c and het.h files (RM48/TMS570 demo).
\r
1102 Changes between V7.3.0 and V7.4.0 released February 20 2013
\r
1104 + New feature: Queue sets. See:
\r
1105 https://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html
\r
1106 + Overhauled the default tickless idle mode implementation provided with the
\r
1107 ARM Cortex-M3 port layers.
\r
1108 + Enhanced tickless support in the core kernel code with the introduction of
\r
1109 the configEXPECTED_IDLE_TIME_BEFORE_SLEEP macro and the
\r
1110 eTaskConfirmSleepModeStatus() function.
\r
1111 + Added the QueueSet.c common demo/test file. Several demo applications
\r
1112 have been updated to use the new demo/test tasks.
\r
1113 + Removed reliance on the PLIB libraries from the MPLAB PIC32 port layer and
\r
1114 demo applications.
\r
1115 + Added the FreeRTOS+Trace recorder code to the MSVC Win32 demo.
\r
1116 + Renamed eTaskStateGet() to eTaskGetState() for consistency, and added a
\r
1117 pre-processor macro for backward compatibility with the previous name.
\r
1118 + Updated functions implemented in the core queue.c source file to allow
\r
1119 queue.h to be included from the .c file directly (this prevents compiler
\r
1120 warnings that were generated by some compilers).
\r
1121 + Updated the CCS Cortex-R4 port layer to replace the CLZ assembler function
\r
1122 with the CLZ compiler intrinsic that is provided by the latest versions of
\r
1123 the CCS ARM compiler.
\r
1124 + Updated all heap_x.c implementations to replace the structure that was
\r
1125 used to ensure the start of the heap was aligned with a more portable
\r
1126 direct C code implementation.
\r
1127 + Added support for PIC24 devices that include EDS.
\r
1128 + Minor optimisations to the PIC32 port layer.
\r
1129 + Minor changes to tasks.c that allow the state viewer plug-ins to display
\r
1130 additional information.
\r
1131 + Bug fix: Update prvProcessReceivedCommands() in timers.c to remove an
\r
1132 issue that could occur if the priority of the timer daemon task was set
\r
1133 below the priority of tasks that used timer services.
\r
1134 + Update the FreeRTOS+Trace recorder code to the latest version.
\r
1136 Changes between V7.2.0 and V7.3.0 released October 31 2012
\r
1138 + Added ability to override the default scheduler task selection mechanism
\r
1139 with implementations that make use of architecture specific instructions.
\r
1140 + Added ability to suppress tick interrupts during idle time, and in so
\r
1141 doing, provide the ability to make use of architecture specific low power
\r
1143 + Added the portSUPPRESS_TICKS_AND_SLEEP() macro and vTaskStepTick() helper
\r
1145 + Added the configSYSTICK_CLOCK_HZ configuration constant.
\r
1146 + Reworked the Cortex-M3 and Cortex-M4F port layers for GCC, Keil and IAR to
\r
1147 directly support basic power saving functionality.
\r
1148 + Added hooks to allow basic power saving to be augmented in the application
\r
1149 by making use of chip specific functionality.
\r
1150 + Minor change to allow mutex type semaphores to be used from interrupts
\r
1151 (which would not be a normal usage model for a mutex).
\r
1152 + Change the behaviour of the interrupt safe interrupt mask save and restore
\r
1153 macros in the Cortex-M ports. The save macro now returns the previous
\r
1154 mask value. The restore macro now uses the previous mask value. These
\r
1155 changes are not necessary for the kernel's own implementation, and are
\r
1156 made purely because the macros were being used by application writers.
\r
1157 + Added eTaskStateGet() API function.
\r
1158 + Added port specific optimisations to the PIC32 port layer, and updated the
\r
1159 PIC32 demo applications to make use of this new feature.
\r
1160 + Added port specific optimisations to the Win32 simulator port.
\r
1161 + Added new ports and demo applications for the TI Hercules RM48 and TMS570
\r
1162 safety microcontrollers.
\r
1163 + Added SAM3 demos targeting the ATSAM3S-EK2 and ATSAM3X-EK evaluation
\r
1165 + Updated the PIC32 MPLAB X project to manually set the compiler include
\r
1166 paths instead of using the IDE entry box following reports that the
\r
1167 include paths were somehow being deleted.
\r
1168 + Improved character handling in FreeRTOS+CLI.
\r
1170 Changes between V7.1.1 and V7.2.0 released 14 August 2012
\r
1172 FreeRTOS V7.2.0 is backward compatible with FreeRTOS V7.1.2.
\r
1174 + Added a FreeRTOS+ sub-directory. The directory contains some FreeRTOS+
\r
1175 source code, and example projects that use the FreeRTOS Win32 simulator.
\r
1176 + Added a new example heap allocation implementation (heap_4.c) that
\r
1177 includes memory block coalescence.
\r
1178 + Added a demo that targets the Atmel SAM4S Cortex-M4 based microcontroller.
\r
1179 The demo is preconfigured to build using the free Atmel Studio 6 IDE and
\r
1181 + Added xSemaphoreTakeFromISR() implementation.
\r
1182 + The last parameter in ISR safe FreeRTOS queue and semaphore functions
\r
1183 (xHigherPriorityTaskWoken) is now optional and can be set to NULL if it
\r
1185 + Update the IAR and MSP430X ports to clear all lower power mode bits before
\r
1186 exiting the tick interrupt [bug fix].
\r
1187 + Allow xQueueReset() to be used, even when the queues event lists are not
\r
1189 + Added a vQueueDelete() handler for the FreeRTOS MPU port (this was
\r
1190 previously missing).
\r
1191 + Updated the vPortSVCHandler() functions in the FreeRTOS MPU port layer to
\r
1192 ensure it compiles with the latest ARM GCC compilers from Linaro.
\r
1193 + Updated the prvReadGP() function in the NIOS II port to ensure the compiler
\r
1194 can choose any register for the functions parameter (required at high
\r
1195 compiler optimisation levels).
\r
1196 + Add #error macros into the Keil and IAR Cortex-M ports to ensure they
\r
1197 cannot be built if the user has set configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
1199 + Added comments in the FreeRTOSConfig.h files associated with Cortex-M3 and
\r
1200 Cortex-M4 demos stating that the configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
1201 parameter must not be set to 0.
\r
1202 + Introduce new INCLUDE_xQueueGetMutexHolder configuration constant
\r
1204 + Added two new list handling macros - for internal use only in upcoming new
\r
1206 + Removed all mention of the legacy vTaskStartTrace and ulTaskEndTrace
\r
1207 macros. FreeRTOS+Trace supersedes the legacy trace.
\r
1208 + Added a configASSERT() into the vPortFree() function in heap_1.c as it is
\r
1209 invalid for the function to be called.
\r
1210 + Made the xRxLock and xTxLock members of the queue structure volatile.
\r
1211 This is probably not necessary, and is included as a precautionary
\r
1213 + Modify the assert() that checks to see if the priority passed into an
\r
1214 xTaskCreate() function is within valid bounds to permit the assert to be
\r
1215 used in the FreeRTOS MPU port.
\r
1216 + The software timer service (daemon) task is now created in a way that
\r
1217 to ensure compatibility with FreeRTOS MPU.
\r
1219 Changes between V7.1.0 and V7.1.1 released May 1 2012
\r
1223 The following ports are brand new:
\r
1224 + Cortex-M3 Tasking
\r
1226 The following ports have been available as separate downloads for a number
\r
1227 of months, but are now included in the main FreeRTOS download.
\r
1230 + Cortex-M4F GCC (with full floating point support)
\r
1235 The following demos are brand new:
\r
1236 + Renesas RX63N RDK (Renesas compiler)
\r
1238 The following demos have been available as separate downloads for a number
\r
1239 of months, but are now included in the main FreeRTOS download.
\r
1240 + NXP LPC1114 GCC/LPCXpresso
\r
1241 + ST STM32F0518 IAR
\r
1242 + Infineon XMC4500 GCC/Atollic
\r
1243 + Infineon XMC4500 IAR
\r
1244 + Infineon XMC4500 Keil
\r
1245 + Infineon XMC4500 Tasking
\r
1248 Kernel miscellaneous / maintenance:
\r
1250 + Introduced the portSETUP_TCB() macro to remove the requirement for the
\r
1251 Windows simulator to use the traceTASK_CREATE() macro, leaving the trace
\r
1252 macro available for use by FreeRTOS+Trace (https://www.FreeRTOS.org/trace).
\r
1253 + Added a new trace macro, traceMOVE_TASK_TO_READY_STATE(), to allow future
\r
1254 FreeRTOS+Trace versions to provide even more information to users.
\r
1255 + Updated the FreeRTOS MPU port to be correct for changes that were
\r
1256 introduced in FreeRTOS V7.1.0.
\r
1257 + Introduced the xQueueReset() API function.
\r
1258 + Introduced the xSemaphoreGetMutexHolder() API function.
\r
1259 + Tidy up various port implementations to add the static key word where
\r
1260 appropriate, and remove obsolete code.
\r
1261 + Slight change to the initial stack frame given to the RX600 ports to allow
\r
1262 them to be used in the Eclipse based E2Studio IDE without confusing GDB.
\r
1263 + Correct the alignment given to the initial stack of Cortex-M4F tasks.
\r
1264 + Added a NOP following each DINT instruction on MSP430 devices for strict
\r
1265 conformance with the instructions on using DINT.
\r
1266 + Changed the implementation of thread deletes in the Win32 port to prevent
\r
1267 the port making use of the traceTASK_DELETE() trace macros - leaving this
\r
1268 macro free for use by FreeRTOS+Trace.
\r
1269 + Made some benign changes to the RX600 Renesas compiler port layer to
\r
1270 ensure the code can be built to a library without essential code being
\r
1271 removed by the linker.
\r
1272 + Reverted the change in the name of the uxTaskNumber variable made in
\r
1273 V7.1.0 as it broke the IAR plug-in.
\r
1276 Demo miscellaneous / maintenance:
\r
1278 + The command interpreter has now been formally released as FreeRTOS+CLI,
\r
1279 and been moved out of the main FreeRTOS download, to instead be available
\r
1280 from the FreeRTOS+ Ecosystem site https://www.FreeRTOS.org/plus.
\r
1281 + flash_timer.c/h has been added to the list of standard demo tasks. This
\r
1282 performs the same functionality as the flash.c tasks, but using software
\r
1283 timers in place of tasks.
\r
1284 + Upgraded the PIC32 demo as follows: Changes to how the library functions
\r
1285 are called necessitated by the new compiler version, addition of MPLAB X
\r
1286 project with PIC32MX360, PIC32MX460 and PIC32MX795 configurations,
\r
1287 addition of simply blinky demo, updated FreeRTOSConfig.h to include more
\r
1288 parameters, addition of hook function stubs.
\r
1289 + The MSP430X IAR and CCS demos have been updated to ensure the power
\r
1290 settings are correct for the configured CPU frequency.
\r
1291 + Rowley CrossWorks projects have been updated to correct the "multiple
\r
1292 definition of ..." warnings introduced when the toolchain was updated.
\r
1293 + Updated various FreeRTOSConfig.h header files associated with projects
\r
1294 that build with Eclipse to include a #error statement informing the user
\r
1295 that the CreateProjectDirectoryStructure.bat batch file needs to be
\r
1296 executed before the projects can be opened.
\r
1297 + Renamed directories that included "CCS4" in their name to remove the '4'
\r
1298 and instead just be "CCS". This is because the demo was updated and
\r
1299 tested to also work with later Code Composer Studio versions.
\r
1300 + Updated the TCP/IP periodic timer frequency in numerous uIP demos to be
\r
1301 50ms instead of 500ms.
\r
1303 Changes between V7.0.2 and V7.1.0 released December 13 2011
\r
1307 + Cortex-M4F IAR port.
\r
1308 + Cortex-M4F Keil/RVDS port.
\r
1309 + TriCore GCC port.
\r
1313 + NXP LPC4350 using the Keil MDK, and demonstrated on a Hitex development
\r
1315 + ST STM32F407 using the IAR Embedded Workbench for ARM, and demonstrated on
\r
1316 the IAR STM32F407ZG-SK starter kit.
\r
1317 + Infineon TriCore TC1782, using the GCC compiler, demonstrated on the
\r
1318 TriBoard TC1782 evaluation board.
\r
1319 + Renesas RX630, using the Renesas compiler and HEW, demonstrated on an
\r
1320 RX630 RSK (Renesas Starter Kit).
\r
1322 Miscellaneous / maintenance:
\r
1324 + Removed all calls to printf() from the K60/IAR Kinetis demo so the project
\r
1325 can execute stand alone - without being connected to the debugger.
\r
1326 + Completed the command interpreter framework. Command handlers now receive
\r
1327 the entire command string, giving them direct access to parameters.
\r
1328 Utility functions are provided to check the number of parameters, and
\r
1329 return parameter sub-strings.
\r
1330 + The previously documented fix for the bug in xTaskResumeFromISR() that
\r
1331 effected (only) ports supporting interrupt nesting has now been
\r
1332 incorporated into the main release.
\r
1333 + The portALIGNMENT_ASSERT_pxCurrentTCB() definition has been added to allow
\r
1334 specific ports to skip the second stack alignment check when a task is
\r
1335 created. This is because the second check is not appropriate for some
\r
1336 ports - including the new TriCore port where the checked pointer does not
\r
1337 actually point to a stack.
\r
1338 + The portCLEAN_UP_TCB() macro has been added to allow port specific clean
\r
1339 up when a task is deleted - again this is required by the TriCore port.
\r
1340 + Various other minor changes to ensure warning free builds on a growing
\r
1341 number of microcontroller and toolchain platforms. This includes a
\r
1342 (benign) correction to the prototype of the
\r
1343 vApplicationStackOverflowHook() definition found in lots of recent demos.
\r
1347 + The legacy trace mechanism has been completely removed - it has been
\r
1348 obsolete for the years since the trace macros were introduced. The
\r
1349 configuration constant configUSE_TRACE_FACILITY is now used to optionally
\r
1350 include additional queue and task information. The additional information
\r
1351 is intended to make the trace mechanism more generic, and allow the trace
\r
1352 output to provide more information. When configUSE_TRACE_FACILITY is set
\r
1354 - the queue structure includes an additional member to hold the queue
\r
1355 type, which can be base, mutex, counting semaphore, binary semaphore
\r
1356 or recursive mutex.
\r
1357 - the queue structure includes an additional member to hold a queue
\r
1358 number. A trace tool can set and query the queue number for its own
\r
1359 purposes. The kernel does not use the queue number itself.
\r
1360 - the TCB structure includes an additional member to hold a task number
\r
1361 number. A trace tool can set and query the task number for its own
\r
1362 purposes. The kernel does not use the task number itself.
\r
1363 + Queues and all types of semaphores are now automatically allocated their
\r
1364 type as they are created.
\r
1365 + Added two new trace macros - traceTASK_PRIORITY_INHERIT() and
\r
1366 traskTASK_PRIORITY_DISINHERIT().
\r
1367 + Updated the traceQUEUE_CREATE_FAILED() macro to take a parameter that
\r
1368 indicates the type of queue, mutex, or semaphore that failed to be
\r
1370 + The position from which traceCREATE_MUTEX() is called has been moved from
\r
1371 after the call to xQueueGenericSend() [within the same function] to before
\r
1372 the call. This ensures the trace events occur in the correct order.
\r
1373 + The value passed into tracePRIORITY_SET() has been corrected for the case
\r
1374 where vTaskPrioritySet() is called with a null parameter.
\r
1376 Changes between V7.0.1 and V7.0.2 released September 20 2011
\r
1380 + The official FreeRTOS Renesas RX200 port and demo application have been
\r
1381 incorporated into the main FreeRTOS zip file download.
\r
1382 + The official FreeRTOS Renesas RL78 port and demo application have been
\r
1383 incorporated into the main FreeRTOS zip file download.
\r
1384 + The official FreeRTOS Freescale Kinetis K60 tower demo application has
\r
1385 been incorporated into the main FreeRTOS zip file download. This includes
\r
1386 an embedded web server example.
\r
1387 + A new Microblaze V8 port layer has been created to replace the older, now
\r
1388 deprecated, port layer. The V8 port supports V8.x of the Microblaze IP,
\r
1389 including exceptions, caches, and the floating point unit. A new
\r
1390 Microblaze demo has also been added to demonstrate the new Microblaze V8
\r
1391 port layer. The demo application was created using V13.1 of the Xilinx
\r
1392 EDK, and includes a basic embedded web server that uses lwIP V1.4.0.
\r
1393 + The official FreeRTOS Fujitsu FM3 MB9A310 demo application has been
\r
1394 incorporated into the main FreeRTOS zip file download. Projects are
\r
1395 provided for both the IAR and Keil toolchains.
\r
1400 + xTaskGetIdleTaskHandle() has been added.
\r
1401 + xTaskGetTimerDaemonTaskHandle() has been added.
\r
1402 + pcTaskGetTaskName() has been added.
\r
1403 + vSemaphoreDelete() macro has been added to make it obvious how to delete
\r
1404 a semaphore. In previous versions vQueueDelete() had to be used.
\r
1405 + vTaskCleanUpResources() has been removed. It has been obsolete for a
\r
1407 + portPOINTER_SIZE_TYPE has been introduced to prevent compiler warnings
\r
1408 being generated when the size of a pointer does not match the size of
\r
1409 the stack type. This will (has already) be used in new ports, but will
\r
1410 not be retrofitted to existing ports until the existing port itself is
\r
1413 Other updates and news:
\r
1415 + The core files have all been modified to tighten the coding standard even
\r
1416 further. These are style, not functional changes.
\r
1417 + All ARM7 port layers have been slightly modified to prevent erroneous
\r
1418 assert() failures when tasks are created and configASSERT() is defined.
\r
1419 + All ARM IAR projects have been updated to build with the latest V6.2.x
\r
1420 versions of the IAR Embedded Workbench for ARM tools (EWARM). This was
\r
1421 necessary due to a change in the way EWARM uses the CMSIS libraries.
\r
1422 + The PIC32 port layer has been updated in preparation for V2 of the C32
\r
1424 + The old Virtex-4 Microblaze demo has been marked as deprecated. Please
\r
1425 use the brand new Spartan-6 port and demo in its place.
\r
1426 + The bones of a new generic command interpreter is located in
\r
1427 FreeRTOS/Demo/Common/Utils/CommandInterpreter.c. This is still a work in
\r
1428 progress, and not documented. It is however already in use. It will be
\r
1429 documented in full when the projects that are already using it are
\r
1431 + A couple of new standard demos have been included. First, a version of
\r
1432 flop.c called sp_flop.c. This is similar to flop.c, but uses single
\r
1433 precision floats in place of double precision doubles. This allows the
\r
1434 for testing ports to processors that have only single precision floating
\r
1435 point units, and revert to using emulated calculations whenever a double
\r
1436 is used. Second, comtest_strings.c has been included to allow the test
\r
1437 of UART drivers when an entire string is transmitted at once. The
\r
1438 previous comtest.c only used single character transmission and reception.
\r
1439 + lwIP V1.4.0 is now included in the FreeRTOS/Demo/Common directory, and
\r
1440 used by a couple of new demos.
\r
1442 Changes between V7.0.0 and V7.0.1 released May 13 2011
\r
1444 + Added a Fujitsu FM3 demo application for both the IAR and Keil tool
\r
1446 + Added a SmartFusion demo application for all of the IAR, Keil and
\r
1447 SoftConsole (GCC/Eclipse) tool chains.
\r
1448 + Updated the RX600 port and demo applications to take into account the
\r
1449 different semantics required when using the latest (V1.0.2.0) version of
\r
1450 the Renesas compiler.
\r
1451 + Modified the RX600 Ethernet driver slightly to make it more robust under
\r
1452 heavy load, and updated the uIP handling task to make use of the FreeRTOS
\r
1454 + Slightly changed the PIC32 port layer to move an ehb instruction in line
\r
1455 with the recommendations of the MIPS core manual, and ensure 8 byte stack
\r
1456 alignment is truly always obtained.
\r
1457 + Changed the behaviour when tasks are suspended before the scheduler has
\r
1458 been started. Before, there needed to be at least one task that was not
\r
1459 in the suspended state. This is no longer the case.
\r
1461 Changes between V6.1.1 and V7.0.0 released April 8 2011
\r
1463 FreeRTOS V7.0.0 is backward compatible with FreeRTOS V6.x.x
\r
1467 + Introduced a new software timer implementation.
\r
1468 + Introduced a new common demo application file to exercise the new timer
\r
1470 + Updated the Win32/MSVC simulator project to include the new software timer
\r
1471 demo tasks and software timer tick hook test. Much simpler software timer
\r
1472 demonstrations are included in the demo projects for both of the new ports
\r
1473 (MSP430X with CCS4 and STM32 with TrueStudio).
\r
1474 + Various enhancements to the kernel implementation in tasks.c. These are
\r
1475 transparent to users and do not effect the pre-existing API.
\r
1476 + Added calls to configASSERT() within the kernel code. configASSERT() is
\r
1477 functionally equivalent to the standard C assert() macro, but does not
\r
1478 rely on the compiler providing assert.h.
\r
1482 + Updated the MSP430X IAR port and demo project to include support for the
\r
1483 medium memory model.
\r
1484 + Added a demo project for the MSP430X that targets the MSP430X Discovery
\r
1485 board and uses the Code Composer Studio 4 tools. This demo includes use
\r
1486 of the new software timer implementation.
\r
1487 + Added an STM32F100RB demo project that targets the STM32 Discovery Board
\r
1488 and uses the TrueStudio Eclipse based IDE from Atollic.
\r
1489 + Removed some compiler warnings from the PSoC demo application.
\r
1490 + Updated the PIC32 port layer to ensure the
\r
1491 configMAX_SYSCALL_INTERRUPT_PRIORITY constant works as expected no matter
\r
1492 what its value is (within the valid range set by the microcontroller
\r
1494 + Updated the PIC24, dsPIC and PIC32 projects so they work with the latest
\r
1495 MPLAB compiler versions from Microchip.
\r
1496 + Various cosmetic changes to prepare for a standards compliance statement
\r
1497 that will be published after the software release.
\r
1500 Changes between V6.1.0 and V6.1.1 released January 14 2011
\r
1502 + Added two new Windows simulator ports. One uses the free Microsoft Visual
\r
1503 Studio 2010 express edition, and the other the free MingW/Eclipse
\r
1504 environment. Demo projects are provided for both.
\r
1505 + Added three demo projects for the PSoC 5 (CYAC5588). These are for the
\r
1506 GCC, Keil, and RVDS build tools, and all use the PSoC Creator IDE.
\r
1507 + Added a demo for the low power STM32L152 microcontroller using the IAR
\r
1508 Embedded Workbench.
\r
1509 + Added a new port for the MSP430X core using the IAR Embedded Workbench.
\r
1510 + Updated all the RX62N demo projects that target the Renesas Demonstration
\r
1511 Kit (RDK) to take into account the revered LED wiring on later hardware
\r
1512 revisions, and the new J-Link debug interface DLL.
\r
1513 + Updated all the RX62N demo projects so the IO page served by the example
\r
1514 embedded web server works with all web browsers.
\r
1515 + Updated the Red Suite projects to work with the up coming Red Suite
\r
1516 release, and to use a more recent version of the CMSIS libraries.
\r
1517 + Added the traceTAKE_MUTEX_RECURSIVE_FAILED() trace macro.
\r
1518 + Removed the (pointless) parameter from the traceTASK_CREATE_FAILED()
\r
1520 + Introduced the portALT_GET_RUN_TIME_COUNTER_VALUE() macro to compliment
\r
1521 the already existing portGET_RUN_TIME_COUNTER_VALUE(). This allows for
\r
1522 more flexibility in how the time base for the run time statistics feature
\r
1523 can be implemented.
\r
1524 + Added a "cpsie i" instruction before the "svc 0" instruction used to start
\r
1525 the scheduler in each of the Cortex M3 ports. This is to ensure that
\r
1526 interrupts are globally enabled prior to the "svc 0" instruction being
\r
1527 executed in cases where interrupts are left disabled by the C start up
\r
1529 + Slight optimisation in the run time stats calculation.
\r
1531 Changes between V6.0.5 and V6.1.0 released October 6 2010
\r
1533 + Added xTaskGetTickCountFromISR() function.
\r
1534 + Modified vTaskSuspend() to allow tasks that have just been created to be
\r
1535 immediately suspended even when the kernel has not been started. This
\r
1536 allows them to effectively start in the Suspended state - a feature that
\r
1537 has been asked for on numerous occasions to assist with initialisation
\r
1539 + Added ports for the Renesas RX62N using IAR, GCC and Renesas tool suites.
\r
1540 + Added a STM32F103 demo application that uses the Rowley tools.
\r
1541 + Under specific conditions xFreeBytesRemaining within heap_2.c could end up
\r
1542 with an incorrect value. This has been fixed.
\r
1543 + xTaskCreateGeneric() has a parameter that can be used to pass the handle
\r
1544 of the task just created out to the calling task. The assignment to this
\r
1545 parameter has been moved to ensure it is assigned prior to the newly
\r
1546 created having any possibility of executing. This takes into account the
\r
1547 case where the assignment is made to a global variable that is accessed by
\r
1548 the newly created task.
\r
1549 + Fixed some build time compiler warnings in various FreeTCPIP (based on
\r
1551 + Fixed some build time compiler warnings in Demo/Common/Minimal/IntQueue.c.
\r
1553 Changes between V6.0.4 and V6.0.5 released May 17 2010
\r
1555 + Added port and demo application for the Cortus APS3 processor.
\r
1557 Changes between V6.0.3 and V6.0.4 released March 14 2010
\r
1559 + All the contributed files that were located in the Demo/Unsupported_Demos
\r
1560 directory have been removed. These files are instead now available in the
\r
1561 new Community Contributions section of the FreeRTOS website. See
\r
1562 https://www.FreeRTOS.org/RTOS-contributed-ports.html
\r
1563 + The project file located in the Demo/CORTEX_STM32F107_GCC_Rowley directory
\r
1564 has been upgraded to use V2.x of the Rowley Crossworks STM32 support
\r
1566 + An initial Energy Micro EFM32 demo has been included. This will be
\r
1567 updated over the coming months to make better use of the low power modes
\r
1568 the EFM32 provides.
\r
1570 Changes between V6.0.2 and V6.0.3 released February 26 2010
\r
1572 + SuperH SH7216 (SH2A-FPU) port and demo application added.
\r
1573 + Slight modification made to the default implementation of
\r
1574 pvPortMallocAligned() and vPortFreeAligned() macros so by default they
\r
1575 just call pvPortMalloc() and vPortFree(). The macros are only needed to
\r
1576 be defined when a memory protection unit (MPU) is being used - and then
\r
1577 only depending on other configuration settings.
\r
1579 Changes between V6.0.1 and V6.0.2 released January 9th 2010
\r
1581 + Changed all GCC ARM 7 ports to use 0 as the SWI instruction parameter.
\r
1582 Previously the parameter was blank and therefore only an implicit 0 but
\r
1583 newer GCC releases do not permit this.
\r
1584 + Updated IAR SAM7S and SAM7X ports to work with IAR V5.40.
\r
1585 + Changed the stack alignment requirement for PIC32 from 4 bytes to 8 bytes.
\r
1586 + Updated prvListTaskWithinSingleList() is it works on processors where the
\r
1587 stack grows up from low memory.
\r
1588 + Corrected some comments.
\r
1589 + Updated the startup file for the RVDS LPC21xx demo.
\r
1591 Changes between V6.0.0 and V6.0.1 released November 15th 2009
\r
1593 + Altered pxPortInitialiseStack() for all Cortex-M3 ports to ensure the
\r
1594 stack pointer is where the compiler expects it to be when a task first
\r
1597 The following minor changes only effect the Cortex-M3 MPU port:
\r
1599 + portRESET_PRIVILEGE() assembly macro updated to include a clobber list.
\r
1600 + Added prototypes for all the privileged function wrappers to ensure no
\r
1601 compile time warnings are generated no matter what the warning level
\r
1603 + Corrected the name of portSVC_prvRaisePrivilege to
\r
1604 portSVC_RAISE_PRIVILEGE.
\r
1605 + Added conditional compilation into xTaskGenericCreate() to prevent some
\r
1606 compilers issuing warnings when portPRIVILEGE_BIT is defined as zero.
\r
1609 Changes between V5.4.2 and V6.0.0 released October 16th 2009
\r
1611 FreeRTOS V6 is backward compatible with FreeRTOS V5.x.
\r
1615 + FreeRTOS V6 is the first version to include memory protection unit (MPU)
\r
1616 support. Two ports now exist for the Cortex M3, the standard FreeRTOS
\r
1617 which does not include MPU support, and FreeRTOS-MPU which does.
\r
1618 + xTaskCreateRestricted() and vTaskAllocateMPURegions() API functions added
\r
1619 in support of FreeRTOS-MPU.
\r
1620 + Wording for the GPL exception has been (hopefully) clarified. Also the
\r
1621 license.txt file included in the download has been fixed (the previous
\r
1622 version contained some corruption).
\r
1626 + New API function xPortGetFreeHeapSize() added to heap_1.c and heap_2.c.
\r
1627 + ARM7 GCC demo interrupt service routines wrappers have been modified to
\r
1628 call the C portion using an __asm statement. This prevents the function
\r
1629 call being inlined at higher optimisation levels.
\r
1630 + ARM7 ports now automatically set the THUMB bit if necessary when
\r
1631 setting up the initial stack of a task - removing the need for
\r
1632 THUMB_INTERWORK to be defined. This also allows THUMB mode and ARM mode
\r
1633 tasks to be mixed more easily.
\r
1634 + All ARM7/9 ports now have portBYTE_ALIGNMENT set to 8 by default.
\r
1635 + Various demo application project files have been updated to be up to date
\r
1636 with the latest IDE versions.
\r
1637 + The linker scripts used with command line GCC demos have been updated to
\r
1638 include an eh_frame section to allow their use with the latest Yagarto
\r
1639 release. Likewise the demo makefiles have been updated to include
\r
1640 command line options to reduce or eliminate the eh_frame section all
\r
1642 + The definition of portBYTE_ALIGNMENT_MASK has been moved out of the
\r
1643 various memory allocation files and into the common portable.h header
\r
1645 + Removed unnecessary use of portLONG, portSHORT and portCHAR.
\r
1646 + Added LM3Sxxxx demo for Rowley CrossWorks.
\r
1647 + Posix simulator has been upgraded - see the corresponding WEB page on the
\r
1648 FreeRTOS.org site.
\r
1651 Changes between V5.4.1 and V5.4.2 released August 9th 2009
\r
1653 + Added a new port and demo app for the Altera Nios2 soft core.
\r
1654 + Added LPC1768 demo for IAR.
\r
1655 + Added a USB CDC demo to all LPC1768 demos (Code Red, CrossWorks and IAR).
\r
1656 + Changed clock frequency of LPC1768 demos to 99MHz.
\r
1658 Changes between V5.4.0 and V5.4.1 released July 25th 2009
\r
1660 + New hook function added. vApplicationMallocFailedHook() is (optionally)
\r
1661 called if pvPortMalloc() returns NULL.
\r
1662 + Additional casting added to xTaskCheckForTimeOut(). This prevents
\r
1663 problems that can arise should configUSE_16_BIT_TICKS be set to 1 on a
\r
1664 32 bit architecture (which would probably be a mistake, anyway).
\r
1665 + Corrected the parameter passed to NVIC_SetPriority() to set the MAC
\r
1666 interrupt priority in both LPC1768 demos.
\r
1667 + Decreased the default setting of configMINIMAL_STACK_SIZE in the PIC32
\r
1668 demo application to ensure the heap space was not completely consumed
\r
1669 before the scheduler was started.
\r
1671 Changes between V5.3.1 and V5.4.0 released July 13th 2009
\r
1673 + Added Virtex5 / PPC440 port and demos.
\r
1674 + Replaced the LPC1766 Red Suite demo with an LPC1768 Red Suite demo. The
\r
1675 original demo was configured to use engineering samples of the CPU. The
\r
1676 new demo has an improved Ethernet driver.
\r
1677 + Added LPC1768 Rowley demo with zero copy Ethernet driver.
\r
1678 + Reworked byte alignment code to ensure 8 byte alignment works correctly.
\r
1679 + Set configUSE_16_BIT_TICKS to 0 in the PPC405 demo projects.
\r
1680 + Changed the initial stack setup for the PPC405 to ensure the small data
\r
1681 area pointers are setup correctly.
\r
1683 Changes between V5.3.0 and V5.3.1 released June 21st 2009
\r
1685 + Added ColdFire V1 MCF51CN128 port and WEB server demo.
\r
1686 + Added STM32 Connectivity Line STM32107 Cortex M3 WEB server demo.
\r
1687 + Changed the Cortex M3 port.c asm statements to __asm so it can be
\r
1688 compiled using Rowley CrossWorks V2 in its default configuration.
\r
1689 + Updated the Posix/Linux simulator contributed port.
\r
1691 Changes between V5.2.0 and V5.3.0 released June 1st 2009
\r
1695 + Added new (optional) feature that gathers statistics on the amount of CPU
\r
1696 time used by each task.
\r
1697 + Added a new demo application for the Atmel AT91SAM3U Cortex-M3 based
\r
1699 + Added a new demo application for the NXP LPC1766 Cortex-M3 based
\r
1701 + Added a contributed port/demo that allows FreeRTOS to be 'simulated' in a
\r
1702 Linux environment.
\r
1705 + Updated the Stellaris uIP WEB server demos to include the new run time
\r
1706 statistics gathering feature - and include a served WEB page that
\r
1707 presents the information in a tabular format.
\r
1708 + Added in the lwIP port layer for the Coldfire MCF52259.
\r
1709 + Updated the CrossWorks LPC2368 WEB server to include an image in the
\r
1711 + Changed some of the timing in the initialisation of the LPC2368 MAC to
\r
1712 permit its use on all part revisions.
\r
1713 + Minor modifications to the core uIP code to remove some compiler warnings.
\r
1714 + Added xTaskGetApplicationTaskTag() function and updated the OpenWatcom
\r
1715 demo to make use of the new function.
\r
1716 + Added contributed demos for AVR32 AP7000, STM32 Primer 2 and STM32 using
\r
1717 Rowley Crossworks.
\r
1718 + Heap_1.c and Heap_2.c used to define structures for the purpose of data
\r
1719 alignment. These have been converted to unions to save a few bytes of
\r
1720 RAM that would otherwise be wasted.
\r
1721 + Remove the call to strncpy() used to copy the task name into the TCB when
\r
1722 the maximum task name is configured to be 1 byte long.
\r
1724 Changes between V5.1.2 and V5.2.0 released March 14th 2009
\r
1726 + Optimised the queue send and receive functions (also used by semaphores).
\r
1727 + Replaced the standard critical sections used to protect BIOS calls in the
\r
1728 PC port to instead use scheduler locks. This is because the BIOS calls
\r
1729 always return with interrupts enabled.
\r
1730 + Corrected unclosed comments in boot.s.
\r
1732 Changes between V5.1.1 and V5.1.2 released February 9th 2009
\r
1734 + Added NEC V850ES port and demo.
\r
1735 + Added NEC 78K0R port and demo.
\r
1736 + Added MCF52259 port and demo.
\r
1737 + Added the AT91SAM9XE port and demo.
\r
1738 + Updated the MCF52233 FEC driver to work around a silicon bug that
\r
1739 prevents the part auto negotiating some network parameters.
\r
1740 + Minor modifications to the MCF52233 makefile to permit it to be used
\r
1742 + Updated the STM32 primer files to allow them to be built with the latest
\r
1743 version of the RIDE tools.
\r
1744 + Updated the threads.js Java script used for kernel aware debugging in
\r
1745 the Rowley CrossWorks IDE.
\r
1748 Changes between V5.1.0 and V5.1.1 released November 20, 2008
\r
1750 + Added Coldfire MCF52233 WEB server demo using GCC and Eclipse.
\r
1751 + Added IAR MSP430 port and demo.
\r
1752 + Corrected several compiler time issues that had crept in as tool versions
\r
1754 + Included FreeRTOS-uIP - a faster uIP. This is not yet complete.
\r
1756 Changes between V5.0.4 and V5.1.0 released October 24, 2008
\r
1758 + Added a new port and demo application for the ColdFire V2 core using the
\r
1759 CodeWarrior development tools.
\r
1760 + Replaced the ARM7 demo that used the old (and now no longer supported)
\r
1761 Keil compiler with a new port that uses the new Keil/RVDS combo.
\r
1762 + Stack overflow checking now works for stacks that grow up from low
\r
1763 memory (PIC24 and dsPIC).
\r
1764 + BUG FIX - set the PIC32 definition of portSTACK_GROWTH to the correct
\r
1766 + MSP430 port layers have been updated to permit tasks to place the
\r
1767 microcontroller into power down modes 1 to 3. The demo applications have
\r
1768 likewise been updated to demonstrate the new feature.
\r
1769 + Replaced the two separate MSP430/Rowley port layers with a single and more
\r
1771 + Added more contributed ports, including ports for NEC and SAM9
\r
1773 + Changed the linker script used in the LPC2368 Eclipse demo.
\r
1775 Changes between V5.0.3 and V5.0.4 released September 22, 2008
\r
1777 + Completely re-written port for ColdFire GCC.
\r
1778 + Bug fix: All Cortex M3 ports have a minor change to the code that sets
\r
1779 the pending interrupt.
\r
1780 + Some header files require that FreeRTOS.h be included prior to their
\r
1781 inclusion. #error message have been added to all such header file
\r
1782 informing users to the cause of the compilation error should the headers
\r
1783 not be included in the correct order.
\r
1785 Changes between V5.0.2 and V5.0.3 released July 31, 2008
\r
1787 Changes relating to the Cortex M3:
\r
1789 + Added configMAX_SYSCALL_INTERRUPT_PRIORITY usage to all the Cortex M3
\r
1790 ports and demos. See the port documentation pages on the FreeRTOS.org
\r
1791 WEB site for full usage information.
\r
1792 + Improved efficiency of Cortex M3 port even further.
\r
1793 + Ensure the Cortex M3 port works no matter where the vector table is
\r
1795 + Added the IntQTimer demo/test tasks to a demo project for each CM3 port
\r
1796 (Keil, GCC and IAR) to test the new configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
1798 + Added the mainINCLUDE_WEB_SERVER definition to the LM3SXXXX IAR and Keil
\r
1799 projects to allow the WEB server to be conditionally excluded from the
\r
1800 build and therefore allow use of the KickStart (code size limited)
\r
1805 + Moved the PIC24 and dsPIC versions of vPortYield() from the C file to
\r
1806 an assembly file to allow use with all MPLAB compiler versions. This also
\r
1807 allows the omit-frame-pointer optimisation to be turned off.
\r
1809 Changes between V5.0.0 and V5.0.2 released May 30, 2008
\r
1811 + Updated the PIC32 port to allow queue API calls to be used from
\r
1812 interrupts above the kernel interrupt priority, and to allow full
\r
1813 interrupt nesting. Task stack usages has also been reduced.
\r
1814 + Added a new PowerPC port that demonstrates how the trace macros can be
\r
1815 used to allow the use of a floating point co-processor. The
\r
1816 traceTASK_SWITCHED_OUT() and traceTASK_SWITCHED_INT() macros are used to
\r
1817 save and restore the floating point context respectively for those tasks
\r
1818 that actually use floating point operations.
\r
1819 + BUG FIX: The first PPC405 port contained a bug in that it did not leave
\r
1820 adequate space above the stack for the backchain to be saved when a task
\r
1821 started to execute for the first time.
\r
1822 + Updated queue.c to add in the means to allow interrupt nesting and for
\r
1823 queue API functions to be called from interrupts that have a priority
\r
1824 above the kernel priority. This is only supported on PIC32 ports thus
\r
1826 + Fixed the compiler warnings that were generated when the latest version
\r
1827 of WinAVR was used.
\r
1828 + Remove all inline usage of 'inline' from the core kernel code.
\r
1829 + Added the queue registry feature. The queue registry is provided as a
\r
1830 means for kernel aware debuggers to locate queue definitions. It has no
\r
1831 purpose unless you are using a kernel aware debugger. The queue registry
\r
1832 will only be used when configQUEUE_REGISTRY_SIZE is greater than zero.
\r
1833 + Added the ST Cortex-M3 drivers into the Demo/Common/Drivers directory to
\r
1834 prevent them from having to be included in multiple demos.
\r
1835 + Added a Keil STM32 demo application.
\r
1836 + Changed the blocktim.c test files as it is no longer legitimate for all
\r
1837 ports to call queue API functions from within a critical section.
\r
1838 + Added the IntQueue.c test file to test the calling of queue API functions
\r
1839 from different interrupt priority levels, and test interrupt nesting.
\r
1841 Changes between V5.0.0 and V5.0.1
\r
1843 + V5.0.1 was a customer specific release.
\r
1845 Changes between V4.8.0 and V5.0.0 released April 15, 2008
\r
1847 *** VERY IMPORTANT INFORMATION ON UPGRADING TO FREERTOS.ORG V5.0.0 ***
\r
1849 The parameters to the functions xQueueSendFromISR(), xQueueSendToFrontFromISR(),
\r
1850 xQueueSendToBackFromISR() and xSemaphoreGiveFromISR() have changed. You must
\r
1851 update all calls to these functions to use the new calling convention! Your
\r
1852 compiler might not issue any type mismatch warnings!
\r
1857 + Support added for the new Luminary Micro LM3S3768 and LM3S3748 Cortex-M3
\r
1859 + New task hook feature added.
\r
1860 + PowerPC demo updated to use version 10.1 of the Xilinx EDK.
\r
1861 + Efficiency gains within the PIC32 port layer.
\r
1863 Changes between V4.7.2 and V4.8.0 released March 26 2008
\r
1865 + Added a Virtex4 PowerPC 405 port and demo application.
\r
1866 + Added optional stack overflow checking and new
\r
1867 uxTaskGetStackHighWaterMark() function.
\r
1868 + Added new xQueueIsQueueEmptyFromISR(), xQueueIsQueueFullFromISR() and
\r
1869 uxQueueMessagesWaitingFromISR() API functions.
\r
1870 + Efficiency improvements to the Cortex-M3 port layer. NOTE: This
\r
1871 requires that an SVC handler be installed in the application.
\r
1872 + Efficiency improvements to the queue send and receive functions.
\r
1873 + Added new trace macros. These are application definable to provide
\r
1874 a flexible trace facility.
\r
1875 + Implemented the configKERNEL_INTERRUPT_PRIORITY within the Keil Cortex
\r
1876 M3 port layer (bringing it up to the same standard as the IAR and GCC
\r
1878 + Ports that used the arm-stellaris-eabi-gcc tools have been converted to
\r
1879 use the arm-non-eabi-gcc tools.
\r
1881 Changes between V4.7.1 and V4.7.2 released February 21, 2008
\r
1883 + Added Fujitsu MB91460 port and demo.
\r
1884 + Added Fujitsu MB96340 port and demo.
\r
1885 + Tidied up the capitalisation of include files to facilitate builds on
\r
1887 + Removed some redundant casting that was generating warnings - but was
\r
1888 included to remove warnings on other compilers.
\r
1890 Changes between V4.7.0 and V4.7.1 released February 3, 2008
\r
1892 + Updated all IAR ARM projects to use V5.11 of the IAR Embedded Workbench
\r
1894 + Introduced recursive semaphore feature.
\r
1895 + Updated LPC2368 demos to take into account silicon bugs in old chip
\r
1897 + Updated STR9 uIP port to manually set the net mask and gateway addresses.
\r
1898 + Updating demos to allow more to run with the co-operative scheduler.
\r
1899 + Fixed co-operative scheduler behaviour upon the occurrence of a tick
\r
1900 interrupt while the scheduler was suspended.
\r
1901 + Updated documentation contained within semphr.h.
\r
1902 + ARM7 GCC ports no longer use the IRQ attribute.
\r
1904 Changes between V4.6.1 and V4.7.0 released December 6, 2007
\r
1906 + Introduced the counting semaphore macros and demo source files. The
\r
1907 Open Watcom PC project has been updated to include the new demo. See
\r
1908 the online documentation for more information.
\r
1909 + Introduced the 'alternative' queue handling API and demo source files.
\r
1910 The Open Watcom PC project has been updated to include the new demo
\r
1911 source files. See the online documentation for more information.
\r
1912 + Added AT91SAM7X Eclipse demo project.
\r
1913 + Added the STM32 primer demo project for the GCC compiler and Ride IDE.
\r
1914 + Removed the .lock files that were mistakenly included in the V4.6.1
\r
1915 eclipse workspaces.
\r
1917 Changes between V4.6.0 and V4.6.1 released November 5 2007
\r
1919 + Added support for the MIPS M4K based PIC32.
\r
1920 + Added 'extern "C"' to all the header files to facilitate use with C++.
\r
1922 Changes between V4.5.0 and V4.6.0 released October 28 2007
\r
1924 + Changed the method used to force a context switch within an ISR for the
\r
1925 ARM7/9 GCC ports only. The portENTER_SWITCHING_ISR() and
\r
1926 portEXIT_SWITCHING_ISR() macros are no longer supported. This is to
\r
1927 ensure correct behaviour no matter which GCC version is used, with or
\r
1928 without the -fomit-frame-pointer option, and at all optimisation levels.
\r
1929 + Corrected the prototype for xQueueGenericSend() within queue.h.
\r
1931 Changes between V4.4.0 and V4.5.0 released September 17 2007
\r
1933 + Added the xQueueSendToFront(), xQueueSendToBack() and xQueuePeek()
\r
1934 functionality. These should now be used in preference to the old
\r
1935 xQueueSend() function - which is maintained for backward compatibility.
\r
1936 + Added Mutex functionality. The behaviour of mutexes is subtly different
\r
1937 to the already existing binary semaphores as mutexes automatically
\r
1938 include a priority inheritance mechanism.
\r
1939 + Added the GenQTest.c and QPeek.c to test and demonstrate the behaviour
\r
1940 of the new functionality.
\r
1941 + Updated the LM3Sxxxx and PC ports to include the new GenQTest.c and
\r
1943 + Updated the GCC port for the Cortex M3 to include the
\r
1944 configKERNEL_INTERRUPT_PRIORITY functionality. This was previously only
\r
1945 included in the IAR port.
\r
1946 + Optimised the GCC and IAR port layer code - specifically the context
\r
1948 + Consolidated the LM3Sxxxx EK demos for all development tools into a
\r
1949 single project that automatically detects which version of the EK the
\r
1950 application is executing on.
\r
1951 + Added Eclipse support for LM3Sxxxx evaluation kits.
\r
1952 + Added Eclipse support for the Keil LPC2368 evaluation kit.
\r
1953 + Added the Demo/Drivers directory to hold code that is common to multiple
\r
1954 demo application projects.
\r
1955 + Included some minor bug fixes in the uIP 1.0 code.
\r
1956 + Added an lwIP demo for the STR9 - thanks ST for assistance.
\r
1957 + Updated the AVR32 port to ensure correct behaviour with full compiler
\r
1959 + Included binaries for OpenOCD FTDI and parallel port interfaces.
\r
1961 Changes between V4.4.0 and V4.3.1 released July 31, 2007
\r
1963 + Added AVR32 UC3B demo application.
\r
1964 + Updated AVR32 UC3A port and demo applications.
\r
1965 + Added IAR lwIP demo for AVR32 UC3A.
\r
1966 + Updated listGET_OWNER_OF_NEXT_ENTRY() to assist compiler optimisation
\r
1967 (thanks Niu Yong for making the suggestion).
\r
1968 + Added xTaskGetSchedulerState() API function.
\r
1969 + BUG FIX: Corrected behaviour when tasks that are blocked indefinitely
\r
1970 have their block time adjusted (within xQueueSend() and xQueueReceive()),
\r
1971 and are the subject of a call the vTaskResume() when they are not
\r
1972 actually in the Suspended state (thanks Dan Searles for reporting the
\r
1976 Changes between V4.3.0 and V4.3.1 released June 11, 2007
\r
1978 + Added STMicroelectronics STM32 Cortex-M3 demo application.
\r
1979 + Updated ustdlib.c for the GCC LM3S6965 demo.
\r
1981 Changes between V4.2.1 and V4.3.0 released June 5, 2007
\r
1983 + Introduced configKERNEL_INTERRUPT_PRIORITY to the IAR Cortex-M3, PIC24
\r
1984 and dsPIC ports. See the LM3S6965 and PIC24 demo application
\r
1985 documentation pages for more information.
\r
1986 + Updated the PIC24 and dsPIC demos to build with V3.0 of the PIC30 GCC
\r
1987 tools, and changed the demo applications.
\r
1988 + Added demos for the new Ethernet and CAN enabled Luminary Micro Stellaris
\r
1990 + Corrected bug in uIP the demos that prevented frames of approximately 1480
\r
1991 bytes and over from being transmitted.
\r
1992 + Included the LPC2368/uIP/Rowley demo into the main FreeRTOS.org
\r
1994 + Update to WizC PIC18 port to permit its use with version 14 of the
\r
1995 compiler. Thanks Marcel!
\r
1997 Changes between V4.2.1 and V4.2.0 released April 2, 2007
\r
1999 + Added AVR32 AT32UC3A ports for GCC and IAR.
\r
2000 + Added -fomit-frame-pointer option to lwIP SAM7X demo makefile.
\r
2001 + Moved location of call to LCD_Init() in STR9 demo to ensure it is only
\r
2002 called after the scheduler has been started.
\r
2004 Changes between V4.1.3 and V4.2.0 released February 8, 2007
\r
2006 + Changes to both task.c and queue.c as a result of testing performed on
\r
2007 the SafeRTOS code base.
\r
2008 + Added Cortex-M3 LM3S811 demos for GCC and IAR tools.
\r
2010 Changes between V4.1.2 and V4.1.3 released November 19, 2006
\r
2012 + Added STR750 ARM7 port using the Raisonance RIDE/GCC tools.
\r
2013 + Added -fomit-frame-pointer option to Rowley ARM7 demos as work around
\r
2014 to GCC bug at some optimisation levels.
\r
2015 + Altered the way the heap is defined in the LM3S811 Keil demo to prevent
\r
2016 the RAM usage from counting toward the code size limit calculation.
\r
2017 + CO-ROUTINE BUG FIX: Removed the call to prvIsQueueEmpty from within
\r
2018 xQueueCRReceive as it exited with interrupts enabled. Thanks Paul Katz.
\r
2019 + Tasks that block on events with a timeout of portMAX_DELAY are now
\r
2020 blocked indefinitely if configINCLUDE_vTaskSuspend is defined.
\r
2021 Previously portMAX_DELAY was just the longest block time possible. This
\r
2022 is still the case if configINCLUDE_vTaskSuspend is not defined.
\r
2023 + Minor changes to some demo application files.
\r
2025 Changes between V4.1.1 and V4.1.2 released October 21, 2006
\r
2027 + Added 16bit PIC ports and demos.
\r
2028 + Added STR750 port and demo.
\r
2031 Changes between V4.1.0 and V4.1.1 released September 24, 2006
\r
2033 + Added the Luminary Micro Stellaris LM3S811 demo application.
\r
2035 Changes between V4.0.5 and V4.1.0 released August 28, 2006
\r
2037 + Prior to V4.1.0, under certain documented circumstances, it was possible
\r
2038 for xQueueSend() and xQueueReceive() to return without having completed
\r
2039 and without their block time expiring. The block time effectively
\r
2040 stated a maximum block time, and the return value of the function needed
\r
2041 to be checked to determine the reason for returning. This is no longer
\r
2042 the case as the functions will only return once the block time has
\r
2043 expired or they are able to complete their operation. It is therefore no
\r
2044 longer necessary to wrap calls within loops.
\r
2045 + Changed the critical section handling in the IAR AVR port to correct the
\r
2046 behaviour when used with later compiler versions.
\r
2047 + Added the LPC2138 CrossWorks demo into the zip file. Previously this was
\r
2048 only available as a separate download.
\r
2049 + Modified the AVR demo applications to demonstrate the use of co-routines.
\r
2051 Changes between V4.0.4 and V4.0.5 released August 13, 2006
\r
2053 + Introduced API function xTaskResumeFromISR(). Same functionality as
\r
2054 xTaskResume(), but can be called from within an interrupt service routine.
\r
2055 + Optimised vListInsert() in the case when the wake time is the maximum
\r
2057 + Bug fix: The 'value' of the event list item is updated when the priority
\r
2058 of a task is changed. Previously only the priority of the TCB itself was
\r
2060 + vTaskPrioritySet() and vTaskResume() no longer use the event list item.
\r
2061 This has not been necessary since V4.0.1 when the xMissedYield handling
\r
2063 + Lowered the PCLK setting on the ARM9 STR9 demo from 96MHz to 48MHz.
\r
2064 + When ending the scheduler - do not try to attempt a context switch when
\r
2065 deleting the current task.
\r
2066 + SAM7X EMAC drivers: Corrected the Rx frame length mask when obtaining
\r
2067 the length from the rx descriptor.
\r
2070 Changes between V4.0.3 and V4.0.4 released June 22, 2006
\r
2072 + Added a port and demo application for the STR9 ARM9 based processors from
\r
2074 + Slight optimisation to the vTaskPrioritySet() function.
\r
2075 + Included the latest uIP version (1.0) in the demo/common/ethernet
\r
2078 Changes between V4.0.2 and V4.0.3 released June 7, 2006
\r
2080 + Added a port and demo application for the Cortex-M3 target using the IAR
\r
2081 development tools.
\r
2082 + The ARM Cortex-m3 Rowley projects have been updated to use V1.6 of the
\r
2083 CrossStudio tools.
\r
2084 + The heap size defined for the lwIP Rowley demo has been reduced so that
\r
2085 the project will link correctly when using the command line GCC tools
\r
2086 also. The makefile has also been modified to allow debugging.
\r
2087 + The lwIP Rowley demo not includes a 'kernel aware' debug window.
\r
2088 + The uIP Rowley project has been updated to build with V1.6 of CrossWorks.
\r
2089 + The second set of tasks in the blockQ demo were created the wrong way
\r
2090 around (inconsistent to the description in the file). This has been
\r
2093 Changes between V4.0.1 and V4.0.2 released May 28, 2006
\r
2095 + Port and demo application added for the Tern Ethernet Engine controller.
\r
2096 + Port and demo application added for MC9S12 using GCC, thanks to
\r
2097 Jefferson "imajeff" Smith.
\r
2098 + The function vTaskList() now suspends the scheduler rather than disabling
\r
2099 interrupts during the creation of the task list.
\r
2100 + Allow a task to delete itself by passing in its own handle. Previously
\r
2101 this could only be done by passing in NULL.
\r
2102 + Corrected the value passed to the WDG_PeriodValueConfig() library
\r
2103 function in the STR71x demo.
\r
2104 + The tick hook function is now called only within a tick isr. Previously
\r
2105 it was also called when the tick function was called during the scheduler
\r
2106 unlocking process.
\r
2107 + The EMAC driver in the SAM7X lwIP demo has been made more robust as per
\r
2108 the thread: https://sourceforge.net/forum/message.php?msg_id=3714405
\r
2109 + In the PC ports: Add function prvSetTickFrequencyDefault() to set the
\r
2110 DOS tick back to its proper value when the scheduler exits. Thanks
\r
2112 + In the Borland x86 ports there was a mistake in the portFIRST_CONTEXT
\r
2113 macro where the BP register was not popped from the stack correctly. The
\r
2114 BP value would never get used so this did not cause a problem, but it has
\r
2115 been corrected all the same.
\r
2118 Changes between V4.0.0 and V4.0.1 released April 7 2006
\r
2120 + Improved the ARM CORTEX M3 ports so they now only have to service
\r
2121 pendSV interrupts.
\r
2122 + Added a Luminary Micro port and demo for use with Rowley CrossWorks.
\r
2123 + Added the xMissedYield handling to tasks.c.
\r
2125 Changes between V3.2.4 and V4.0.0
\r
2129 + Added new RTOS port for Luminary Micros ARM CORTEX M3 microcontrollers.
\r
2130 + Added new co-routine functionality.
\r
2132 Other kernel changes:
\r
2134 + An optional tick hook call is now included in the tick function.
\r
2135 + Introduced the xMiniListItem structure and removed the list pxHead
\r
2136 member in order to reduce RAM usage.
\r
2137 + Added the following definitions to the FreeRTOSConfig.h file included
\r
2139 configUSE_TICK_HOOK
\r
2140 configUSE_CO_ROUTINES
\r
2141 configMAX_CO_ROUTINE_PRIORITIES
\r
2142 + The volatile qualification has been changed on the list members to allow
\r
2143 the task.c code to be tidied up a bit.
\r
2144 + The scheduler can now be started even if no tasks have been created!
\r
2145 This is to allow co-routines to run when there are no tasks.
\r
2146 + A task being woken by an event will now preempt the currently running task
\r
2147 even if its priority is only equal to the currently running task.
\r
2149 Port and demo application changes:
\r
2151 + Updated the WinAVR demo to compile with the latest version of WinAVR
\r
2152 with no warnings generated.
\r
2153 + Changed the WinAVR makefile to make chars signed - needed for the
\r
2154 co-routine code if BaseType_t is set to char.
\r
2155 + Added new demo application file crflash.c. This demonstrates co-routine
\r
2156 functionality including passing data between co-routines.
\r
2157 + Added new demo application file crhook.c. This demonstrates co-routine
\r
2158 and tick hook functionality including passing data between and ISR and
\r
2160 + Some NOP's were missing following stmdb{}^ instructions in various ARM7
\r
2161 ports. These have been added.
\r
2162 + Updated the Open Watcom PC demo project to include the crflash and crhook
\r
2163 demo co-routines as an example of their use.
\r
2164 + Updated the H8S demo to compile with the latest version of GCC.
\r
2165 + Updated the SAM7X EMAC drivers to take into account the hardware errata
\r
2166 regarding lost packets.
\r
2167 + Changed the default MAC address used by some WEB server demos as the
\r
2168 original addresses used was not liked by some routers.
\r
2169 + Modified the SAM7X/IAR startup code slightly to prevent it hanging on
\r
2170 some systems when the code is executed using a j-link debugger. The
\r
2171 j-link macro file configures the PLL before the code executes so
\r
2172 attempting to configure it again in the startup code was causing a
\r
2173 problem for some user. Now a check is performed first to see if the
\r
2174 PLL is already set up.
\r
2175 + GCC port now contain all assembler code in a single asm block rather than
\r
2176 individual blocks as before.
\r
2177 + GCC LPC2000 code now explicitly uses R0 rather than letting the assembler
\r
2178 choose the register to use as a temporary register during the context
\r
2180 + Added portNOP() macro.
\r
2181 + The compare match load value on LPC2000 ports now has 1 added to correct
\r
2183 + The minimal stack depth has been increased slightly on the WIZC PIC18
\r
2186 Changes between V3.2.3 and V3.2.4
\r
2188 + Modified the GCC ARM7 port layer to allow use with GCC V4.0.0 and above.
\r
2189 Many thanks to Glen Biagioni for the provided update.
\r
2190 + Added a new Microblaze port and demo application.
\r
2191 + Modified the SAM7X EMAC demo to default to use the MII interface rather
\r
2192 than the RMII interface.
\r
2193 + Modified the startup sequence of the SAM7X demo slightly to allow the
\r
2194 EMAC longer to auto negotiate.
\r
2196 Changes between V3.2.2 and V3.2.3
\r
2198 + Added MII interface support to the SAM7X EMAC peripheral driver.
\r
2199 Previously versions worked with the RMII interface only.
\r
2200 + Added command line GCC support to the SAM7X lwIP demo. Previously the
\r
2201 project could only be built using the CrossWorks IDE. Modifications to
\r
2202 this end include the addition of a standard makefile and linker script to
\r
2203 the download, and some adjustments to the stacks allocated to each task.
\r
2204 + Changed the page returned by the lwIP WEB server demo to display the
\r
2205 task status table rather than the TCP/IP statistics.
\r
2206 + Corrected the capitalisation of some header file includes and makefile
\r
2207 dependencies to facilitate use on Linux host computers.
\r
2208 + The various LPC2000 ports had a mistake in the timer setup where the
\r
2209 prescale value was written to T0_PC instead of T0_PR. This would have
\r
2210 no effect unless a prescale value was actually required. This has been
\r
2213 Changes between V3.2.1 and V3.2.2 - Released 23 September, 2005
\r
2215 + Added an IAR port for the Philips LPC2129
\r
2216 + The Atmel ARM7 IAR demo project files are now saved in the IAR Embedded
\r
2217 Workbench V4.30a format.
\r
2218 + Updated the J-Link macro file included with the SAM7X uIP demo project
\r
2219 to allow the demo board to be reset over the J-Link.
\r
2221 Changes between V3.2.0 and V3.2.1 - Released 1 September, 2005
\r
2223 + Added lwIP demo for AT91SAM7X using Rowley tools.
\r
2224 + Added uIP demo for AT91SAM7X using IAR tools.
\r
2225 + Added function xTaskGetCurrentTaskHandle().
\r
2226 + Renamed events.h to mevents.h to prevent it conflicting with the events.h
\r
2227 generated automatically by the HCS12 processor expert utility. events.h
\r
2228 is only used by the PC demo application.
\r
2229 + Both PIC18 ports now initialise the TBLPTRU to 0 as this is the value
\r
2230 expected by the compiler, and the compilers do not write to this
\r
2232 + The HCS12 banked model demo now creates the 'suicide' tasks immediately
\r
2233 prior to starting the scheduler. These tasks should be the last tasks to
\r
2234 get started in order for the test to function correctly.
\r
2236 Changes between V3.1.1 and V3.2.0 - Released 29 June, 2005
\r
2238 V3.2.0 introduces two new MSP430 ports and corrects a minor kernel
\r
2239 issues. Thanks to Ares.qi for his input.
\r
2241 + Added two MSP430 ports that use the Rowley CrossWorks development tools.
\r
2242 One port just mirrors the existing GCC port. The other port was provided
\r
2243 by Milos Prokic. Thanks!
\r
2244 + V3.2.0 corrects the behavior when vTaskPrioritySet() or vTaskResume()
\r
2245 are called while the scheduler is locked (by a call to
\r
2246 vTaskSuspendAll()). When this is done the subject task now starts to
\r
2247 execute immediately when the scheduler is unlocked if it has the highest
\r
2248 priority that is ready to run. Previously there was a possibility that
\r
2249 the task would not run until the next RTOS tick or call to portYIELD().
\r
2250 + Another similar small correction ensures that in the case where more than
\r
2251 one task is blocked on a semaphore or queue, the task with the highest
\r
2252 priority is guaranteed to be unblocked first.
\r
2253 + Added a couple of more test tasks to the PC demo which cover the points
\r
2256 Changes between V3.1.0 and V3.1.1 - Released 21st June, 2005
\r
2258 This release updates the HCS12 port. The common kernel code
\r
2259 remains unchanged.
\r
2261 + Updated the HCS12 port to support banking and introduced a demo
\r
2262 application for the MC9S12DP256. The new demo application is
\r
2263 located in the Demo/HCS12_CodeWarrior_banked directory.
\r
2264 + The name of the directory containing the MC9S12F32 demo application
\r
2265 has been changed to Demo/HCS12_CodeWarrior_small (as in 'small'
\r
2267 + MC9S12F32 demo updated slightly to use the PLL. The CPU speed for the
\r
2268 demo application is now 24MHz. Previously it was 8MHz.
\r
2269 + The demo application file Demo/Common/Minimal/death.c has a slight
\r
2270 alteration to prevent it using floating point variables.
\r
2273 Changes between V3.0.0 and V3.1.0 - Released 11th June, 2005
\r
2275 + Added new ports for ST Microsystems STR71x, and Freescale HCS12
\r
2276 microcontrollers. Currently the HCS12 port is limited to the small
\r
2277 memory model. Large memory models will be supported in the next
\r
2279 + PIC18 wizC port updated. Thanks to Marcel van Lieshout for his
\r
2280 continuing contribution.
\r
2281 + The accuracy of the AVR port timer setup has been improved. Thanks to
\r
2282 Thomas Krutmann for this contribution.
\r
2283 + Added a new conditional compilation macro configIDLE_SHOULD_YIELD.
\r
2284 See the WEB documentation for details.
\r
2285 + Updated the CrossWorks uIP demo to build with V1.4 of CrossWorks.
\r
2286 + Slight modification to the SAM7 release build configuration to correct
\r
2287 an include path definition.
\r
2288 + Updated the MPLAB PIC18 documentation to provide extra details on linker
\r
2289 file configuration.
\r
2291 Changes between V3.0.0 and V2.6.1 - Released 23rd April, 2005
\r
2293 V3.0.0 includes many enhancements, so this history list is broken into
\r
2294 subsections as follows:
\r
2298 Directory name changes
\r
2299 Kernel and miscellaneous changes changes
\r
2303 + Each port now defines BaseType_t as the data type that is most
\r
2304 efficient for that architecture. The type BaseType_t is used
\r
2305 extensively in API calls necessitating the following changes to the
\r
2306 FreeRTOS API function prototypes.
\r
2308 See the "New for V3.0.0" section of the FreeRTOS online
\r
2309 documentation for full details of API changes.
\r
2313 + The AT91FR40008 ARM7 port contributed by John Feller is now included
\r
2314 in the download (thanks John!).
\r
2315 + The PIC18 port for the wizC/fedC compiler contributed by Marcel van
\r
2316 Lieshout is now included in the download (thanks Marcel!).
\r
2317 + The IAR port for the AVR microcontroller has been upgraded to V3.0.0
\r
2318 and is now a supported port.
\r
2320 - Directory name changes
\r
2322 For consistency, and to allow integration of the new ports, the
\r
2323 following directory names have been changed.
\r
2325 + The source/portable/GCC/ARM7 directory has been renamed
\r
2326 source/portable/GCC/ARM7_LPC2000 so it is compatible with the naming
\r
2327 of other GCC ARM7 ports.
\r
2328 + The Demo/PIC directory has been renamed Demo/PIC18_MPLAB to
\r
2329 accommodate the wizC/fedC PIC port.
\r
2330 + The demo applications for the two AVR ports no longer share the same
\r
2331 directory. The WinAVR demo is in the Demo/AVR_ATMega323_WinAVR
\r
2332 directory and the IAR port in the Demo/AVR_ATMega323_IAR directory.
\r
2335 - Kernel and miscellaneous changes changes
\r
2337 See the "New for V3.0.0" section of the FreeRTOS online
\r
2338 documentation for more information.
\r
2340 + Previously 'portmacro.h' contained some user editable definitions
\r
2341 relating to the user application, and some fixed definitions relating
\r
2342 specifically to the port being used. The application specific
\r
2343 definitions have been removed from 'portmacro.h' and placed inside a
\r
2344 new header file called 'FreeRTOSConfig.h'. 'portmacro.h' should now
\r
2345 never be modified by the user. A 'FreeRTOSConfig.h' is now included
\r
2346 in each of FreeRTOS/Demo subdirectories - as it's settings relate to
\r
2347 the demo application rather than being specific to the port.
\r
2348 + Introduced configUSE_IDLE_HOOK in idle task.
\r
2349 + The idle task will yield when another idle priority task is ready to
\r
2350 run. Previously the idle task would run to the end of its time slice
\r
2352 + The idle task is now created when the scheduler is started. This
\r
2353 requires less stack than the previous scheme where it was created upon
\r
2354 creation of the first application task.
\r
2355 + The function usPortCheckFreeStackSpace() has been renamed
\r
2356 usTaskCheckFreeStackSpace() and moved from the portable layer to
\r
2358 + Corrected spelling of portMINMAL_STACK_SIZE to portMINIMAL_STACK_SIZE.
\r
2359 + The portheap.c file included with the AVR port has been deleted. The
\r
2360 AVR demo now uses the standard heap1 sample memory allocator.
\r
2361 + The GCC AVR port is now build using the standard make utility. The
\r
2362 batch files used previously have been deleted. This means a recent
\r
2363 version of WinAVR is required in order to create a binary suitable for
\r
2364 source level debugging.
\r
2365 + vTaskStartScheduler() no longer takes the configUSE_PREEMPTION
\r
2366 constant as a parameter. Instead the constant is used directly within
\r
2367 tasks.c and no parameter is required.
\r
2368 + The header file 'FreeRTOS.h' has been created and is used to include
\r
2369 'projdefs.h', 'FreeRTOSConfig.h' and 'portable.h' in the necessary
\r
2370 order. FreeRTOS.h can now be included in place of these other
\r
2372 + The header file 'errors.h' has been deleted. The definitions it
\r
2373 contained are now located within 'projdefs.h'.
\r
2374 + pvPortMalloc() now takes a size_t parameter as per the ANSI malloc().
\r
2375 Previously an unsigned short was used.
\r
2376 + When resuming the scheduler a yield is performed if either a tick has
\r
2377 been missed, or a task is moved from the pending ready list into a
\r
2378 ready list. Previously a yield was not performed on this second
\r
2380 + In heap1.c an overflow check has been added to ensure the next free
\r
2381 byte variable does not wrap around.
\r
2382 + Introduced the portTASK_FUNCTION() and portTASK_FUNCTION_PROTO()
\r
2384 + The MPLAB PIC port now saved the TABLAT register in interrupt service
\r
2387 Changes between V2.6.0 and V2.6.1 - Released Feb 22, 2005
\r
2389 This version adds support for the H8 processor.
\r
2393 + tskMAX_TASK_NAME_LEN removed from the task.h header and added to each
\r
2394 individual portmacro.h file as portMAX_TASK_NAME_LEN. This allows RAM
\r
2395 limited ports to allocate fewer characters to the task name.
\r
2396 + AVR port - Replaced the inb() and outb() functions with direct memory
\r
2397 access. This allows the port to be built with the 20050414 build of
\r
2399 + GCC LPC2106 port - removed the 'static' from the definition of
\r
2400 vNonPreemptiveTick() to allow the demo to link when using the cooperative
\r
2402 + GCC LPC2106 port - Corrected the optimisation options in the batch files
\r
2403 ROM_THUMB.bat, RAM_THUMB.bat, ROM_ARM.bat and RAM_ARM.bat. The lower case
\r
2404 -o is replaced by an uppercase -O.
\r
2405 + Tasks.c - The strcpy call has been removed when copying across the task
\r
2406 name into the TCB.
\r
2407 + Updated the trace visualisation to always be 4 byte aligned so it can be
\r
2408 used on ARM architectures.
\r
2409 + There are now two tracecon executables (that convert the trace file binary
\r
2410 into an ASCII file). One for big endian targets and one for little endian
\r
2412 + Added ucTasksDeleted variable to prevent vTaskSuspendAll() being called
\r
2413 too often in the idle task.
\r
2414 + SAM7 USB driver - Replaced the duplicated RX_DATA_BK0 in the interrupt
\r
2415 mask with the RX_DATA_BK1.
\r
2418 Changes between V2.5.5 and V2.6.0 - Released January 16, 2005
\r
2420 + Added the API function vTaskDelayUntil(). The demo app file
\r
2421 Demo/Common/Minimal/flash.c has been updated to demonstrate its use.
\r
2422 + Added INCLUDE_vTaskDelay conditional compilation.
\r
2423 + Changed the name of the Demo/ARM7_AtmelSAM7S64_IAR directory to
\r
2424 Demo/ARM7_AT91SAM7S64_IAR for consistency.
\r
2425 + Modified the AT91SAM7S USB driver to allow descriptors that have
\r
2426 a length that is an exact multiple of the FIFO to be transmitted.
\r
2428 Changes between V2.5.4 and V2.5.5 - Released January 3, 2005
\r
2430 This version adds support for the Atmel SAM7 ARM7 microcontrollers
\r
2431 along with the IAR development tools.
\r
2435 + Renamed the Demo/ARM7 directory to Demo/ARM7_LPC2106_GCC.
\r
2436 + Renamed the Demo/ARM7_Keil directory to Demo/ARM7_LPC2129_Keil.
\r
2437 + Modified the Philips ARM7 serial interrupt service routines to only
\r
2438 process one interrupt per call. This seems to enable the ISR to
\r
2439 operate more quickly.
\r
2440 + Removed the 'far' keyword from the Open Watcom portable layer source
\r
2441 files. This allows their use with V1.3 of Open Watcom.
\r
2442 + Minor modifications to the SDCC build files to allow their use under
\r
2443 Linux. Thanks to Frieder Ferlemann for this contribution.
\r
2444 + Small change to sTaskCreate() to allow a context switch even when
\r
2445 pxCreatedTask is NULL. Thanks to Kamil for this contribution.
\r
2446 + inline keyword removed from vTaskSwitchContext() and VTaskIncrementTick()
\r
2449 Changes between V2.5.3 and V2.5.4 - Released Dec 1, 2004
\r
2451 This is an important maintenance release.
\r
2453 The function cTaskResumeAll() has been modified so it can be used safely
\r
2454 prior to the kernel being initialised. This was an issue as
\r
2455 cTaskResumeAll() is called from pvPortMalloc(). Thanks to Daniel Braun
\r
2456 for highlighting this issue.
\r
2458 Changes between V2.5.2 and V2.5.3 - Released Nov 2, 2004
\r
2460 The critical section handling functions have been changed for the GCC ARM7
\r
2461 port. Some optimisation levels use the stack differently to others. This
\r
2462 means the interrupt flags cannot always be stored on the stack and are
\r
2463 instead now stored in a variable, which is then saved as part of the
\r
2464 tasks context. This allows the GCC ARM7 port to be used at all
\r
2465 optimisation levels - including -Os.
\r
2467 Other minor changes:
\r
2469 + MSP430 definition of usCriticalNesting now uses the volatile qualifier.
\r
2470 This is probably not required but added just in case.
\r
2472 Changes between V2.5.1 and V2.5.2 - Released Oct 26, 2004
\r
2474 + Added the Keil ARM7 port.
\r
2475 + Slight modification to comtest.c to make the delay periods more random.
\r
2476 This creates a better test condition.
\r
2478 Changes between V2.5.0 and V2.5.1 - Released Oct 9, 2004
\r
2480 + Added the MSP430 port.
\r
2481 + Extra comments added to the GCC ARM7 port.c and portISR.c files.
\r
2482 + The memory pool allocated within heap_1.c has been placed within a
\r
2483 structure to ensure correct memory alignment on 32bit systems.
\r
2484 + Within the GCC ARM7 serial drivers an extra check is made to ensure
\r
2485 the post to the queue was successful if then attempting immediately
\r
2486 retrieve the posted character.
\r
2487 + Changed the name of the constant portTICKS_PER_MS to portTICK_PERIOD_MS
\r
2488 as the old name was misleading.
\r
2491 Changes between V2.4.2 and V2.5.0 - Released Aug 12, 2004
\r
2493 The RTOS source code download now includes three separate memory allocation
\r
2494 schemes - so you can choose the most appropriate for your application.
\r
2495 These are found in the Source/Portable/MemMang directory. The demo
\r
2496 application projects have also been updated to demonstrate the new schemes.
\r
2497 See the "Memory Management" page of the API documentation for more details.
\r
2499 + Added heap_1.c, heap_2.c and heap_3.c in the Source/Portable/MemMang
\r
2501 + Replaced the portheap.c files for each demo application with one of the
\r
2502 new memory allocation files.
\r
2503 + Updated the portmacro.h file for each demo application to include the
\r
2504 constants required for the new memory allocators: portTOTAL_HEAP_SIZE and
\r
2505 portBYTE_ALIGNMENT.
\r
2506 + Added a new test to the ARM7 demo application that tests the operation
\r
2507 of the heap_2 memory allocator.
\r
2510 Changes between V2.4.1 and V2.4.2 - Released July 14, 2004
\r
2512 + The ARM7 port now supports THUMB mode.
\r
2513 + Modification to the ARM7 demo application serial port driver.
\r
2515 Changes between V2.4.0 and V2.4.1 - Released July 2, 2004
\r
2517 + Rationalised the ARM7 port version of portEXIT_CRITICAL() -
\r
2518 improvements provided by Bill Knight.
\r
2519 + Made demo serial driver more complete and robust.
\r
2522 Changes between V2.4.0 and V2.3.1 - Released June 30, 2004
\r
2524 + Added the first ARM7 port - thanks to Bill Knight for the assistance
\r
2526 + Added extra files to the Demo/Common/Minimal directory. These are
\r
2527 equivalent to their Demo/Common/Full counterparts but with the
\r
2528 calls to the functions defined in print.c removed.
\r
2529 + Added TABLAT to the list of registers saved as part of a PIC18 context.
\r
2531 Changes between V2.3.0 and V2.3.1 - Released June 25, 2004
\r
2533 + Changed the way the vector table is defined to be more portable.
\r
2534 + Corrected the definitions of SPH and SPL in portmacro.s90.
\r
2535 The previous definitions prevented V2.3.0 operating if the iom323.h
\r
2536 header file was included in portmacro.s90.
\r
2538 Changes between V2.2.0 and V2.3.0 - Released June 19, 2004
\r
2540 + Added an AVR port that uses the IAR compiler.
\r
2541 + Explicit use of 'signed' qualifier on plain char types.
\r
2542 + Modified the Open Watcom project files to use 'signed' as the
\r
2543 default char type.
\r
2544 + Changed odd calculation of initial pxTopOfStack value when
\r
2545 portSTACK_GROWTH < 0.
\r
2546 + Added inline qualifier to context switch functions within task.c.
\r
2547 Ports that do not support the (non ANSI) inline keyword have the
\r
2548 inline #define'd away in their respective portmacro.h files.
\r
2550 Changes between V2.1.1 and V2.2.0 - Released May 18, 2004
\r
2552 + Added Cygnal 8051 port.
\r
2553 + PCLATU and PCLATH are now saved as part of the PIC18 context. This
\r
2554 allows function pointers to be used within tasks. Thanks to Javier
\r
2555 Espeche for the enhancement.
\r
2556 + Minor changes to demo application files to reduce stack usage.
\r
2557 + Minor changes to prevent compiler warnings when compiling the new port.
\r
2559 Changes between V2.1.0 and V2.1.1 - Released March 12, 2004
\r
2561 + Bug fix - pxCurrentTCB is now initialised before the call to
\r
2562 prvInitialiseTaskLists(). Previously pxCurrentTCB could be accessed
\r
2563 while null during the initialisation sequence. Thanks to Giuseppe
\r
2564 Franco for the correction.
\r
2566 Changes between V2.0.0 and V2.1.0 - Released Feb 29, 2004
\r
2568 V2.1.0 has significant reworks that greatly reduce the amount of time
\r
2569 the kernel has interrupts disabled. The first section of modifications
\r
2570 listed here must be taken into account by users. The second section
\r
2571 are related to the kernel implementation and as such are transparent.
\r
2575 + The typedef TickType_t has been introduced. All delay times should
\r
2576 now use a variable of type TickType_t in place of the unsigned long's
\r
2577 used previously. API function prototypes have been updated
\r
2579 + The configuration macro USE_16_BIT_TICKS has been introduced. If set
\r
2580 to 1 TickType_t is defined as an unsigned short. If set to 0
\r
2581 TickType_t is defined as an unsigned long. See the configuration
\r
2582 section of the API documentation for more details.
\r
2583 + The configuration macro INCLUDE_vTaskSuspendAll is now obsolete.
\r
2584 + vTaskResumeAll() has been renamed cTaskResumeAll() as it now returns a
\r
2585 value (see the API documentation).
\r
2586 + ulTaskGetTickCount() has been renamed xTaskGetTickCount() as the type
\r
2587 it returns now depends on the USE_16_BIT_TICKS definition.
\r
2588 + cQueueReceive() must now >never< be used from within an ISR. Use the new
\r
2589 cQueueReceiveFromISR() function instead.
\r
2593 + A mechanism has been introduced that allows a queue to be accessed by
\r
2594 a task and ISR simultaneously.
\r
2595 + A "pending ready" queue has been introduced that enables interrupts to
\r
2596 be processed when the scheduler is suspended.
\r
2597 + The list implementation has been improved to provide faster item
\r
2599 + The scheduler now makes use of the scheduler suspend mechanism in places
\r
2600 where previously interrupts were disabled.
\r
2602 Changes between V1.2.6 and V2.0.0 - Released Jan 31, 2004
\r
2604 + Introduced new API functions:
\r
2605 vTaskPriorityGet ()
\r
2606 vTaskPrioritySet ()
\r
2609 vTaskSuspendAll ()
\r
2611 + Added conditional compilation options that allow the components of the
\r
2612 kernel that are unused by an application to be excluded from the build.
\r
2613 See the Configuration section on the WEB site for more information (on
\r
2614 the API pages). The macros have been added to each portmacro.h file (
\r
2615 sometimes called prtmacro.h).
\r
2616 + Rearranged tasks.c.
\r
2617 + Added demo application file dynamic.c.
\r
2618 + Updated the PC demo application to make use of dynamic.c.
\r
2619 + Updated the documentation contained in the kernel header files.
\r
2620 + Creating a task now causes a context switch if the task being created
\r
2621 has a higher priority than the calling task - assuming the kernel is
\r
2623 + vTaskDelete() now only causes a context switch if the calling task is
\r
2624 the task being deleted.
\r
2626 Changes between V1.2.5 and V1.2.6 - Released December 31, 2003
\r
2628 Barring the change to the interrupt vector (PIC port) these are minor
\r
2631 + The interrupt vector used for the PIC master ISR has been changed from
\r
2632 0x18 to 0x08 - where it should have always been. The incorrect address
\r
2633 still works but probably executes a number of NOP's before getting to the
\r
2635 + Changed the baud rate used by the AVR demo application to 38400. This
\r
2636 has an error percentage of less than one percent with an 8MHz clock.
\r
2637 + Raised the priority of the Rx task in demo\full\comtest.c. This only
\r
2638 affects the Flashlite and PC ports. This was done to prevent the Rx
\r
2639 buffer becoming full.
\r
2640 + Reverted the Flashlite COM port driver back so it does not use the DMA.
\r
2641 The DMA appears to miss characters under stress. The Borland Flashlite
\r
2642 port was also calculating a register value incorrectly resulting in the
\r
2643 wrong DMA source address being used. The same code worked fine when
\r
2644 compiling with Open Watcom. Other minor enhancements were made to the
\r
2645 interrupt handling.
\r
2646 + Modified the PIC serial Rx ISR to check for and clear overrun errors.
\r
2647 Overrun errors seem to prevent any further characters being received.
\r
2648 + The PIC demo projects now have some optimisation switched on.
\r
2651 Changes between V1.2.4 and V1.2.5
\r
2653 Small fix made to the PIC specific port.c file described below.
\r
2655 + Introduced portGLOBAL_INTERRUPT_FLAG definition to test the global
\r
2656 interrupt flag setting. Using the two bits defined within
\r
2657 portINITAL_INTERRUPT_STATE was causing the w register to get clobbered
\r
2658 before the test was performed.
\r
2660 Changes between V1.2.3 and V1.2.4
\r
2662 V1.2.4 contains a release version of the PIC18 port.
\r
2663 An optional exception has been included with the GPL. See the licensing
\r
2664 section of www.FreeRTOS.org for details.
\r
2666 + The function xPortInitMinimal() has been renamed to
\r
2667 xSerialPortInitMinimal() and the function xPortInit() has been renamed
\r
2668 to xSerialPortInit().
\r
2669 + The function sSerialPutChar() has been renamed cSerialPutChar() and
\r
2670 the function return type chaned to portCHAR.
\r
2671 + The integer and flop tasks now include calls to tskYIELD(), allowing
\r
2672 them to be used with the cooperative scheduler.
\r
2673 + All the demo applications now use the integer and comtest tasks when the
\r
2674 cooperative scheduler is being used. Previously they were only used with
\r
2675 the preemptive scheduler.
\r
2676 + Minor changes made to operation of minimal versions of comtest.c and
\r
2678 + The ATMega port definition of portCPU_CLOSK_HZ definition changed to
\r
2679 8MHz base 10, previously it base 16.
\r
2683 Changes between V1.2.2a and V1.2.3
\r
2685 The only change of any significance is to the license, which has changed
\r
2686 from the Open Software License to the GNU GPL.
\r
2688 The zip file also contains a pre-release version of the PIC18 port. This
\r
2689 has not yet completed testing and as such does not constitute part of the
\r
2690 V1.2.3 release. It is still however covered by the GNU GPL.
\r
2692 There are minor source code changes to accommodate the PIC C compiler.
\r
2693 These mainly involve more explicit casting.
\r
2695 + sTaskCreate() has been modified slightly to make use of the
\r
2696 portSTACK_GROWTH macro. This is required for the PIC port where the
\r
2697 stack grows in the opposite direction to the other existing ports.
\r
2698 + prvCheckTasksWaitingTermination() has been modified slightly to bring
\r
2699 the decrementing of usCurrentNumberOfTasks within the critical section,
\r
2700 where it should have been since the creation of an eight bit port.
\r
2702 Changes between V1.2.2 and V1.2.2a
\r
2704 The makefile and buildcoff.bat files included with the AVR demo application
\r
2705 have been modified for use with the September 2003 build of WinAVR. No
\r
2706 source files have changed.
\r
2708 Changes between V1.2.1 and V1.2.2
\r
2710 There are only minor changes here to allow the PC and Flashlite 186 ports
\r
2711 to use the Borland V4.52 compiler, as supplied with the Flashlite 186
\r
2714 + Introduced a BCC directory under source\portable. This contains all the
\r
2715 files specific to the Borland compiler port.
\r
2716 + Corrected the macro naming of portMS_PER_TICK to portTICKS_PER_MS.
\r
2717 + Modified comtest.c to increase the rate at which the string is
\r
2718 transmitted and received on the serial port. The Flashlite 186 demo
\r
2719 app baud rate has also been increased.
\r
2720 + The values of the constants used in both integer.c files have been
\r
2721 increased to force the Borland compiler to use 32 bit values. The
\r
2722 Borland optimiser placed the previous values in 16 bit registers, and in
\r
2723 So doing invalidated the test.
\r
2725 Changes between V1.2.0 and V1.2.1
\r
2727 This version includes some minor changes to the list implementation aimed
\r
2728 at improving the context switch time - with is now approximately 10% faster.
\r
2729 Changes include the removal of some null pointer assignment checks. These
\r
2730 were redundant where the scheduler uses the list functions, but means any
\r
2731 user application choosing to use the same list functions must now check
\r
2732 that no NULL pointers are passed as a parameter.
\r
2734 The Flashlite 186 serial port driver has also been modified to use a DMA
\r
2735 channel for transmissions. The serial driver is fully functional but still
\r
2736 under development. Flashlite users may prefer to use V1.2.0 for now.
\r
2740 + Changed the baud rate for the ATMega323 serial test from 19200 to 57600.
\r
2741 + Use vSerialPutString() instead of single character puts in
\r
2742 Demo\Full\Comtest.c. This allows the use of the flashlite DMA serial
\r
2743 driver. Also the check variable only stops incrementing after two
\r
2744 consecutive failures.
\r
2745 + semtest.c creates four tasks, two of which operate at the idle priority.
\r
2746 The tasks that operate at the idle priority now use a lower expected
\r
2747 count than those running at a higher priority. This prevents the low
\r
2748 priority tasks from signalling an error because they have not been
\r
2749 scheduled enough time for each of them to count the shared variable to
\r
2750 the higher original value.
\r
2751 + The flashlite 186 serial driver now uses a DMA channel for transmissions.
\r
2752 + Removed the volatile modifier from the list function parameters. This was
\r
2753 only ever included to prevent compiler warnings. Now warnings are
\r
2754 removed by casting parameters where the calls are made.
\r
2755 + prvListGetOwnerOfNextEntry() and prvListGetOwnerOfHeadEntry() have been
\r
2756 removed from list.c and added as macros in list.h.
\r
2757 + usNumberOfItems has been added to the list structure. This removes the
\r
2758 need for a pointer comparison when checking if a list is empty, and so
\r
2759 is slightly faster.
\r
2760 + Removed the NULL check in vListRemove(). This makes the call faster but
\r
2761 necessitates any application code utilising the list implementation to
\r
2762 ensure NULL pointers are not passed.
\r
2763 + Renamed portTICKS_PER_MS definition to portMS_PER_TICK (milli seconds
\r
2764 per tick). This is what it always should have been.
\r
2766 Changes between V1.01 and V1.2.0
\r
2768 The majority of these changes were made to accommodate the 8bit AVR port.
\r
2769 The scheduler workings have not changed, but some of the data types used
\r
2770 have been made more friendly to an eight bit environment.
\r
2774 + Changed the version numbering format.
\r
2776 + Split the directory demo\common into demo\common\minimal and
\r
2777 demo\common\full. The files in the full directory are for systems with
\r
2778 a display (currently PC and Flashlite 186 demo's). The files in the
\r
2779 minimal directory are for systems with limited RAM and no display
\r
2780 (currently MegaAVR).
\r
2781 + Minor changes to demo application function prototypes to make more use
\r
2782 of 8bit data types.
\r
2783 + Within the scheduler itself the following functions have slightly
\r
2784 modified declarations to make use of 8bit data types where possible:
\r
2788 usQueueMessageWaiting(),
\r
2789 sQueueSendFromISR(),
\r
2792 sSemaphoreGiveFromISR(),
\r
2794 sTaskMoveFromEventList().
\r
2796 Where the return type has changed the function name has also changed in
\r
2797 accordance with the naming convention. For example
\r
2798 usQueueMessageWaiting() has become ucQueueMessageWaiting().
\r
2799 + The definition tskMAX_PRIORITIES has been moved from task.h to
\r
2800 portmacro.h and renamed portMAX_PRIORITIES. This allows different
\r
2801 ports to allocate a different maximum number of priorities.
\r
2802 + By default the trace facility is off, previously USE_TRACE_FACILITY
\r
2804 + comtest.c now uses a psuedo random delay between sends. This allows for
\r
2805 better testing as the interrupts do not arrive at regular intervals.
\r
2806 + Minor change to the Flashlite serial port driver. The driver is written
\r
2807 to demonstrate the scheduler and is not written to be efficient.
\r
2811 Changes between V1.00 and V1.01
\r
2813 These changes improve the ports. The scheduler itself has not changed.
\r
2815 Improved context switch mechanism used when performing a context
\r
2816 switch from an ISR (both the tick ISR and the serial comms ISR's within
\r
2817 the demo application). The new mechanism is faster and uses less stack.
\r
2819 The assembler file portasm.asm has been replaced by a header file
\r
2820 portasm.h. This includes a few assembler macro definitions.
\r
2822 All saving and restoring of registers onto/off of the stack is now handled
\r
2823 by the compiler. This means the initial stack setup for a task has to
\r
2824 mimic the stack used by the compiler, which is different for debug and
\r
2827 Slightly changed the operation of the demo application, details below.
\r
2831 + portSWITCH_CONTEXT() replaced by vPortFirstContext().
\r
2832 + pxPortInitialiseStack() modified to replicate the stack used by the
\r
2834 + portasm.asm file removed.
\r
2835 + portasm.h introduced. This contains macro definitions for
\r
2836 portSWITCH_CONTEXT() and portFIRST_CONTEXT().
\r
2837 + Context switch from ISR now uses the compiler generated interrupt
\r
2838 mechanism. This is done simply by calling portSWITCH_CONTEXT and leaving
\r
2839 the save/restore to compiler generated code.
\r
2840 + Calls to taskYIELD() during ISR's have been replaced by calling the
\r
2841 simpler and faster portSWITCH_CONTEXT().
\r
2842 + The Flashlite 186 port now uses 186 instruction set (used to use 80x86
\r
2843 instructions only).
\r
2844 + The blocking queue tasks within the demo application did not operate
\r
2845 quite as described. This has been corrected.
\r
2846 + The priority of the comtest Rx task within the demo application has been
\r
2847 lowered. Received characters are now processed (read from the queue) at
\r
2848 the idle priority, allowing low priority tasks to run evenly at times of
\r
2849 a high communications overhead.
\r
2850 + Prevent the call to kbhit() in main.c for debug builds as the debugger
\r
2851 seems to have problems stepping over the call. This if for the PC port
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begriffs.com / projects / freertos / blob