]> begriffs open source - freertos/blob - portable/IAR/RX700v3_DPFPU/port.c
[AUTO][RELEASE]: Bump file header version to "10.5.0"
[freertos] / portable / IAR / RX700v3_DPFPU / port.c
1 /*
2  * FreeRTOS Kernel V10.5.0
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
8  * this software and associated documentation files (the "Software"), to deal in
9  * the Software without restriction, including without limitation the rights to
10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11  * the Software, and to permit persons to whom the Software is furnished to do so,
12  * subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in all
15  * copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * https://www.FreeRTOS.org
25  * https://github.com/FreeRTOS
26  *
27  */
28
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the RXv3 DPFPU port.
31 *----------------------------------------------------------*/
32
33 #warning Testing for DFPU support in this port is not yet complete
34
35 /* Scheduler includes. */
36 #include "FreeRTOS.h"
37 #include "task.h"
38
39 /* Library includes. */
40 #include "string.h"
41
42 /* Hardware specifics. */
43 #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
44
45     #include "platform.h"
46
47 #else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
48
49     #include "iodefine.h"
50
51 #endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
52
53 /*-----------------------------------------------------------*/
54
55 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
56  * PSW is set with U and I set, and PM and IPL clear. */
57 #define portINITIAL_PSW     ( ( StackType_t ) 0x00030000 )
58 #define portINITIAL_FPSW    ( ( StackType_t ) 0x00000100 )
59 #define portINITIAL_DPSW    ( ( StackType_t ) 0x00000100 )
60 #define portINITIAL_DCMR    ( ( StackType_t ) 0x00000000 )
61 #define portINITIAL_DECNT   ( ( StackType_t ) 0x00000001 )
62
63 /* Tasks are not created with a DPFPU context, but can be given a DPFPU context
64  * after they have been created.  A variable is stored as part of the tasks context
65  * that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
66  * any other value if the task does have a DPFPU context. */
67 #define portNO_DPFPU_CONTEXT    ( ( StackType_t ) 0 )
68 #define portHAS_DPFPU_CONTEXT   ( ( StackType_t ) 1 )
69
70 /* The space on the stack required to hold the DPFPU data registers.  This is 16
71  * 64-bit registers. */
72 #define portDPFPU_DATA_REGISTER_WORDS   ( 16 * 2 )
73
74 /*-----------------------------------------------------------*/
75
76 /*
77  * Function to start the first task executing - written in asm code as direct
78  * access to registers is required.
79  */
80 static void prvStartFirstTask( void );
81
82 /*
83  * Software interrupt handler.  Performs the actual context switch (saving and
84  * restoring of registers).  Written in asm code as direct register access is
85  * required.
86  */
87 __interrupt void vSoftwareInterruptISR( void );
88
89 /*
90  * The tick ISR handler.  The peripheral used is configured by the application
91  * via a hook/callback function.
92  */
93 __interrupt void vTickISR( void );
94
95 /*-----------------------------------------------------------*/
96
97 /* Saved as part of the task context.  If ulPortTaskHasDPFPUContext is non-zero
98  * then a DPFPU context must be saved and restored for the task. */
99 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
100
101     StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
102
103 #endif /* configUSE_TASK_DPFPU_SUPPORT */
104
105 /* This is accessed by the inline assembler functions so is file scope for
106  * convenience. */
107 extern void * pxCurrentTCB;
108 extern void vTaskSwitchContext( void );
109
110 /*-----------------------------------------------------------*/
111
112 /*
113  * See header file for description.
114  */
115 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
116                                      TaskFunction_t pxCode,
117                                      void * pvParameters )
118 {
119     /* R0 is not included as it is the stack pointer. */
120
121     *pxTopOfStack = 0x00;
122     pxTopOfStack--;
123     *pxTopOfStack = portINITIAL_PSW;
124     pxTopOfStack--;
125     *pxTopOfStack = ( StackType_t ) pxCode;
126
127     /* When debugging it can be useful if every register is set to a known
128      * value.  Otherwise code space can be saved by just setting the registers
129      * that need to be set. */
130     #ifdef USE_FULL_REGISTER_INITIALISATION
131         {
132             pxTopOfStack--;
133             *pxTopOfStack = 0xffffffff; /* r15. */
134             pxTopOfStack--;
135             *pxTopOfStack = 0xeeeeeeee;
136             pxTopOfStack--;
137             *pxTopOfStack = 0xdddddddd;
138             pxTopOfStack--;
139             *pxTopOfStack = 0xcccccccc;
140             pxTopOfStack--;
141             *pxTopOfStack = 0xbbbbbbbb;
142             pxTopOfStack--;
143             *pxTopOfStack = 0xaaaaaaaa;
144             pxTopOfStack--;
145             *pxTopOfStack = 0x99999999;
146             pxTopOfStack--;
147             *pxTopOfStack = 0x88888888;
148             pxTopOfStack--;
149             *pxTopOfStack = 0x77777777;
150             pxTopOfStack--;
151             *pxTopOfStack = 0x66666666;
152             pxTopOfStack--;
153             *pxTopOfStack = 0x55555555;
154             pxTopOfStack--;
155             *pxTopOfStack = 0x44444444;
156             pxTopOfStack--;
157             *pxTopOfStack = 0x33333333;
158             pxTopOfStack--;
159             *pxTopOfStack = 0x22222222;
160             pxTopOfStack--;
161         }
162     #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
163         {
164             pxTopOfStack -= 15;
165         }
166     #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
167
168     *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
169     pxTopOfStack--;
170     *pxTopOfStack = portINITIAL_FPSW;
171     pxTopOfStack--;
172     *pxTopOfStack = 0x11111111; /* Accumulator 1. */
173     pxTopOfStack--;
174     *pxTopOfStack = 0x22222222; /* Accumulator 1. */
175     pxTopOfStack--;
176     *pxTopOfStack = 0x33333333; /* Accumulator 1. */
177     pxTopOfStack--;
178     *pxTopOfStack = 0x44444444; /* Accumulator 0. */
179     pxTopOfStack--;
180     *pxTopOfStack = 0x55555555; /* Accumulator 0. */
181     pxTopOfStack--;
182     *pxTopOfStack = 0x66666666; /* Accumulator 0. */
183
184     #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
185         {
186             /* The task will start without a DPFPU context.  A task that
187              * uses the DPFPU hardware must call vPortTaskUsesDPFPU() before
188              * executing any floating point instructions. */
189             pxTopOfStack--;
190             *pxTopOfStack = portNO_DPFPU_CONTEXT;
191         }
192     #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
193         {
194             /* The task will start with a DPFPU context.  Leave enough
195              * space for the registers - and ensure they are initialised if desired. */
196             #ifdef USE_FULL_REGISTER_INITIALISATION
197                 {
198                     pxTopOfStack -= 2;
199                     *(double *)pxTopOfStack = 1515.1515; /* DR15. */
200                     pxTopOfStack -= 2;
201                     *(double *)pxTopOfStack = 1414.1414; /* DR14. */
202                     pxTopOfStack -= 2;
203                     *(double *)pxTopOfStack = 1313.1313; /* DR13. */
204                     pxTopOfStack -= 2;
205                     *(double *)pxTopOfStack = 1212.1212; /* DR12. */
206                     pxTopOfStack -= 2;
207                     *(double *)pxTopOfStack = 1111.1111; /* DR11. */
208                     pxTopOfStack -= 2;
209                     *(double *)pxTopOfStack = 1010.1010; /* DR10. */
210                     pxTopOfStack -= 2;
211                     *(double *)pxTopOfStack =  909.0909; /* DR9. */
212                     pxTopOfStack -= 2;
213                     *(double *)pxTopOfStack =  808.0808; /* DR8. */
214                     pxTopOfStack -= 2;
215                     *(double *)pxTopOfStack =  707.0707; /* DR7. */
216                     pxTopOfStack -= 2;
217                     *(double *)pxTopOfStack =  606.0606; /* DR6. */
218                     pxTopOfStack -= 2;
219                     *(double *)pxTopOfStack =  505.0505; /* DR5. */
220                     pxTopOfStack -= 2;
221                     *(double *)pxTopOfStack =  404.0404; /* DR4. */
222                     pxTopOfStack -= 2;
223                     *(double *)pxTopOfStack =  303.0303; /* DR3. */
224                     pxTopOfStack -= 2;
225                     *(double *)pxTopOfStack =  202.0202; /* DR2. */
226                     pxTopOfStack -= 2;
227                     *(double *)pxTopOfStack =  101.0101; /* DR1. */
228                     pxTopOfStack -= 2;
229                     *(double *)pxTopOfStack = 9876.54321;/* DR0. */
230                 }
231             #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
232                 {
233                     pxTopOfStack -= portDPFPU_DATA_REGISTER_WORDS;
234                     memset( pxTopOfStack, 0x00, portDPFPU_DATA_REGISTER_WORDS * sizeof( StackType_t ) );
235                 }
236             #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
237             pxTopOfStack--;
238             *pxTopOfStack = portINITIAL_DECNT; /* DECNT. */
239             pxTopOfStack--;
240             *pxTopOfStack = portINITIAL_DCMR;  /* DCMR. */
241             pxTopOfStack--;
242             *pxTopOfStack = portINITIAL_DPSW;  /* DPSW. */
243         }
244     #elif ( configUSE_TASK_DPFPU_SUPPORT == 0 )
245         {
246             /* Omit DPFPU support. */
247         }
248     #else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
249         {
250             #error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
251         }
252     #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
253
254     return pxTopOfStack;
255 }
256 /*-----------------------------------------------------------*/
257
258 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
259
260     void vPortTaskUsesDPFPU( void )
261     {
262         /* A task is registering the fact that it needs a DPFPU context.  Set the
263          * DPFPU flag (which is saved as part of the task context). */
264         ulPortTaskHasDPFPUContext = portHAS_DPFPU_CONTEXT;
265     }
266
267 #endif /* configUSE_TASK_DPFPU_SUPPORT */
268 /*-----------------------------------------------------------*/
269
270 BaseType_t xPortStartScheduler( void )
271 {
272     extern void vApplicationSetupTimerInterrupt( void );
273
274     /* Use pxCurrentTCB just so it does not get optimised away. */
275     if( pxCurrentTCB != NULL )
276     {
277         /* Call an application function to set up the timer that will generate the
278          * tick interrupt.  This way the application can decide which peripheral to
279          * use.  A demo application is provided to show a suitable example. */
280         vApplicationSetupTimerInterrupt();
281
282         /* Enable the software interrupt. */
283         _IEN( _ICU_SWINT ) = 1;
284
285         /* Ensure the software interrupt is clear. */
286         _IR( _ICU_SWINT ) = 0;
287
288         /* Ensure the software interrupt is set to the kernel priority. */
289         _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
290
291         /* Start the first task. */
292         prvStartFirstTask();
293     }
294
295     /* Should not get here. */
296     return pdFAIL;
297 }
298 /*-----------------------------------------------------------*/
299
300 void vPortEndScheduler( void )
301 {
302     /* Not implemented in ports where there is nothing to return to.
303      * Artificially force an assert. */
304     configASSERT( pxCurrentTCB == NULL );
305
306     /* The following line is just to prevent the symbol getting optimised away. */
307     ( void ) vTaskSwitchContext();
308 }
309 /*-----------------------------------------------------------*/
310
311 static void prvStartFirstTask( void )
312 {
313     __asm volatile
314     (
315
316         /* When starting the scheduler there is nothing that needs moving to the
317          * interrupt stack because the function is not called from an interrupt.
318          * Just ensure the current stack is the user stack. */
319         "SETPSW         U                                               \n"\
320
321
322         /* Obtain the location of the stack associated with which ever task
323          * pxCurrentTCB is currently pointing to. */
324         "MOV.L          #_pxCurrentTCB, R15             \n"\
325         "MOV.L          [R15], R15                              \n"\
326         "MOV.L          [R15], R0                               \n"\
327
328
329         /* Restore the registers from the stack of the task pointed to by
330          * pxCurrentTCB. */
331
332         #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
333
334             /* The restored ulPortTaskHasDPFPUContext is to be zero here.
335              * So, it is never necessary to restore the DPFPU context here. */
336             "POP                R15                                                                     \n"\
337             "MOV.L              #_ulPortTaskHasDPFPUContext, R14        \n"\
338             "MOV.L              R15, [R14]                                                      \n"\
339
340         #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
341
342             /* Restore the DPFPU context. */
343             "DPOPM.L    DPSW-DECNT                              \n"\
344             "DPOPM.D    DR0-DR15                                \n"\
345
346         #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
347
348         "POP            R15                                             \n"\
349
350         /* Accumulator low 32 bits. */
351         "MVTACLO        R15, A0                                 \n"\
352         "POP            R15                                             \n"\
353
354         /* Accumulator high 32 bits. */
355         "MVTACHI        R15, A0                                 \n"\
356         "POP            R15                                             \n"\
357
358         /* Accumulator guard. */
359         "MVTACGU        R15, A0                                 \n"\
360         "POP            R15                                             \n"\
361
362         /* Accumulator low 32 bits. */
363         "MVTACLO        R15, A1                                 \n"\
364         "POP            R15                                             \n"\
365
366         /* Accumulator high 32 bits. */
367         "MVTACHI        R15, A1                                 \n"\
368         "POP            R15                                             \n"\
369
370         /* Accumulator guard. */
371         "MVTACGU        R15, A1                                 \n"\
372         "POP            R15                                             \n"\
373
374         /* Floating point status word. */
375         "MVTC           R15, FPSW                               \n"\
376
377         /* R1 to R15 - R0 is not included as it is the SP. */
378         "POPM           R1-R15                                  \n"\
379
380         /* This pops the remaining registers. */
381         "RTE                                                            \n"\
382         "NOP                                                            \n"\
383         "NOP                                                            \n"
384     );
385 }
386 /*-----------------------------------------------------------*/
387
388 #pragma vector = VECT( ICU, SWINT )
389 __interrupt void vSoftwareInterruptISR( void )
390 {
391     __asm volatile
392     (
393         /* Re-enable interrupts. */
394         "SETPSW         I                                                       \n"\
395
396
397         /* Move the data that was automatically pushed onto the interrupt stack when
398          * the interrupt occurred from the interrupt stack to the user stack.
399          *
400          * R15 is saved before it is clobbered. */
401         "PUSH.L         R15                                                     \n"\
402
403         /* Read the user stack pointer. */
404         "MVFC           USP, R15                                        \n"\
405
406         /* Move the address down to the data being moved. */
407         "SUB            #12, R15                                        \n"\
408         "MVTC           R15, USP                                        \n"\
409
410         /* Copy the data across, R15, then PC, then PSW. */
411         "MOV.L          [ R0 ], [ R15 ]                         \n"\
412         "MOV.L          4[ R0 ], 4[ R15 ]                       \n"\
413         "MOV.L          8[ R0 ], 8[ R15 ]                       \n"\
414
415         /* Move the interrupt stack pointer to its new correct position. */
416         "ADD            #12, R0                                         \n"\
417
418         /* All the rest of the registers are saved directly to the user stack. */
419         "SETPSW         U                                                       \n"\
420
421         /* Save the rest of the general registers (R15 has been saved already). */
422         "PUSHM          R1-R14                                          \n"\
423
424         /* Save the FPSW and accumulators. */
425         "MVFC           FPSW, R15                                       \n"\
426         "PUSH.L         R15                                                     \n"\
427         "MVFACGU        #0, A1, R15                                     \n"\
428         "PUSH.L         R15                                                     \n"\
429         "MVFACHI        #0, A1, R15                                     \n"\
430         "PUSH.L         R15                                                     \n"\
431         "MVFACLO        #0, A1, R15                                     \n" /* Low order word. */ \
432         "PUSH.L         R15                                                     \n"\
433         "MVFACGU        #0, A0, R15                                     \n"\
434         "PUSH.L         R15                                                     \n"\
435         "MVFACHI        #0, A0, R15                                     \n"\
436         "PUSH.L         R15                                                     \n"\
437         "MVFACLO        #0, A0, R15                                     \n" /* Low order word. */ \
438         "PUSH.L         R15                                                     \n"\
439
440         #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
441
442             /* Does the task have a DPFPU context that needs saving?  If
443              * ulPortTaskHasDPFPUContext is 0 then no. */
444             "MOV.L              #_ulPortTaskHasDPFPUContext, R15        \n"\
445             "MOV.L              [R15], R15                                                      \n"\
446             "CMP                #0, R15                                                         \n"\
447
448             /* Save the DPFPU context, if any. */
449             "BEQ.B              __lab1                                          \n"\
450             "DPUSHM.D   DR0-DR15                                        \n"\
451             "DPUSHM.L   DPSW-DECNT                                      \n"\
452             "__lab1:                                                            \n"\
453
454             /* Save ulPortTaskHasDPFPUContext itself. */
455             "PUSH.L             R15                                                     \n"\
456
457         #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
458
459             /* Save the DPFPU context, always. */
460             "DPUSHM.D   DR0-DR15                                        \n"\
461             "DPUSHM.L   DPSW-DECNT                                      \n"\
462
463         #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
464
465
466         /* Save the stack pointer to the TCB. */
467         "MOV.L          #_pxCurrentTCB, R15                     \n"\
468         "MOV.L          [ R15 ], R15                            \n"\
469         "MOV.L          R0, [ R15 ]                                     \n"\
470
471
472         /* Ensure the interrupt mask is set to the syscall priority while the kernel
473          * structures are being accessed. */
474         "MVTIPL         %0                                                      \n"\
475
476         /* Select the next task to run. */
477         "BSR.A          _vTaskSwitchContext                     \n"\
478
479         /* Reset the interrupt mask as no more data structure access is required. */
480         "MVTIPL         %1                                                      \n"\
481
482
483         /* Load the stack pointer of the task that is now selected as the Running
484          * state task from its TCB. */
485         "MOV.L          #_pxCurrentTCB,R15                      \n"\
486         "MOV.L          [ R15 ], R15                            \n"\
487         "MOV.L          [ R15 ], R0                                     \n"\
488
489
490         /* Restore the context of the new task.  The PSW (Program Status Word) and
491          * PC will be popped by the RTE instruction. */
492
493         #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
494
495             /* Is there a DPFPU context to restore?  If the restored
496              * ulPortTaskHasDPFPUContext is zero then no. */
497             "POP                R15                                                                     \n"\
498             "MOV.L              #_ulPortTaskHasDPFPUContext, R14        \n"\
499             "MOV.L              R15, [R14]                                                      \n"\
500             "CMP                #0, R15                                                         \n"\
501
502             /* Restore the DPFPU context, if any. */
503             "BEQ.B              __lab2                                          \n"\
504             "DPOPM.L    DPSW-DECNT                                      \n"\
505             "DPOPM.D    DR0-DR15                                        \n"\
506             "__lab2:                                                            \n"\
507
508         #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
509
510             /* Restore the DPFPU context, always. */
511             "DPOPM.L    DPSW-DECNT                                      \n"\
512             "DPOPM.D    DR0-DR15                                        \n"\
513
514         #endif /* if( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
515
516         "POP            R15                                                     \n"\
517
518         /* Accumulator low 32 bits. */
519         "MVTACLO        R15, A0                                         \n"\
520         "POP            R15                                                     \n"\
521
522         /* Accumulator high 32 bits. */
523         "MVTACHI        R15, A0                                         \n"\
524         "POP            R15                                                     \n"\
525
526         /* Accumulator guard. */
527         "MVTACGU        R15, A0                                         \n"\
528         "POP            R15                                                     \n"\
529
530         /* Accumulator low 32 bits. */
531         "MVTACLO        R15, A1                                         \n"\
532         "POP            R15                                                     \n"\
533
534         /* Accumulator high 32 bits. */
535         "MVTACHI        R15, A1                                         \n"\
536         "POP            R15                                                     \n"\
537
538         /* Accumulator guard. */
539         "MVTACGU        R15, A1                                         \n"\
540         "POP            R15                                                     \n"\
541         "MVTC           R15, FPSW                                       \n"\
542         "POPM           R1-R15                                          \n"\
543         "RTE                                                                    \n"\
544         "NOP                                                                    \n"\
545         "NOP                                                                      "
546         portCDT_NO_PARSE( :: ) "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY )
547     );
548 }
549 /*-----------------------------------------------------------*/
550
551 #pragma vector = _VECT( configTICK_VECTOR )
552 __interrupt void vTickISR( void )
553 {
554     /* Re-enable interrupts. */
555     __enable_interrupt();
556
557     /* Increment the tick, and perform any processing the new tick value
558      * necessitates.  Ensure IPL is at the max syscall value first. */
559     __set_interrupt_level( configMAX_SYSCALL_INTERRUPT_PRIORITY );
560     {
561         if( xTaskIncrementTick() != pdFALSE )
562         {
563             taskYIELD();
564         }
565     }
566     __set_interrupt_level( configKERNEL_INTERRUPT_PRIORITY );
567 }
568 /*-----------------------------------------------------------*/