2 * FreeRTOS Kernel V10.3.1
\r
3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
\r
5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
\r
6 * this software and associated documentation files (the "Software"), to deal in
\r
7 * the Software without restriction, including without limitation the rights to
\r
8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
\r
9 * the Software, and to permit persons to whom the Software is furnished to do so,
\r
10 * subject to the following conditions:
\r
12 * The above copyright notice and this permission notice shall be included in all
\r
13 * copies or substantial portions of the Software.
\r
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
\r
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
\r
17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
\r
18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
\r
19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
\r
20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
\r
22 * http://www.FreeRTOS.org
\r
23 * http://aws.amazon.com/freertos
\r
29 * @brief FreeRTOS atomic operation support.
\r
31 * This file implements atomic functions by disabling interrupts globally.
\r
32 * Implementations with architecture specific atomic instructions can be
\r
33 * provided under each compiler directory.
\r
39 #ifndef INC_FREERTOS_H
\r
40 #error "include FreeRTOS.h must appear in source files before include atomic.h"
\r
43 /* Standard includes. */
\r
51 * Port specific definitions -- entering/exiting critical section.
\r
52 * Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h
\r
54 * Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with
\r
55 * ATOMIC_ENTER_CRITICAL().
\r
58 #if defined( portSET_INTERRUPT_MASK_FROM_ISR )
\r
60 /* Nested interrupt scheme is supported in this port. */
\r
61 #define ATOMIC_ENTER_CRITICAL() \
\r
62 UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
\r
64 #define ATOMIC_EXIT_CRITICAL() \
\r
65 portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType )
\r
69 /* Nested interrupt scheme is NOT supported in this port. */
\r
70 #define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL()
\r
71 #define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL()
\r
73 #endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
\r
76 * Port specific definition -- "always inline".
\r
77 * Inline is compiler specific, and may not always get inlined depending on your
\r
78 * optimization level. Also, inline is considered as performance optimization
\r
79 * for atomic. Thus, if portFORCE_INLINE is not provided by portmacro.h,
\r
80 * instead of resulting error, simply define it away.
\r
82 #ifndef portFORCE_INLINE
\r
83 #define portFORCE_INLINE
\r
86 #define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */
\r
87 #define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */
\r
89 /*----------------------------- Swap && CAS ------------------------------*/
\r
92 * Atomic compare-and-swap
\r
94 * @brief Performs an atomic compare-and-swap operation on the specified values.
\r
96 * @param[in, out] pulDestination Pointer to memory location from where value is
\r
97 * to be loaded and checked.
\r
98 * @param[in] ulExchange If condition meets, write this value to memory.
\r
99 * @param[in] ulComparand Swap condition.
\r
101 * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
\r
103 * @note This function only swaps *pulDestination with ulExchange, if previous
\r
104 * *pulDestination value equals ulComparand.
\r
106 static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination,
\r
107 uint32_t ulExchange,
\r
108 uint32_t ulComparand )
\r
110 uint32_t ulReturnValue;
\r
112 ATOMIC_ENTER_CRITICAL();
\r
114 if( *pulDestination == ulComparand )
\r
116 *pulDestination = ulExchange;
\r
117 ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
\r
121 ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
\r
124 ATOMIC_EXIT_CRITICAL();
\r
126 return ulReturnValue;
\r
128 /*-----------------------------------------------------------*/
\r
131 * Atomic swap (pointers)
\r
133 * @brief Atomically sets the address pointed to by *ppvDestination to the value
\r
136 * @param[in, out] ppvDestination Pointer to memory location from where a pointer
\r
137 * value is to be loaded and written back to.
\r
138 * @param[in] pvExchange Pointer value to be written to *ppvDestination.
\r
140 * @return The initial value of *ppvDestination.
\r
142 static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination,
\r
143 void * pvExchange )
\r
145 void * pReturnValue;
\r
147 ATOMIC_ENTER_CRITICAL();
\r
149 pReturnValue = *ppvDestination;
\r
150 *ppvDestination = pvExchange;
\r
152 ATOMIC_EXIT_CRITICAL();
\r
154 return pReturnValue;
\r
156 /*-----------------------------------------------------------*/
\r
159 * Atomic compare-and-swap (pointers)
\r
161 * @brief Performs an atomic compare-and-swap operation on the specified pointer
\r
164 * @param[in, out] ppvDestination Pointer to memory location from where a pointer
\r
165 * value is to be loaded and checked.
\r
166 * @param[in] pvExchange If condition meets, write this value to memory.
\r
167 * @param[in] pvComparand Swap condition.
\r
169 * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
\r
171 * @note This function only swaps *ppvDestination with pvExchange, if previous
\r
172 * *ppvDestination value equals pvComparand.
\r
174 static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination,
\r
176 void * pvComparand )
\r
178 uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
\r
180 ATOMIC_ENTER_CRITICAL();
\r
182 if( *ppvDestination == pvComparand )
\r
184 *ppvDestination = pvExchange;
\r
185 ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
\r
188 ATOMIC_EXIT_CRITICAL();
\r
190 return ulReturnValue;
\r
194 /*----------------------------- Arithmetic ------------------------------*/
\r
199 * @brief Atomically adds count to the value of the specified pointer points to.
\r
201 * @param[in,out] pulAddend Pointer to memory location from where value is to be
\r
202 * loaded and written back to.
\r
203 * @param[in] ulCount Value to be added to *pulAddend.
\r
205 * @return previous *pulAddend value.
\r
207 static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
\r
210 uint32_t ulCurrent;
\r
212 ATOMIC_ENTER_CRITICAL();
\r
214 ulCurrent = *pulAddend;
\r
215 *pulAddend += ulCount;
\r
217 ATOMIC_EXIT_CRITICAL();
\r
221 /*-----------------------------------------------------------*/
\r
226 * @brief Atomically subtracts count from the value of the specified pointer
\r
229 * @param[in,out] pulAddend Pointer to memory location from where value is to be
\r
230 * loaded and written back to.
\r
231 * @param[in] ulCount Value to be subtract from *pulAddend.
\r
233 * @return previous *pulAddend value.
\r
235 static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend,
\r
238 uint32_t ulCurrent;
\r
240 ATOMIC_ENTER_CRITICAL();
\r
242 ulCurrent = *pulAddend;
\r
243 *pulAddend -= ulCount;
\r
245 ATOMIC_EXIT_CRITICAL();
\r
249 /*-----------------------------------------------------------*/
\r
254 * @brief Atomically increments the value of the specified pointer points to.
\r
256 * @param[in,out] pulAddend Pointer to memory location from where value is to be
\r
257 * loaded and written back to.
\r
259 * @return *pulAddend value before increment.
\r
261 static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend )
\r
263 uint32_t ulCurrent;
\r
265 ATOMIC_ENTER_CRITICAL();
\r
267 ulCurrent = *pulAddend;
\r
270 ATOMIC_EXIT_CRITICAL();
\r
274 /*-----------------------------------------------------------*/
\r
279 * @brief Atomically decrements the value of the specified pointer points to
\r
281 * @param[in,out] pulAddend Pointer to memory location from where value is to be
\r
282 * loaded and written back to.
\r
284 * @return *pulAddend value before decrement.
\r
286 static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend )
\r
288 uint32_t ulCurrent;
\r
290 ATOMIC_ENTER_CRITICAL();
\r
292 ulCurrent = *pulAddend;
\r
295 ATOMIC_EXIT_CRITICAL();
\r
300 /*----------------------------- Bitwise Logical ------------------------------*/
\r
305 * @brief Performs an atomic OR operation on the specified values.
\r
307 * @param [in, out] pulDestination Pointer to memory location from where value is
\r
308 * to be loaded and written back to.
\r
309 * @param [in] ulValue Value to be ORed with *pulDestination.
\r
311 * @return The original value of *pulDestination.
\r
313 static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination,
\r
316 uint32_t ulCurrent;
\r
318 ATOMIC_ENTER_CRITICAL();
\r
320 ulCurrent = *pulDestination;
\r
321 *pulDestination |= ulValue;
\r
323 ATOMIC_EXIT_CRITICAL();
\r
327 /*-----------------------------------------------------------*/
\r
332 * @brief Performs an atomic AND operation on the specified values.
\r
334 * @param [in, out] pulDestination Pointer to memory location from where value is
\r
335 * to be loaded and written back to.
\r
336 * @param [in] ulValue Value to be ANDed with *pulDestination.
\r
338 * @return The original value of *pulDestination.
\r
340 static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination,
\r
343 uint32_t ulCurrent;
\r
345 ATOMIC_ENTER_CRITICAL();
\r
347 ulCurrent = *pulDestination;
\r
348 *pulDestination &= ulValue;
\r
350 ATOMIC_EXIT_CRITICAL();
\r
354 /*-----------------------------------------------------------*/
\r
359 * @brief Performs an atomic NAND operation on the specified values.
\r
361 * @param [in, out] pulDestination Pointer to memory location from where value is
\r
362 * to be loaded and written back to.
\r
363 * @param [in] ulValue Value to be NANDed with *pulDestination.
\r
365 * @return The original value of *pulDestination.
\r
367 static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination,
\r
370 uint32_t ulCurrent;
\r
372 ATOMIC_ENTER_CRITICAL();
\r
374 ulCurrent = *pulDestination;
\r
375 *pulDestination = ~( ulCurrent & ulValue );
\r
377 ATOMIC_EXIT_CRITICAL();
\r
381 /*-----------------------------------------------------------*/
\r
386 * @brief Performs an atomic XOR operation on the specified values.
\r
388 * @param [in, out] pulDestination Pointer to memory location from where value is
\r
389 * to be loaded and written back to.
\r
390 * @param [in] ulValue Value to be XORed with *pulDestination.
\r
392 * @return The original value of *pulDestination.
\r
394 static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination,
\r
397 uint32_t ulCurrent;
\r
399 ATOMIC_ENTER_CRITICAL();
\r
401 ulCurrent = *pulDestination;
\r
402 *pulDestination ^= ulValue;
\r
404 ATOMIC_EXIT_CRITICAL();
\r
413 #endif /* ATOMIC_H */
\r