begriffs open source - freertos/blob - portable/GCC/RX600/port.c

   1 /*\r
   2  * FreeRTOS Kernel V10.4.4\r
   3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4  *\r
   5  * SPDX-License-Identifier: MIT
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   8  * this software and associated documentation files (the "Software"), to deal in\r
   9  * the Software without restriction, including without limitation the rights to\r
  10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
  11  * the Software, and to permit persons to whom the Software is furnished to do so,\r
  12  * subject to the following conditions:\r
  13  *\r
  14  * The above copyright notice and this permission notice shall be included in all\r
  15  * copies or substantial portions of the Software.\r
  16  *\r
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  23  *\r
  24  * https://www.FreeRTOS.org\r
  25  * https://github.com/FreeRTOS\r
  26  *\r
  27  */\r
  28 \r
  29 /*-----------------------------------------------------------\r
  30  * Implementation of functions defined in portable.h for the SH2A port.\r
  31  *----------------------------------------------------------*/\r
  32 \r
  33 /* Scheduler includes. */\r
  34 #include "FreeRTOS.h"\r
  35 #include "task.h"\r
  36 \r
  37 /* Library includes. */\r
  38 #include "string.h"\r
  39 \r
  40 /* Hardware specifics. */\r
  41 #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )\r
  42 \r
  43     #include "platform.h"\r
  44 \r
  45 #else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */\r
  46 \r
  47     #include "iodefine.h"\r
  48 \r
  49 #endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */\r
  50 \r
  51 \r
  52 /*-----------------------------------------------------------*/\r
  53 \r
  54 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore\r
  55 PSW is set with U and I set, and PM and IPL clear. */\r
  56 #define portINITIAL_PSW     ( ( StackType_t ) 0x00030000 )\r
  57 #define portINITIAL_FPSW    ( ( StackType_t ) 0x00000100 )\r
  58 \r
  59 /* These macros allow a critical section to be added around the call to\r
  60 xTaskIncrementTick(), which is only ever called from interrupts at the kernel\r
  61 priority - ie a known priority.  Therefore these local macros are a slight\r
  62 optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,\r
  63 which would require the old IPL to be read first and stored in a local variable. */\r
  64 #define portDISABLE_INTERRUPTS_FROM_KERNEL_ISR()        __asm volatile ( "MVTIPL        %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )\r
  65 #define portENABLE_INTERRUPTS_FROM_KERNEL_ISR()         __asm volatile ( "MVTIPL        %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )\r
  66 \r
  67 /*-----------------------------------------------------------*/\r
  68 \r
  69 /*\r
  70  * Function to start the first task executing - written in asm code as direct\r
  71  * access to registers is required.\r
  72  */\r
  73 static void prvStartFirstTask( void ) __attribute__((naked));\r
  74 /*\r
  75  * Software interrupt handler.  Performs the actual context switch (saving and\r
  76  * restoring of registers).  Written in asm code as direct register access is\r
  77  * required.\r
  78  */\r
  79 #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )\r
  80 \r
  81     R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) )\r
  82     R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );\r
  83 \r
  84 #else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */\r
  85 \r
  86     void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );\r
  87 \r
  88 #endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H  */\r
  89 \r
  90 /*\r
  91  * The tick ISR handler.  The peripheral used is configured by the application\r
  92  * via a hook/callback function.\r
  93  */\r
  94 #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )\r
  95 \r
  96     R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) )\r
  97     R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */\r
  98 \r
  99 #else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */\r
 100 \r
 101     void vTickISR( void ) __attribute__( ( interrupt ) );\r
 102 \r
 103 #endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */\r
 104 \r
 105 /*-----------------------------------------------------------*/\r
 106 \r
 107 extern void *pxCurrentTCB;\r
 108 \r
 109 /*-----------------------------------------------------------*/\r
 110 \r
 111 /*\r
 112  * See header file for description.\r
 113  */\r
 114 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
 115 {\r
 116         /* R0 is not included as it is the stack pointer. */\r
 117 \r
 118         *pxTopOfStack = 0x00;\r
 119         pxTopOfStack--;\r
 120         *pxTopOfStack = portINITIAL_PSW;\r
 121         pxTopOfStack--;\r
 122         *pxTopOfStack = ( StackType_t ) pxCode;\r
 123 \r
 124         /* When debugging it can be useful if every register is set to a known\r
 125         value.  Otherwise code space can be saved by just setting the registers\r
 126         that need to be set. */\r
 127         #ifdef USE_FULL_REGISTER_INITIALISATION\r
 128         {\r
 129                 pxTopOfStack--;\r
 130                 *pxTopOfStack = 0xffffffff;     /* r15. */\r
 131                 pxTopOfStack--;\r
 132                 *pxTopOfStack = 0xeeeeeeee;\r
 133                 pxTopOfStack--;\r
 134                 *pxTopOfStack = 0xdddddddd;\r
 135                 pxTopOfStack--;\r
 136                 *pxTopOfStack = 0xcccccccc;\r
 137                 pxTopOfStack--;\r
 138                 *pxTopOfStack = 0xbbbbbbbb;\r
 139                 pxTopOfStack--;\r
 140                 *pxTopOfStack = 0xaaaaaaaa;\r
 141                 pxTopOfStack--;\r
 142                 *pxTopOfStack = 0x99999999;\r
 143                 pxTopOfStack--;\r
 144                 *pxTopOfStack = 0x88888888;\r
 145                 pxTopOfStack--;\r
 146                 *pxTopOfStack = 0x77777777;\r
 147                 pxTopOfStack--;\r
 148                 *pxTopOfStack = 0x66666666;\r
 149                 pxTopOfStack--;\r
 150                 *pxTopOfStack = 0x55555555;\r
 151                 pxTopOfStack--;\r
 152                 *pxTopOfStack = 0x44444444;\r
 153                 pxTopOfStack--;\r
 154                 *pxTopOfStack = 0x33333333;\r
 155                 pxTopOfStack--;\r
 156                 *pxTopOfStack = 0x22222222;\r
 157                 pxTopOfStack--;\r
 158         }\r
 159         #else\r
 160         {\r
 161                 pxTopOfStack -= 15;\r
 162         }\r
 163         #endif\r
 164 \r
 165         *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */\r
 166         pxTopOfStack--;\r
 167         *pxTopOfStack = portINITIAL_FPSW;\r
 168         pxTopOfStack--;\r
 169         *pxTopOfStack = 0x12345678; /* Accumulator. */\r
 170         pxTopOfStack--;\r
 171         *pxTopOfStack = 0x87654321; /* Accumulator. */\r
 172 \r
 173         return pxTopOfStack;\r
 174 }\r
 175 /*-----------------------------------------------------------*/\r
 176 \r
 177 BaseType_t xPortStartScheduler( void )\r
 178 {\r
 179 extern void vApplicationSetupTimerInterrupt( void );\r
 180 \r
 181         /* Use pxCurrentTCB just so it does not get optimised away. */\r
 182         if( pxCurrentTCB != NULL )\r
 183         {\r
 184                 /* Call an application function to set up the timer that will generate the\r
 185                 tick interrupt.  This way the application can decide which peripheral to\r
 186                 use.  A demo application is provided to show a suitable example. */\r
 187                 vApplicationSetupTimerInterrupt();\r
 188 \r
 189                 /* Enable the software interrupt. */\r
 190                 _IEN( _ICU_SWINT ) = 1;\r
 191 \r
 192                 /* Ensure the software interrupt is clear. */\r
 193                 _IR( _ICU_SWINT ) = 0;\r
 194 \r
 195                 /* Ensure the software interrupt is set to the kernel priority. */\r
 196                 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;\r
 197 \r
 198                 /* Start the first task. */\r
 199                 prvStartFirstTask();\r
 200         }\r
 201 \r
 202         /* Should not get here. */\r
 203         return pdFAIL;\r
 204 }\r
 205 /*-----------------------------------------------------------*/\r
 206 \r
 207 void vPortEndScheduler( void )\r
 208 {\r
 209         /* Not implemented in ports where there is nothing to return to.\r
 210         Artificially force an assert. */\r
 211         configASSERT( pxCurrentTCB == NULL );\r
 212 }\r
 213 /*-----------------------------------------------------------*/\r
 214 \r
 215 static void prvStartFirstTask( void )\r
 216 {\r
 217         __asm volatile\r
 218         (\r
 219                 /* When starting the scheduler there is nothing that needs moving to the\r
 220                 interrupt stack because the function is not called from an interrupt.\r
 221                 Just ensure the current stack is the user stack. */\r
 222                 "SETPSW         U                                               \n" \\r
 223 \r
 224                 /* Obtain the location of the stack associated with which ever task\r
 225                 pxCurrentTCB is currently pointing to. */\r
 226                 "MOV.L          #_pxCurrentTCB, R15             \n" \\r
 227                 "MOV.L          [R15], R15                              \n" \\r
 228                 "MOV.L          [R15], R0                               \n" \\r
 229 \r
 230                 /* Restore the registers from the stack of the task pointed to by\r
 231                 pxCurrentTCB. */\r
 232             "POP                R15                                             \n" \\r
 233 \r
 234                 /* Accumulator low 32 bits. */\r
 235             "MVTACLO    R15                                     \n" \\r
 236             "POP                R15                                             \n" \\r
 237 \r
 238                 /* Accumulator high 32 bits. */\r
 239             "MVTACHI    R15                                     \n" \\r
 240             "POP                R15                                             \n" \\r
 241 \r
 242                 /* Floating point status word. */\r
 243             "MVTC               R15, FPSW                               \n" \\r
 244 \r
 245                 /* R1 to R15 - R0 is not included as it is the SP. */\r
 246             "POPM               R1-R15                                  \n" \\r
 247 \r
 248                 /* This pops the remaining registers. */\r
 249             "RTE                                                                \n" \\r
 250             "NOP                                                                \n" \\r
 251             "NOP                                                                \n"\r
 252         );\r
 253 }\r
 254 /*-----------------------------------------------------------*/\r
 255 \r
 256 void vSoftwareInterruptISR( void )\r
 257 {\r
 258         __asm volatile\r
 259         (\r
 260                 /* Re-enable interrupts. */\r
 261                 "SETPSW         I                                                       \n" \\r
 262 \r
 263                 /* Move the data that was automatically pushed onto the interrupt stack when\r
 264                 the interrupt occurred from the interrupt stack to the user stack.\r
 265 \r
 266                 R15 is saved before it is clobbered. */\r
 267                 "PUSH.L         R15                                                     \n" \\r
 268 \r
 269                 /* Read the user stack pointer. */\r
 270                 "MVFC           USP, R15                                        \n" \\r
 271 \r
 272                 /* Move the address down to the data being moved. */\r
 273                 "SUB            #12, R15                                        \n" \\r
 274                 "MVTC           R15, USP                                        \n" \\r
 275 \r
 276                 /* Copy the data across, R15, then PC, then PSW. */\r
 277                 "MOV.L          [ R0 ], [ R15 ]                         \n" \\r
 278                 "MOV.L          4[ R0 ], 4[ R15 ]                       \n" \\r
 279                 "MOV.L          8[ R0 ], 8[ R15 ]                       \n" \\r
 280 \r
 281                 /* Move the interrupt stack pointer to its new correct position. */\r
 282                 "ADD            #12, R0                                         \n" \\r
 283 \r
 284                 /* All the rest of the registers are saved directly to the user stack. */\r
 285                 "SETPSW         U                                                       \n" \\r
 286 \r
 287                 /* Save the rest of the general registers (R15 has been saved already). */\r
 288                 "PUSHM          R1-R14                                          \n" \\r
 289 \r
 290                 /* Save the FPSW and accumulator. */\r
 291                 "MVFC           FPSW, R15                                       \n" \\r
 292                 "PUSH.L         R15                                                     \n" \\r
 293                 "MVFACHI        R15                                                     \n" \\r
 294                 "PUSH.L         R15                                                     \n" \\r
 295 \r
 296                 /* Middle word. */\r
 297                 "MVFACMI        R15                                                     \n" \\r
 298 \r
 299                 /* Shifted left as it is restored to the low order word. */\r
 300                 "SHLL           #16, R15                                        \n" \\r
 301                 "PUSH.L         R15                                                     \n" \\r
 302 \r
 303                 /* Save the stack pointer to the TCB. */\r
 304                 "MOV.L          #_pxCurrentTCB, R15                     \n" \\r
 305                 "MOV.L          [ R15 ], R15                            \n" \\r
 306                 "MOV.L          R0, [ R15 ]                                     \n" \\r
 307 \r
 308                 /* Ensure the interrupt mask is set to the syscall priority while the kernel\r
 309                 structures are being accessed. */\r
 310                 "MVTIPL         %0                                                      \n" \\r
 311 \r
 312                 /* Select the next task to run. */\r
 313                 "BSR.A          _vTaskSwitchContext                     \n" \\r
 314 \r
 315                 /* Reset the interrupt mask as no more data structure access is required. */\r
 316                 "MVTIPL         %1                                                      \n" \\r
 317 \r
 318                 /* Load the stack pointer of the task that is now selected as the Running\r
 319                 state task from its TCB. */\r
 320                 "MOV.L          #_pxCurrentTCB,R15                      \n" \\r
 321                 "MOV.L          [ R15 ], R15                            \n" \\r
 322                 "MOV.L          [ R15 ], R0                                     \n" \\r
 323 \r
 324                 /* Restore the context of the new task.  The PSW (Program Status Word) and\r
 325                 PC will be popped by the RTE instruction. */\r
 326                 "POP            R15                                                     \n" \\r
 327                 "MVTACLO        R15                                                     \n" \\r
 328                 "POP            R15                                                     \n" \\r
 329                 "MVTACHI        R15                                                     \n" \\r
 330                 "POP            R15                                                     \n" \\r
 331                 "MVTC           R15, FPSW                                       \n" \\r
 332                 "POPM           R1-R15                                          \n" \\r
 333                 "RTE                                                                    \n" \\r
 334                 "NOP                                                                    \n" \\r
 335                 "NOP                                                                      "\r
 336                 :: "i"(configMAX_SYSCALL_INTERRUPT_PRIORITY), "i"(configKERNEL_INTERRUPT_PRIORITY)\r
 337         );\r
 338 }\r
 339 /*-----------------------------------------------------------*/\r
 340 \r
 341 void vTickISR( void )\r
 342 {\r
 343         /* Re-enabled interrupts. */\r
 344         __asm volatile( "SETPSW I" );\r
 345 \r
 346         /* Increment the tick, and perform any processing the new tick value\r
 347         necessitates.  Ensure IPL is at the max syscall value first. */\r
 348         portDISABLE_INTERRUPTS_FROM_KERNEL_ISR();\r
 349         {\r
 350                 if( xTaskIncrementTick() != pdFALSE )\r
 351                 {\r
 352                         taskYIELD();\r
 353                 }\r
 354         }\r
 355         portENABLE_INTERRUPTS_FROM_KERNEL_ISR();\r
 356 }\r
 357 /*-----------------------------------------------------------*/\r
 358 \r
 359 uint32_t ulPortGetIPL( void )\r
 360 {\r
 361         __asm volatile\r
 362         (\r
 363                 "MVFC   PSW, R1                 \n"     \\r
 364                 "SHLR   #24, R1                 \n"     \\r
 365                 "RTS                                      "\r
 366         );\r
 367 \r
 368         /* This will never get executed, but keeps the compiler from complaining. */\r
 369         return 0;\r
 370 }\r
 371 /*-----------------------------------------------------------*/\r
 372 \r
 373 void vPortSetIPL( uint32_t ulNewIPL )\r
 374 {\r
 375         /* Avoid compiler warning about unreferenced parameter. */\r
 376         ( void ) ulNewIPL;\r
 377 \r
 378         __asm volatile\r
 379         (\r
 380                 "PUSH   R5                              \n" \\r
 381                 "MVFC   PSW, R5                 \n"     \\r
 382                 "SHLL   #24, R1                 \n" \\r
 383                 "AND    #-0F000001H, R5 \n" \\r
 384                 "OR             R1, R5                  \n" \\r
 385                 "MVTC   R5, PSW                 \n" \\r
 386                 "POP    R5                              \n" \\r
 387                 "RTS                                      "\r
 388          );\r
 389 }\r