2 * FreeRTOS Kernel <DEVELOPMENT BRANCH>
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
29 #ifndef PORTMACROCOMMON_H
30 #define PORTMACROCOMMON_H
36 /*------------------------------------------------------------------------------
37 * Port specific definitions.
39 * The settings in this file configure FreeRTOS correctly for the given hardware
42 * These settings should not be altered.
43 *------------------------------------------------------------------------------
46 #ifndef configENABLE_FPU
47 #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
48 #endif /* configENABLE_FPU */
50 #ifndef configENABLE_MPU
51 #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
52 #endif /* configENABLE_MPU */
54 #ifndef configENABLE_TRUSTZONE
55 #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
56 #endif /* configENABLE_TRUSTZONE */
58 /*-----------------------------------------------------------*/
61 * @brief Type definitions.
64 #define portFLOAT float
65 #define portDOUBLE double
67 #define portSHORT short
68 #define portSTACK_TYPE uint32_t
69 #define portBASE_TYPE long
71 typedef portSTACK_TYPE StackType_t;
72 typedef long BaseType_t;
73 typedef unsigned long UBaseType_t;
75 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
76 typedef uint16_t TickType_t;
77 #define portMAX_DELAY ( TickType_t ) 0xffff
78 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
79 typedef uint32_t TickType_t;
80 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
82 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
83 * not need to be guarded with a critical section. */
84 #define portTICK_TYPE_IS_ATOMIC 1
86 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
88 /*-----------------------------------------------------------*/
91 * Architecture specifics.
93 #define portSTACK_GROWTH ( -1 )
94 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
95 #define portBYTE_ALIGNMENT 8
97 #define portINLINE __inline
98 #ifndef portFORCE_INLINE
99 #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
101 #define portHAS_STACK_OVERFLOW_CHECKING 1
102 /*-----------------------------------------------------------*/
105 * @brief Extern declarations.
107 extern BaseType_t xPortIsInsideInterrupt( void );
109 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
111 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
112 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
114 extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
115 extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
117 #if ( configENABLE_TRUSTZONE == 1 )
118 extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
119 extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
120 #endif /* configENABLE_TRUSTZONE */
122 #if ( configENABLE_MPU == 1 )
123 extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
124 extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
125 #endif /* configENABLE_MPU */
126 /*-----------------------------------------------------------*/
129 * @brief MPU specific constants.
131 #if ( configENABLE_MPU == 1 )
132 #define portUSING_MPU_WRAPPERS 1
133 #define portPRIVILEGE_BIT ( 0x80000000UL )
135 #define portPRIVILEGE_BIT ( 0x0UL )
136 #endif /* configENABLE_MPU */
138 /* MPU settings that can be overriden in FreeRTOSConfig.h. */
139 #ifndef configTOTAL_MPU_REGIONS
140 /* Define to 8 for backward compatibility. */
141 #define configTOTAL_MPU_REGIONS ( 8UL )
145 #define portPRIVILEGED_FLASH_REGION ( 0UL )
146 #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
147 #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
148 #define portPRIVILEGED_RAM_REGION ( 3UL )
149 #define portSTACK_REGION ( 4UL )
150 #define portFIRST_CONFIGURABLE_REGION ( 5UL )
151 #define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
152 #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
153 #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
155 /* Device memory attributes used in MPU_MAIR registers.
157 * 8-bit values encoded as follows:
158 * Bit[7:4] - 0000 - Device Memory
159 * Bit[3:2] - 00 --> Device-nGnRnE
160 * 01 --> Device-nGnRE
163 * Bit[1:0] - 00, Reserved.
165 #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
166 #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
167 #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
168 #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
170 /* Normal memory attributes used in MPU_MAIR registers. */
171 #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
172 #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
174 /* Attributes used in MPU_RBAR registers. */
175 #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
176 #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
177 #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
179 #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
180 #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
181 #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
182 #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
184 #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
185 /*-----------------------------------------------------------*/
188 * @brief Settings to define an MPU region.
190 typedef struct MPURegionSettings
192 uint32_t ulRBAR; /**< RBAR for the region. */
193 uint32_t ulRLAR; /**< RLAR for the region. */
194 } MPURegionSettings_t;
197 * @brief MPU settings as stored in the TCB.
199 typedef struct MPU_SETTINGS
201 uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
202 MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
204 /*-----------------------------------------------------------*/
207 * @brief SVC numbers.
209 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
210 #define portSVC_FREE_SECURE_CONTEXT 1
211 #define portSVC_START_SCHEDULER 2
212 #define portSVC_RAISE_PRIVILEGE 3
213 /*-----------------------------------------------------------*/
216 * @brief Scheduler utilities.
218 #define portYIELD() vPortYield()
219 #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
220 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
221 #define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; } while( 0 )
222 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
223 /*-----------------------------------------------------------*/
226 * @brief Critical section management.
228 #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
229 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
230 #define portENTER_CRITICAL() vPortEnterCritical()
231 #define portEXIT_CRITICAL() vPortExitCritical()
232 /*-----------------------------------------------------------*/
235 * @brief Tickless idle/low power functionality.
237 #ifndef portSUPPRESS_TICKS_AND_SLEEP
238 extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
239 #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
241 /*-----------------------------------------------------------*/
244 * @brief Task function macros as described on the FreeRTOS.org WEB site.
246 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
247 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
248 /*-----------------------------------------------------------*/
250 #if ( configENABLE_TRUSTZONE == 1 )
253 * @brief Allocate a secure context for the task.
255 * Tasks are not created with a secure context. Any task that is going to call
256 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
257 * secure context before it calls any secure function.
259 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
261 #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
264 * @brief Called when a task is deleted to delete the task's secure context,
267 * @param[in] pxTCB The TCB of the task being deleted.
269 #define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
270 #endif /* configENABLE_TRUSTZONE */
271 /*-----------------------------------------------------------*/
273 #if ( configENABLE_MPU == 1 )
276 * @brief Checks whether or not the processor is privileged.
278 * @return 1 if the processor is already privileged, 0 otherwise.
280 #define portIS_PRIVILEGED() xIsPrivileged()
283 * @brief Raise an SVC request to raise privilege.
285 * The SVC handler checks that the SVC was raised from a system call and only
286 * then it raises the privilege. If this is called from any other place,
287 * the privilege is not raised.
289 #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
292 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
295 #define portRESET_PRIVILEGE() vResetPrivilege()
297 #define portIS_PRIVILEGED()
298 #define portRAISE_PRIVILEGE()
299 #define portRESET_PRIVILEGE()
300 #endif /* configENABLE_MPU */
301 /*-----------------------------------------------------------*/
306 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
307 /*-----------------------------------------------------------*/
313 #endif /* PORTMACROCOMMON_H */