begriffs open source - freertos/blob - portable/GCC/ARM_CM33/secure/secure_context_port.c

   1 /*
   2  * FreeRTOS Kernel V202110.00
   3  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of
   6  * this software and associated documentation files (the "Software"), to deal in
   7  * the Software without restriction, including without limitation the rights to
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
   9  * the Software, and to permit persons to whom the Software is furnished to do so,
  10  * subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in all
  13  * copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * https://www.FreeRTOS.org
  23  * https://github.com/FreeRTOS
  24  *
  25  * 1 tab == 4 spaces!
  26  */
  27
  28 /* Secure context includes. */
  29 #include "secure_context.h"
  30
  31 /* Secure port macros. */
  32 #include "secure_port_macros.h"
  33
  34 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
  35 {
  36     /* xSecureContextHandle value is in r0. */
  37     __asm volatile
  38     (
  39         "       .syntax unified                                                 \n"
  40         "                                                                                       \n"
  41         "       mrs r1, ipsr                                                    \n"/* r1 = IPSR. */
  42         "       cbz r1, load_ctx_therad_mode                    \n"/* Do nothing if the processor is running in the Thread Mode. */
  43         "       ldmia r0!, {r1, r2}                                             \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
  44         #if ( configENABLE_MPU == 1 )
  45             "   ldmia r1!, {r3}                                                 \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
  46             "   msr control, r3                                                 \n"/* CONTROL = r3. */
  47         #endif /* configENABLE_MPU */
  48         "       msr psplim, r2                                                  \n"/* PSPLIM = r2. */
  49         "       msr psp, r1                                                             \n"/* PSP = r1. */
  50         "                                                                                       \n"
  51         " load_ctx_therad_mode:                                         \n"
  52         "       nop                                                                             \n"
  53         "                                                                                       \n"
  54         ::: "r0", "r1", "r2"
  55     );
  56 }
  57 /*-----------------------------------------------------------*/
  58
  59 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
  60 {
  61     /* xSecureContextHandle value is in r0. */
  62     __asm volatile
  63     (
  64         "       .syntax unified                                                 \n"
  65         "                                                                                       \n"
  66         "       mrs r1, ipsr                                                    \n"/* r1 = IPSR. */
  67         "       cbz r1, save_ctx_therad_mode                    \n"/* Do nothing if the processor is running in the Thread Mode. */
  68         "       mrs r1, psp                                                             \n"/* r1 = PSP. */
  69         #if ( configENABLE_FPU == 1 )
  70             "   vstmdb r1!, {s0}                                                \n"/* Trigger the defferred stacking of FPU registers. */
  71             "   vldmia r1!, {s0}                                                \n"/* Nullify the effect of the pervious statement. */
  72         #endif /* configENABLE_FPU */
  73         #if ( configENABLE_MPU == 1 )
  74             "   mrs r2, control                                                 \n"/* r2 = CONTROL. */
  75             "   stmdb r1!, {r2}                                                 \n"/* Store CONTROL value on the stack. */
  76         #endif /* configENABLE_MPU */
  77         "       str r1, [r0]                                                    \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
  78         "       movs r1, %0                                                             \n"/* r1 = securecontextNO_STACK. */
  79         "       msr psplim, r1                                                  \n"/* PSPLIM = securecontextNO_STACK. */
  80         "       msr psp, r1                                                             \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
  81         "                                                                                       \n"
  82         " save_ctx_therad_mode:                                         \n"
  83         "       nop                                                                             \n"
  84         "                                                                                       \n"
  85         ::"i" ( securecontextNO_STACK ) : "r1", "memory"
  86     );
  87 }
  88 /*-----------------------------------------------------------*/