begriffs open source - freertos/blob - portable/IAR/AVR32_UC3/port.c

   1 /*This file has been prepared for Doxygen automatic documentation generation.*/
   2 /*! \file *********************************************************************
   3  *
   4  * \brief FreeRTOS port source for AVR32 UC3.
   5  *
   6  * - Compiler:           IAR EWAVR32
   7  * - Supported devices:  All AVR32 devices can be used.
   8  * - AppNote:
   9  *
  10  * \author               Atmel Corporation (Now Microchip):
  11  *                                        https://www.microchip.com \n
  12  *                       Support and FAQ: https://www.microchip.com/support/
  13  *
  14  *****************************************************************************/
  15
  16 /*
  17  * FreeRTOS Kernel V202110.00
  18  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  19  *
  20  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  21  * this software and associated documentation files (the "Software"), to deal in
  22  * the Software without restriction, including without limitation the rights to
  23  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  24  * the Software, and to permit persons to whom the Software is furnished to do so,
  25  * subject to the following conditions:
  26  *
  27  * The above copyright notice and this permission notice shall be included in all
  28  * copies or substantial portions of the Software.
  29  *
  30  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  31  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  32  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  33  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  34  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  35  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  36  *
  37  * https://www.FreeRTOS.org
  38  * https://github.com/FreeRTOS
  39  *
  40  * 1 tab == 4 spaces!
  41  */
  42
  43
  44 /* Scheduler includes. */
  45 #include "FreeRTOS.h"
  46 #include "task.h"
  47
  48 /* AVR32 UC3 includes. */
  49 #include <avr32/io.h>
  50 #include <intrinsics.h>
  51 #include "gpio.h"
  52
  53 #if configDBG
  54         #include "usart.h"
  55 #endif
  56
  57 #if( configTICK_USE_TC==1 )
  58         #include "tc.h"
  59 #endif
  60
  61
  62 /* Constants required to setup the task context. */
  63 #define portINITIAL_SR            ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
  64 #define portINSTRUCTION_SIZE      ( ( StackType_t ) 0 )
  65
  66 /* Each task maintains its own critical nesting variable. */
  67 #define portNO_CRITICAL_NESTING   ( ( uint32_t ) 0 )
  68 volatile uint32_t ulCriticalNesting = 9999UL;
  69
  70 #if( configTICK_USE_TC==0 )
  71         static void prvScheduleNextTick( void );
  72 #else
  73         static void prvClearTcInt( void );
  74 #endif
  75
  76 /* Setup the timer to generate the tick interrupts. */
  77 static void prvSetupTimerInterrupt( void );
  78
  79 /*-----------------------------------------------------------*/
  80
  81 /*
  82  * Low-level initialization routine called during startup, before the main
  83  * function.
  84  */
  85 int __low_level_init(void)
  86 {
  87         #if configHEAP_INIT
  88                 #pragma segment = "HEAP"
  89                 BaseType_t *pxMem;
  90         #endif
  91
  92         /* Enable exceptions. */
  93         ENABLE_ALL_EXCEPTIONS();
  94
  95         /* Initialize interrupt handling. */
  96         INTC_init_interrupts();
  97
  98         #if configHEAP_INIT
  99         {
 100                 /* Initialize the heap used by malloc. */
 101                 for( pxMem = __segment_begin( "HEAP" ); pxMem < ( BaseType_t * ) __segment_end( "HEAP" ); )
 102                 {
 103                         *pxMem++ = 0xA5A5A5A5;
 104                 }
 105         }
 106         #endif
 107
 108         /* Code section present if and only if the debug trace is activated. */
 109         #if configDBG
 110         {
 111                 static const gpio_map_t DBG_USART_GPIO_MAP =
 112                 {
 113                         { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
 114                         { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
 115                 };
 116
 117                 static const usart_options_t DBG_USART_OPTIONS =
 118                 {
 119                         .baudrate = configDBG_USART_BAUDRATE,
 120                         .charlength = 8,
 121                         .paritytype = USART_NO_PARITY,
 122                         .stopbits = USART_1_STOPBIT,
 123                         .channelmode = USART_NORMAL_CHMODE
 124                 };
 125
 126                 /* Initialize the USART used for the debug trace with the configured parameters. */
 127                 extern volatile avr32_usart_t *volatile stdio_usart_base;
 128                 stdio_usart_base = configDBG_USART;
 129                 gpio_enable_module( DBG_USART_GPIO_MAP,
 130                                     sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
 131                 usart_init_rs232(configDBG_USART, &DBG_USART_OPTIONS, configCPU_CLOCK_HZ);
 132         }
 133         #endif
 134
 135         /* Request initialization of data segments. */
 136         return 1;
 137 }
 138 /*-----------------------------------------------------------*/
 139
 140 /* Added as there is no such function in FreeRTOS. */
 141 void *pvPortRealloc( void *pv, size_t xWantedSize )
 142 {
 143 void *pvReturn;
 144
 145         vTaskSuspendAll();
 146         {
 147                 pvReturn = realloc( pv, xWantedSize );
 148         }
 149         xTaskResumeAll();
 150
 151         return pvReturn;
 152 }
 153 /*-----------------------------------------------------------*/
 154
 155 /* The cooperative scheduler requires a normal IRQ service routine to
 156 simply increment the system tick. */
 157 /* The preemptive scheduler is defined as "naked" as the full context is saved
 158 on entry as part of the context switch. */
 159 #pragma shadow_registers = full   // Naked.
 160 static void vTick( void )
 161 {
 162         /* Save the context of the interrupted task. */
 163         portSAVE_CONTEXT_OS_INT();
 164
 165         #if( configTICK_USE_TC==1 )
 166                 /* Clear the interrupt flag. */
 167                 prvClearTcInt();
 168         #else
 169                 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
 170                 clock cycles from now. */
 171                 prvScheduleNextTick();
 172         #endif
 173
 174         /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
 175         calls in a critical section . */
 176         portENTER_CRITICAL();
 177                 xTaskIncrementTick();
 178         portEXIT_CRITICAL();
 179
 180         /* Restore the context of the "elected task". */
 181         portRESTORE_CONTEXT_OS_INT();
 182 }
 183 /*-----------------------------------------------------------*/
 184
 185 #pragma shadow_registers = full   // Naked.
 186 void SCALLYield( void )
 187 {
 188         /* Save the context of the interrupted task. */
 189         portSAVE_CONTEXT_SCALL();
 190         vTaskSwitchContext();
 191         portRESTORE_CONTEXT_SCALL();
 192 }
 193 /*-----------------------------------------------------------*/
 194
 195 /* The code generated by the GCC compiler uses the stack in different ways at
 196 different optimisation levels.  The interrupt flags can therefore not always
 197 be saved to the stack.  Instead the critical section nesting level is stored
 198 in a variable, which is then saved as part of the stack context. */
 199 #pragma optimize = no_inline
 200 void vPortEnterCritical( void )
 201 {
 202         /* Disable interrupts */
 203         portDISABLE_INTERRUPTS();
 204
 205         /* Now interrupts are disabled ulCriticalNesting can be accessed
 206          directly.  Increment ulCriticalNesting to keep a count of how many times
 207          portENTER_CRITICAL() has been called. */
 208         ulCriticalNesting++;
 209 }
 210 /*-----------------------------------------------------------*/
 211
 212 #pragma optimize = no_inline
 213 void vPortExitCritical( void )
 214 {
 215         if(ulCriticalNesting > portNO_CRITICAL_NESTING)
 216         {
 217                 ulCriticalNesting--;
 218                 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
 219                 {
 220                         /* Enable all interrupt/exception. */
 221                         portENABLE_INTERRUPTS();
 222                 }
 223         }
 224 }
 225 /*-----------------------------------------------------------*/
 226
 227 /*
 228  * Initialise the stack of a task to look exactly as if a call to
 229  * portSAVE_CONTEXT had been called.
 230  *
 231  * See header file for description.
 232  */
 233 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
 234 {
 235         /* Setup the initial stack of the task.  The stack is set exactly as
 236         expected by the portRESTORE_CONTEXT() macro. */
 237
 238         /* When the task starts, it will expect to find the function parameter in R12. */
 239         pxTopOfStack--;
 240         *pxTopOfStack-- = ( StackType_t ) 0x08080808;                                   /* R8 */
 241         *pxTopOfStack-- = ( StackType_t ) 0x09090909;                                   /* R9 */
 242         *pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A;                                   /* R10 */
 243         *pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B;                                   /* R11 */
 244         *pxTopOfStack-- = ( StackType_t ) pvParameters;                                 /* R12 */
 245         *pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF;                                   /* R14/LR */
 246         *pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
 247         *pxTopOfStack-- = ( StackType_t ) portINITIAL_SR;                               /* SR */
 248         *pxTopOfStack-- = ( StackType_t ) 0xFF0000FF;                                   /* R0 */
 249         *pxTopOfStack-- = ( StackType_t ) 0x01010101;                                   /* R1 */
 250         *pxTopOfStack-- = ( StackType_t ) 0x02020202;                                   /* R2 */
 251         *pxTopOfStack-- = ( StackType_t ) 0x03030303;                                   /* R3 */
 252         *pxTopOfStack-- = ( StackType_t ) 0x04040404;                                   /* R4 */
 253         *pxTopOfStack-- = ( StackType_t ) 0x05050505;                                   /* R5 */
 254         *pxTopOfStack-- = ( StackType_t ) 0x06060606;                                   /* R6 */
 255         *pxTopOfStack-- = ( StackType_t ) 0x07070707;                                   /* R7 */
 256         *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING;                        /* ulCriticalNesting */
 257
 258         return pxTopOfStack;
 259 }
 260 /*-----------------------------------------------------------*/
 261
 262 BaseType_t xPortStartScheduler( void )
 263 {
 264         /* Start the timer that generates the tick ISR.  Interrupts are disabled
 265         here already. */
 266         prvSetupTimerInterrupt();
 267
 268         /* Start the first task. */
 269         portRESTORE_CONTEXT();
 270
 271         /* Should not get here! */
 272         return 0;
 273 }
 274 /*-----------------------------------------------------------*/
 275
 276 void vPortEndScheduler( void )
 277 {
 278         /* It is unlikely that the AVR32 port will require this function as there
 279         is nothing to return to.  */
 280 }
 281 /*-----------------------------------------------------------*/
 282
 283 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
 284 clock cycles from now. */
 285 #if( configTICK_USE_TC==0 )
 286         static void prvScheduleFirstTick(void)
 287         {
 288                 uint32_t lCycles;
 289
 290                 lCycles = Get_system_register(AVR32_COUNT);
 291                 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
 292                 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
 293                 // generation feature does not get disabled.
 294                 if(0 == lCycles)
 295                 {
 296                         lCycles++;
 297                 }
 298                 Set_system_register(AVR32_COMPARE, lCycles);
 299         }
 300
 301         #pragma optimize = no_inline
 302         static void prvScheduleNextTick(void)
 303         {
 304                 uint32_t lCycles, lCount;
 305
 306                 lCycles = Get_system_register(AVR32_COMPARE);
 307                 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
 308                 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
 309                 // generation feature does not get disabled.
 310                 if(0 == lCycles)
 311                 {
 312                         lCycles++;
 313                 }
 314                 lCount = Get_system_register(AVR32_COUNT);
 315                 if( lCycles < lCount )
 316                 {               // We missed a tick, recover for the next.
 317                         lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
 318                 }
 319                 Set_system_register(AVR32_COMPARE, lCycles);
 320         }
 321 #else
 322         #pragma optimize = no_inline
 323         static void prvClearTcInt(void)
 324         {
 325                 AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
 326         }
 327 #endif
 328 /*-----------------------------------------------------------*/
 329
 330 /* Setup the timer to generate the tick interrupts. */
 331 static void prvSetupTimerInterrupt(void)
 332 {
 333         #if( configTICK_USE_TC==1 )
 334
 335                 volatile avr32_tc_t *tc = &AVR32_TC;
 336
 337                 // Options for waveform genration.
 338                 tc_waveform_opt_t waveform_opt =
 339                 {
 340                 .channel  = configTICK_TC_CHANNEL,             /* Channel selection. */
 341
 342                 .bswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOB. */
 343                 .beevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOB. */
 344                 .bcpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOB. */
 345                 .bcpb     = TC_EVT_EFFECT_NOOP,                /* RB compare effect on TIOB. */
 346
 347                 .aswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOA. */
 348                 .aeevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOA. */
 349                 .acpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOA: toggle. */
 350                 .acpa     = TC_EVT_EFFECT_NOOP,                /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
 351
 352                 .wavsel   = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
 353                 .enetrg   = FALSE,                             /* External event trigger enable. */
 354                 .eevt     = 0,                                 /* External event selection. */
 355                 .eevtedg  = TC_SEL_NO_EDGE,                    /* External event edge selection. */
 356                 .cpcdis   = FALSE,                             /* Counter disable when RC compare. */
 357                 .cpcstop  = FALSE,                             /* Counter clock stopped with RC compare. */
 358
 359                 .burst    = FALSE,                             /* Burst signal selection. */
 360                 .clki     = FALSE,                             /* Clock inversion. */
 361                 .tcclks   = TC_CLOCK_SOURCE_TC2                /* Internal source clock 2. */
 362                 };
 363
 364                 tc_interrupt_t tc_interrupt =
 365                 {
 366                         .etrgs=0,
 367                         .ldrbs=0,
 368                         .ldras=0,
 369                         .cpcs =1,
 370                         .cpbs =0,
 371                         .cpas =0,
 372                         .lovrs=0,
 373                         .covfs=0,
 374                 };
 375
 376         #endif
 377
 378         /* Disable all interrupt/exception. */
 379         portDISABLE_INTERRUPTS();
 380
 381         /* Register the compare interrupt handler to the interrupt controller and
 382         enable the compare interrupt. */
 383
 384         #if( configTICK_USE_TC==1 )
 385         {
 386                 INTC_register_interrupt((__int_handler)&vTick, configTICK_TC_IRQ, INT0);
 387
 388                 /* Initialize the timer/counter. */
 389                 tc_init_waveform(tc, &waveform_opt);
 390
 391                 /* Set the compare triggers.
 392                 Remember TC counter is 16-bits, so counting second is not possible!
 393                 That's why we configure it to count ms. */
 394                 tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
 395
 396                 tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
 397
 398                 /* Start the timer/counter. */
 399                 tc_start(tc, configTICK_TC_CHANNEL);
 400         }
 401         #else
 402         {
 403                 INTC_register_interrupt((__int_handler)&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
 404                 prvScheduleFirstTick();
 405         }
 406         #endif
 407 }