2 * FreeRTOS Kernel <DEVELOPMENT BRANCH>
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
29 /* FreeRTOS includes. */
30 #include "FreeRTOSConfig.h"
32 /* Xilinx library includes. */
33 #include "microblaze_exceptions_g.h"
34 #include "xparameters.h"
36 #include "microblaze_instructions.h"
37 /* The context is oversized to allow functions called from the ISR to write
38 back into the caller stack. */
39 #if defined (__arch64__)
40 #if( XPAR_MICROBLAZE_USE_FPU != 0 )
41 #define portCONTEXT_SIZE 272
42 #define portMINUS_CONTEXT_SIZE -272
44 #define portCONTEXT_SIZE 264
45 #define portMINUS_CONTEXT_SIZE -264
48 #if( XPAR_MICROBLAZE_USE_FPU != 0 )
49 #define portCONTEXT_SIZE 136
50 #define portMINUS_CONTEXT_SIZE -136
52 #define portCONTEXT_SIZE 132
53 #define portMINUS_CONTEXT_SIZE -132
57 /* Offsets from the stack pointer at which saved registers are placed. */
58 #if defined (__arch64__)
59 #define portR31_OFFSET 8
60 #define portR30_OFFSET 16
61 #define portR29_OFFSET 24
62 #define portR28_OFFSET 32
63 #define portR27_OFFSET 40
64 #define portR26_OFFSET 48
65 #define portR25_OFFSET 56
66 #define portR24_OFFSET 64
67 #define portR23_OFFSET 72
68 #define portR22_OFFSET 80
69 #define portR21_OFFSET 88
70 #define portR20_OFFSET 96
71 #define portR19_OFFSET 104
72 #define portR18_OFFSET 112
73 #define portR17_OFFSET 120
74 #define portR16_OFFSET 128
75 #define portR15_OFFSET 136
76 #define portR14_OFFSET 144
77 #define portR13_OFFSET 152
78 #define portR12_OFFSET 160
79 #define portR11_OFFSET 168
80 #define portR10_OFFSET 176
81 #define portR9_OFFSET 184
82 #define portR8_OFFSET 192
83 #define portR7_OFFSET 200
84 #define portR6_OFFSET 208
85 #define portR5_OFFSET 216
86 #define portR4_OFFSET 224
87 #define portR3_OFFSET 232
88 #define portR2_OFFSET 240
89 #define portCRITICAL_NESTING_OFFSET 248
90 #define portMSR_OFFSET 256
91 #define portFSR_OFFSET 264
93 #define portR31_OFFSET 4
94 #define portR30_OFFSET 8
95 #define portR29_OFFSET 12
96 #define portR28_OFFSET 16
97 #define portR27_OFFSET 20
98 #define portR26_OFFSET 24
99 #define portR25_OFFSET 28
100 #define portR24_OFFSET 32
101 #define portR23_OFFSET 36
102 #define portR22_OFFSET 40
103 #define portR21_OFFSET 44
104 #define portR20_OFFSET 48
105 #define portR19_OFFSET 52
106 #define portR18_OFFSET 56
107 #define portR17_OFFSET 60
108 #define portR16_OFFSET 64
109 #define portR15_OFFSET 68
110 #define portR14_OFFSET 72
111 #define portR13_OFFSET 76
112 #define portR12_OFFSET 80
113 #define portR11_OFFSET 84
114 #define portR10_OFFSET 88
115 #define portR9_OFFSET 92
116 #define portR8_OFFSET 96
117 #define portR7_OFFSET 100
118 #define portR6_OFFSET 104
119 #define portR5_OFFSET 108
120 #define portR4_OFFSET 112
121 #define portR3_OFFSET 116
122 #define portR2_OFFSET 120
123 #define portCRITICAL_NESTING_OFFSET 124
124 #define portMSR_OFFSET 128
125 #define portFSR_OFFSET 132
130 .extern XIntc_DeviceInterruptHandler
131 .extern vTaskSwitchContext
132 .extern uxCriticalNesting
134 .extern ulTaskSwitchRequested
135 .extern vPortExceptionHandler
136 .extern pulStackPointerOnFunctionEntry
138 .global _interrupt_handler
139 .global VPortYieldASM
140 .global vPortStartFirstTask
141 .global vPortExceptionHandlerEntry
144 .macro portSAVE_CONTEXT
146 /* Make room for the context on the stack. */
147 ADDLIK r1, r1, portMINUS_CONTEXT_SIZE
149 /* Stack general registers. */
150 SI r31, r1, portR31_OFFSET
151 SI r30, r1, portR30_OFFSET
152 SI r29, r1, portR29_OFFSET
153 SI r28, r1, portR28_OFFSET
154 SI r27, r1, portR27_OFFSET
155 SI r26, r1, portR26_OFFSET
156 SI r25, r1, portR25_OFFSET
157 SI r24, r1, portR24_OFFSET
158 SI r23, r1, portR23_OFFSET
159 SI r22, r1, portR22_OFFSET
160 SI r21, r1, portR21_OFFSET
161 SI r20, r1, portR20_OFFSET
162 SI r19, r1, portR19_OFFSET
163 SI r18, r1, portR18_OFFSET
164 SI r17, r1, portR17_OFFSET
165 SI r16, r1, portR16_OFFSET
166 SI r15, r1, portR15_OFFSET
167 /* R14 is saved later as it needs adjustment if a yield is performed. */
168 SI r13, r1, portR13_OFFSET
169 SI r12, r1, portR12_OFFSET
170 SI r11, r1, portR11_OFFSET
171 SI r10, r1, portR10_OFFSET
172 SI r9, r1, portR9_OFFSET
173 SI r8, r1, portR8_OFFSET
174 SI r7, r1, portR7_OFFSET
175 SI r6, r1, portR6_OFFSET
176 SI r5, r1, portR5_OFFSET
177 SI r4, r1, portR4_OFFSET
178 SI r3, r1, portR3_OFFSET
179 SI r2, r1, portR2_OFFSET
181 /* Stack the critical section nesting value. */
182 LI r18, r0, uxCriticalNesting
183 SI r18, r1, portCRITICAL_NESTING_OFFSET
187 SI r18, r1, portMSR_OFFSET
189 #if( XPAR_MICROBLAZE_USE_FPU != 0 )
192 SI r18, r1, portFSR_OFFSET
195 #if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
196 /* Save the stack limits */
198 swi r18, r1, portSLR_OFFSET
200 swi r18, r1, portSHR_OFFSET
203 /* Save the top of stack value to the TCB. */
204 LI r3, r0, pxCurrentTCB
209 .macro portRESTORE_CONTEXT
211 /* Load the top of stack value from the TCB. */
212 LI r18, r0, pxCurrentTCB
215 #if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
216 /* Restore the stack limits -- must not load from r1 (Stack Pointer)
217 because if the address of load or store instruction is out of range,
218 it will trigger Stack Protection Violation exception. */
220 lwi r12, r18, portSLR_OFFSET
222 lwi r12, r18, portSHR_OFFSET
226 /* Restore the general registers. */
227 LI r31, r1, portR31_OFFSET
228 LI r30, r1, portR30_OFFSET
229 LI r29, r1, portR29_OFFSET
230 LI r28, r1, portR28_OFFSET
231 LI r27, r1, portR27_OFFSET
232 LI r26, r1, portR26_OFFSET
233 LI r25, r1, portR25_OFFSET
234 LI r24, r1, portR24_OFFSET
235 LI r23, r1, portR23_OFFSET
236 LI r22, r1, portR22_OFFSET
237 LI r21, r1, portR21_OFFSET
238 LI r20, r1, portR20_OFFSET
239 LI r19, r1, portR19_OFFSET
240 LI r17, r1, portR17_OFFSET
241 LI r16, r1, portR16_OFFSET
242 LI r15, r1, portR15_OFFSET
243 LI r14, r1, portR14_OFFSET
244 LI r13, r1, portR13_OFFSET
245 LI r12, r1, portR12_OFFSET
246 LI r11, r1, portR11_OFFSET
247 LI r10, r1, portR10_OFFSET
248 LI r9, r1, portR9_OFFSET
249 LI r8, r1, portR8_OFFSET
250 LI r7, r1, portR7_OFFSET
251 LI r6, r1, portR6_OFFSET
252 LI r5, r1, portR5_OFFSET
253 LI r4, r1, portR4_OFFSET
254 LI r3, r1, portR3_OFFSET
255 LI r2, r1, portR2_OFFSET
257 /* Reload the rmsr from the stack. */
258 LI r18, r1, portMSR_OFFSET
261 #if( XPAR_MICROBLAZE_USE_FPU != 0 )
262 /* Reload the FSR from the stack. */
263 LI r18, r1, portFSR_OFFSET
267 /* Load the critical nesting value. */
268 LI r18, r1, portCRITICAL_NESTING_OFFSET
269 SI r18, r0, uxCriticalNesting
271 /* Test the critical nesting value. If it is non zero then the task last
272 exited the running state using a yield. If it is zero, then the task
273 last exited the running state through an interrupt. */
275 BNEI r18, exit_from_yield
277 /* r18 was being used as a temporary. Now restore its true value from the
279 LI r18, r1, portR18_OFFSET
281 /* Remove the stack frame. */
282 ADDLIK r1, r1, portCONTEXT_SIZE
284 /* Return using rtid so interrupts are re-enabled as this function is
291 /* This function is used to exit portRESTORE_CONTEXT() if the task being
292 returned to last left the Running state by calling taskYIELD() (rather than
293 being preempted by an interrupt). */
303 /* r18 was being used as a temporary. Now restore its true value from the
305 LI r18, r1, portR18_OFFSET
307 /* Remove the stack frame. */
308 ADDLIK r1, r1, portCONTEXT_SIZE
310 /* Return to the task. */
327 /* Stack the return address. */
328 SI r14, r1, portR14_OFFSET
330 /* Switch to the ISR stack. */
331 LI r1, r0, pulISRStack
333 #if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
334 ori r18, r0, _stack_end
340 /* The parameter to the interrupt handler. */
341 ORI r5, r0, configINTERRUPT_CONTROLLER_TO_USE
343 /* Execute any pending interrupts. */
344 BRALID r15, XIntc_DeviceInterruptHandler
347 /* See if a new task should be selected to execute. */
348 LI r18, r0, ulTaskSwitchRequested
351 /* If ulTaskSwitchRequested is already zero, then jump straight to
352 restoring the task that is already in the Running state. */
353 BEQI r18, task_switch_not_requested
355 /* Set ulTaskSwitchRequested back to zero as a task switch is about to be
357 SI r0, r0, ulTaskSwitchRequested
359 /* ulTaskSwitchRequested was not 0 when tested. Select the next task to
361 BRALID r15, vTaskSwitchContext
364 task_switch_not_requested:
366 /* Restore the context of the next task scheduled to execute. */
381 /* Modify the return address so a return is done to the instruction after
382 the call to VPortYieldASM. */
384 SI r14, r1, portR14_OFFSET
386 /* Switch to use the ISR stack. */
387 LI r1, r0, pulISRStack
389 #if( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
390 ori r18, r0, _stack_end
396 /* Select the next task to execute. */
397 BRALID r15, vTaskSwitchContext
400 /* Restore the context of the next task scheduled to execute. */
416 #if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
425 vPortExceptionHandlerEntry:
427 /* Take a copy of the stack pointer before vPortExecptionHandler is called,
428 storing its value prior to the function stack frame being created. */
429 SI r1, r0, pulStackPointerOnFunctionEntry
430 BRALID r15, vPortExceptionHandler
433 #endif /* ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 ) */