2 * FreeRTOS Kernel <DEVELOPMENT BRANCH>
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
29 #include <FreeRTOSConfig.h>
34 EXTERN vPortYieldFromISR
36 EXTERN vTaskSwitchContext
39 PUBLIC xPortPendSVHandler
40 PUBLIC vPortSVCHandler
41 PUBLIC vPortStartFirstTask
42 PUBLIC ulSetInterruptMaskFromISR
43 PUBLIC vClearInterruptMaskFromISR
45 /*-----------------------------------------------------------*/
51 /*-----------------------------------------------------------*/
56 ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
59 subs r0, r0, #32 /* Make space for the remaining low registers. */
60 str r0, [r2] /* Save the new top of stack. */
61 stmia r0!, {r4-r7} /* Store the low registers that are not saved automatically. */
62 mov r4, r8 /* Store the high registers. */
72 pop {r2, r3} /* lr goes in r3. r2 now holds tcb pointer. */
75 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
76 adds r0, r0, #16 /* Move to the high registers. */
77 ldmia r0!, {r4-r7} /* Pop the high registers. */
83 msr psp, r0 /* Remember the new top of stack for the task. */
85 subs r0, r0, #32 /* Go back for the low registers that are not automatically restored. */
86 ldmia r0!, {r4-r7} /* Pop low registers. */
90 /*-----------------------------------------------------------*/
93 /* This function is no longer used, but retained for backward
97 /*-----------------------------------------------------------*/
100 /* Don't reset the MSP stack as is done on CM3/4 devices. The vector table
101 * in some CM0 devices cannot be modified and thus may not hold the
102 * application's initial MSP value. */
104 ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
106 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
107 adds r0, #32 /* Discard everything up to r0. */
108 msr psp, r0 /* This is now the new top of stack to use in the task. */
109 movs r0, #2 /* Switch to the psp stack. */
112 pop {r0-r5} /* Pop the registers that are saved automatically. */
113 mov lr, r5 /* lr is now in r5. */
114 pop {r3} /* The return address is now in r3. */
115 pop {r2} /* Pop and discard the XPSR. */
116 cpsie i /* The first task has its context and interrupts can be enabled. */
117 bx r3 /* Jump to the user defined task code. */
119 /*-----------------------------------------------------------*/
121 ulSetInterruptMaskFromISR
126 /*-----------------------------------------------------------*/
128 vClearInterruptMaskFromISR