2 * FreeRTOS Kernel <DEVELOPMENT BRANCH>
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
29 SECTION .text:CODE:NOROOT(2)
32 /* Including FreeRTOSConfig.h here will cause build errors if the header file
33 contains code not understood by the assembler - for example the 'extern' keyword.
34 To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
35 the code is included in C files but excluded by the preprocessor in assembly
36 files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
37 #include "FreeRTOSConfig.h"
39 PUBLIC SecureContext_LoadContextAsm
40 PUBLIC SecureContext_SaveContextAsm
41 /*-----------------------------------------------------------*/
43 SecureContext_LoadContextAsm:
44 /* pxSecureContext value is in r0. */
45 mrs r1, ipsr /* r1 = IPSR. */
46 cbz r1, load_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */
47 ldmia r0!, {r1, r2} /* r1 = pxSecureContext->pucCurrentStackPointer, r2 = pxSecureContext->pucStackLimit. */
49 #if ( configENABLE_MPU == 1 )
50 ldmia r1!, {r3} /* Read CONTROL register value from task's stack. r3 = CONTROL. */
51 msr control, r3 /* CONTROL = r3. */
52 #endif /* configENABLE_MPU */
54 msr psplim, r2 /* PSPLIM = r2. */
55 msr psp, r1 /* PSP = r1. */
59 /*-----------------------------------------------------------*/
61 SecureContext_SaveContextAsm:
62 /* pxSecureContext value is in r0. */
63 mrs r1, ipsr /* r1 = IPSR. */
64 cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */
65 mrs r1, psp /* r1 = PSP. */
67 #if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
68 vstmdb r1!, {s0} /* Trigger the deferred stacking of FPU registers. */
69 vldmia r1!, {s0} /* Nullify the effect of the previous statement. */
70 #endif /* configENABLE_FPU || configENABLE_MVE */
72 #if ( configENABLE_MPU == 1 )
73 mrs r2, control /* r2 = CONTROL. */
74 stmdb r1!, {r2} /* Store CONTROL value on the stack. */
75 #endif /* configENABLE_MPU */
77 str r1, [r0] /* Save the top of stack in context. pxSecureContext->pucCurrentStackPointer = r1. */
78 movs r1, #0 /* r1 = securecontextNO_STACK. */
79 msr psplim, r1 /* PSPLIM = securecontextNO_STACK. */
80 msr psp, r1 /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
84 /*-----------------------------------------------------------*/