2 * FreeRTOS Kernel <DEVELOPMENT BRANCH>
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
39 /*-----------------------------------------------------------
40 * Port specific definitions.
42 * The settings in this file configure FreeRTOS correctly for the
43 * given hardware and compiler.
45 * These settings should not be altered.
46 *-----------------------------------------------------------
49 /* Type definitions. */
51 #define portFLOAT float
52 #define portDOUBLE double
54 #define portSHORT short
55 #define portSTACK_TYPE uint32_t
56 #define portBASE_TYPE long
58 typedef portSTACK_TYPE StackType_t;
59 typedef long BaseType_t;
60 typedef unsigned long UBaseType_t;
62 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
63 typedef uint16_t TickType_t;
64 #define portMAX_DELAY ( TickType_t ) 0xffff
65 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
66 typedef uint32_t TickType_t;
67 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
70 * not need to be guarded with a critical section. */
71 #define portTICK_TYPE_IS_ATOMIC 1
73 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
75 /*-----------------------------------------------------------*/
77 /* Architecture specifics. */
78 #define portSTACK_GROWTH ( -1 )
79 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
80 #define portBYTE_ALIGNMENT 8
81 #define portDONT_DISCARD __attribute__( ( used ) )
82 /*-----------------------------------------------------------*/
84 /* Scheduler utilities. */
87 /* Set a PendSV to request a context switch. */ \
88 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
90 /* Barriers are normally not required but do ensure the code is completely \
91 * within the specified behaviour for the architecture. */ \
92 __asm volatile ( "dsb" ::: "memory" ); \
93 __asm volatile ( "isb" ); \
96 #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
97 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
98 #define portEND_SWITCHING_ISR( xSwitchRequired ) do { if( xSwitchRequired != pdFALSE ) portYIELD(); } while( 0 )
99 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
100 /*-----------------------------------------------------------*/
102 /* Critical section management. */
103 extern void vPortEnterCritical( void );
104 extern void vPortExitCritical( void );
105 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
106 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
107 #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
108 #define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
109 #define portENTER_CRITICAL() vPortEnterCritical()
110 #define portEXIT_CRITICAL() vPortExitCritical()
112 /*-----------------------------------------------------------*/
114 /* Task function macros as described on the FreeRTOS.org WEB site. These are
115 * not necessary for to use this port. They are defined so the common demo files
116 * (which build with all the ports) will build. */
117 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
118 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
119 /*-----------------------------------------------------------*/
121 /* Tickless idle/low power functionality. */
122 #ifndef portSUPPRESS_TICKS_AND_SLEEP
123 extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
124 #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
126 /*-----------------------------------------------------------*/
128 /* Architecture specific optimisations. */
129 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
130 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
133 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
135 /* Generic helper function. */
136 __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
140 __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
145 /* Check the configuration. */
146 #if ( configMAX_PRIORITIES > 32 )
147 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
150 /* Store/clear the ready priorities in a bit map. */
151 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
152 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
154 /*-----------------------------------------------------------*/
156 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
158 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
160 /*-----------------------------------------------------------*/
163 void vPortValidateInterruptPriority( void );
164 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
167 /* portNOP() is not required by this port. */
170 #define portINLINE __inline
172 #ifndef portFORCE_INLINE
173 #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
176 /*-----------------------------------------------------------*/
178 portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
180 uint32_t ulCurrentInterrupt;
183 /* Obtain the number of the currently executing interrupt. */
184 __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
186 if( ulCurrentInterrupt == 0 )
198 /*-----------------------------------------------------------*/
200 portFORCE_INLINE static void vPortRaiseBASEPRI( void )
202 uint32_t ulNewBASEPRI;
207 " msr basepri, %0 \n"\
210 : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
214 /*-----------------------------------------------------------*/
216 portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
218 uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
222 " mrs %0, basepri \n"\
224 " msr basepri, %1 \n"\
227 : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
230 /* This return will not be reached but is necessary to prevent compiler
232 return ulOriginalBASEPRI;
234 /*-----------------------------------------------------------*/
236 portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
240 " msr basepri, %0 "::"r" ( ulNewMaskValue ) : "memory"
243 /*-----------------------------------------------------------*/
245 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
253 #endif /* PORTMACRO_H */