2 * FreeRTOS Kernel <DEVELOPMENT BRANCH>
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
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24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the RISC-V port.
31 *----------------------------------------------------------*/
33 /* Scheduler includes. */
36 #include "portmacro.h"
38 /* Standard includes. */
41 #ifdef configCLINT_BASE_ADDRESS
42 #warning The configCLINT_BASE_ADDRESS constant has been deprecated. configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting. Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS dirctly in place of configCLINT_BASE_ADDRESS. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
45 #ifndef configMTIME_BASE_ADDRESS
46 #warning configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address. Otherwise set configMTIME_BASE_ADDRESS to 0. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
49 #ifndef configMTIMECMP_BASE_ADDRESS
50 #warning configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address. Otherwise set configMTIMECMP_BASE_ADDRESS to 0. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
53 /* Let the user override the pre-loading of the initial RA. */
54 #ifdef configTASK_RETURN_ADDRESS
55 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
57 #define portTASK_RETURN_ADDRESS 0
60 /* The stack used by interrupt service routines. Set configISR_STACK_SIZE_WORDS
61 * to use a statically allocated array as the interrupt stack. Alternative leave
62 * configISR_STACK_SIZE_WORDS undefined and update the linker script so that a
63 * linker variable names __freertos_irq_stack_top has the same value as the top
64 * of the stack used by main. Using the linker script method will repurpose the
65 * stack that was used by main before the scheduler was started for use as the
66 * interrupt stack after the scheduler has started. */
67 #ifdef configISR_STACK_SIZE_WORDS
68 static __attribute__ ((aligned(16))) StackType_t xISRStack[ configISR_STACK_SIZE_WORDS ] = { 0 };
69 const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] );
71 /* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for
72 the task stacks, and so will legitimately appear in many positions within
74 #define portISR_STACK_FILL_BYTE 0xee
76 extern const uint32_t __freertos_irq_stack_top[];
77 const StackType_t xISRStackTop = ( StackType_t ) __freertos_irq_stack_top;
81 * Setup the timer to generate the tick interrupts. The implementation in this
82 * file is weak to allow application writers to change the timer used to
83 * generate the tick interrupt.
85 void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));
87 /*-----------------------------------------------------------*/
89 /* Used to program the machine timer compare register. */
90 uint64_t ullNextTime = 0ULL;
91 const uint64_t *pullNextTime = &ullNextTime;
92 const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */
93 uint32_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS;
94 volatile uint64_t * pullMachineTimerCompareRegister = NULL;
96 /* Holds the critical nesting value - deliberately non-zero at start up to
97 * ensure interrupts are not accidentally enabled before the scheduler starts. */
98 size_t xCriticalNesting = ( size_t ) 0xaaaaaaaa;
99 size_t *pxCriticalNesting = &xCriticalNesting;
101 /* Used to catch tasks that attempt to return from their implementing function. */
102 size_t xTaskReturnAddress = ( size_t ) portTASK_RETURN_ADDRESS;
104 /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
105 * stack checking. A problem in the ISR stack will trigger an assert, not call
106 * the stack overflow hook function (because the stack overflow hook is specific
107 * to a task stack, not the ISR stack). */
108 #if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 )
109 #warning This path not tested, or even compiled yet.
111 static const uint8_t ucExpectedStackBytes[] = {
112 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
113 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
114 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
115 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
116 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
118 #define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
120 /* Define the function away. */
121 #define portCHECK_ISR_STACK()
122 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
124 /*-----------------------------------------------------------*/
126 #if( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 )
128 void vPortSetupTimerInterrupt( void )
130 uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
131 volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte type so high 32-bit word is 4 bytes up. */
132 volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS );
133 volatile uint32_t ulHartId;
135 __asm volatile( "csrr %0, mhartid" : "=r"( ulHartId ) );
136 pullMachineTimerCompareRegister = ( volatile uint64_t * ) ( ullMachineTimerCompareRegisterBase + ( ulHartId * sizeof( uint64_t ) ) );
140 ulCurrentTimeHigh = *pulTimeHigh;
141 ulCurrentTimeLow = *pulTimeLow;
142 } while( ulCurrentTimeHigh != *pulTimeHigh );
144 ullNextTime = ( uint64_t ) ulCurrentTimeHigh;
145 ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */
146 ullNextTime |= ( uint64_t ) ulCurrentTimeLow;
147 ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;
148 *pullMachineTimerCompareRegister = ullNextTime;
150 /* Prepare the time to use after the next tick interrupt. */
151 ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;
154 #endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIME_BASE_ADDRESS != 0 ) */
155 /*-----------------------------------------------------------*/
157 BaseType_t xPortStartScheduler( void )
159 extern void xPortStartFirstTask( void );
161 #if( configASSERT_DEFINED == 1 )
163 /* Check alignment of the interrupt stack - which is the same as the
164 * stack that was being used by main() prior to the scheduler being
166 configASSERT( ( xISRStackTop & portBYTE_ALIGNMENT_MASK ) == 0 );
168 #ifdef configISR_STACK_SIZE_WORDS
170 memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );
172 #endif /* configISR_STACK_SIZE_WORDS */
174 #endif /* configASSERT_DEFINED */
176 /* If there is a CLINT then it is ok to use the default implementation
177 * in this file, otherwise vPortSetupTimerInterrupt() must be implemented to
178 * configure whichever clock is to be used to generate the tick interrupt. */
179 vPortSetupTimerInterrupt();
181 #if( ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) )
183 /* Enable mtime and external interrupts. 1<<7 for timer interrupt,
184 * 1<<11 for external interrupt. _RB_ What happens here when mtime is
185 * not present as with pulpino? */
186 __asm volatile( "csrs mie, %0" :: "r"(0x880) );
188 #endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) */
190 xPortStartFirstTask();
192 /* Should not get here as after calling xPortStartFirstTask() only tasks
193 * should be executing. */
196 /*-----------------------------------------------------------*/
198 void vPortEndScheduler( void )
200 /* Not implemented. */
203 /*-----------------------------------------------------------*/