begriffs open source - freertos/blob - Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/main.c

   1 /*\r
   2     FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
   3         \r
   4 \r
   5     ***************************************************************************\r
   6      *                                                                       *\r
   7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
   8      *    Complete, revised, and edited pdf reference manuals are also       *\r
   9      *    available.                                                         *\r
  10      *                                                                       *\r
  11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
  12      *    ensuring you get running as quickly as possible and with an        *\r
  13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  14      *    the FreeRTOS project to continue with its mission of providing     *\r
  15      *    professional grade, cross platform, de facto standard solutions    *\r
  16      *    for microcontrollers - completely free of charge!                  *\r
  17      *                                                                       *\r
  18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
  19      *                                                                       *\r
  20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  21      *                                                                       *\r
  22     ***************************************************************************\r
  23 \r
  24 \r
  25     This file is part of the FreeRTOS distribution.\r
  26 \r
  27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  28     the terms of the GNU General Public License (version 2) as published by the\r
  29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
  31     distribute a combined work that includes FreeRTOS without being obliged to\r
  32     provide the source code for proprietary components outside of the FreeRTOS\r
  33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
  34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
  35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  36     more details. You should have received a copy of the GNU General Public\r
  37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
  38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
  39     by writing to Richard Barry, contact details for whom are available on the\r
  40     FreeRTOS WEB site.\r
  41 \r
  42     1 tab == 4 spaces!\r
  43 \r
  44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  45     contact details.\r
  46 \r
  47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  48     critical systems.\r
  49 \r
  50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
  51     licensing and training services.\r
  52 */\r
  53 \r
  54 \r
  55 /*\r
  56  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
  57  * documentation provides more details of the standard demo application tasks.\r
  58  * In addition to the standard demo tasks, the following tasks and tests are\r
  59  * defined and/or created within this file:\r
  60  *\r
  61  * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
  62  * processing is performed in this task.  It manages the WEB server functionality.\r
  63  *\r
  64  * "Check" task -  This only executes every five seconds but has a high priority\r
  65  * to ensure it gets processor time.  Its main function is to check that all the\r
  66  * standard demo tasks are still operational.  An error found in any task will be\r
  67  * latched in the ulErrorCode variable for display through the WEB server (the\r
  68  * error code is displayed at the foot of the table that contains information on\r
  69  * the state of each task).\r
  70  *\r
  71  * "Reg test" tasks - These fill the registers with known values, then check\r
  72  * that each register still contains its expected value.  Each task uses\r
  73  * different values.  The tasks run with very low priority so get preempted very\r
  74  * frequently.  A register containing an unexpected value is indicative of an\r
  75  * error in the context switching mechanism.\r
  76  *\r
  77  */\r
  78 \r
  79 /* Standard includes. */\r
  80 #include <stdio.h>\r
  81 \r
  82 /* Scheduler includes. */\r
  83 #include "FreeRTOS.h"\r
  84 #include "task.h"\r
  85 #include "queue.h"\r
  86 #include "semphr.h"\r
  87 \r
  88 /* Demo app includes. */\r
  89 #include "BlockQ.h"\r
  90 #include "death.h"\r
  91 #include "blocktim.h"\r
  92 #include "flash.h"\r
  93 #include "partest.h"\r
  94 #include "semtest.h"\r
  95 #include "PollQ.h"\r
  96 #include "GenQTest.h"\r
  97 #include "QPeek.h"\r
  98 #include "recmutex.h"\r
  99 #include "IntQueue.h"\r
 100 #include "comtest2.h"\r
 101 \r
 102 /*-----------------------------------------------------------*/\r
 103 \r
 104 /* The time between cycles of the 'check' functionality - as described at the\r
 105 top of this file. */\r
 106 #define mainCHECK_TASK_PERIOD                                   ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
 107 \r
 108 /* Task priorities. */\r
 109 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
 110 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
 111 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
 112 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
 113 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
 114 \r
 115 /* The WEB server task uses more stack than most other tasks because of its\r
 116 reliance on using sprintf(). */\r
 117 #define mainBASIC_WEB_STACK_SIZE                        ( configMINIMAL_STACK_SIZE * 2 )\r
 118 \r
 119 /*\r
 120  * Configure the hardware for the demo.\r
 121  */\r
 122 static void prvSetupHardware( void );\r
 123 \r
 124 /*\r
 125  * Implements the 'check' task functionality as described at the top of this\r
 126  * file.\r
 127  */\r
 128 static void prvCheckTask( void *pvParameters );\r
 129 \r
 130 /*\r
 131  * The task that implements the WEB server.\r
 132  */\r
 133 extern void vuIP_Task( void *pvParameters );\r
 134 \r
 135 /*\r
 136  * Implement the 'Reg test' functionality as described at the top of this file.\r
 137  */\r
 138 static void vRegTest1Task( void *pvParameters );\r
 139 static void vRegTest2Task( void *pvParameters );\r
 140 \r
 141 /*-----------------------------------------------------------*/\r
 142 \r
 143 /* Counters used to detect errors within the reg test tasks. */\r
 144 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
 145 \r
 146 /* Any errors that the check task finds in any tasks are latched into \r
 147 ulErrorCode, and then displayed via the WEB server. */\r
 148 static unsigned portLONG ulErrorCode = 0UL;\r
 149 \r
 150 /*-----------------------------------------------------------*/\r
 151 \r
 152 int main( void )\r
 153 {\r
 154         /* Setup the hardware ready for this demo. */\r
 155         prvSetupHardware();\r
 156 \r
 157         /* Create the WEB server task. */\r
 158         xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
 159 \r
 160         /* Start the standard demo tasks. */\r
 161         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
 162         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 163     vCreateBlockTimeTasks();\r
 164         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
 165         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
 166         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
 167         vStartQueuePeekTasks();\r
 168     vStartRecursiveMutexTasks();\r
 169 \r
 170         /* Start the reg test tasks - defined in this file. */\r
 171         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
 172         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
 173 \r
 174         /* Create the check task. */\r
 175         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 176 \r
 177         /* Start the scheduler. */\r
 178         vTaskStartScheduler();\r
 179 \r
 180     /* Will only get here if there was insufficient heap to create the idle\r
 181     task. */\r
 182         for( ;; );\r
 183 }\r
 184 /*-----------------------------------------------------------*/\r
 185 \r
 186 static void prvCheckTask( void *pvParameters )\r
 187 {\r
 188 unsigned ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 189 portTickType xLastExecutionTime;\r
 190 \r
 191         /* To prevent compiler warnings. */\r
 192         ( void ) pvParameters;\r
 193 \r
 194         /* Initialise the variable used to control our iteration rate prior to\r
 195         its first use. */\r
 196         xLastExecutionTime = xTaskGetTickCount();\r
 197 \r
 198         for( ;; )\r
 199         {\r
 200                 /* Wait until it is time to run the tests again. */\r
 201                 vTaskDelayUntil( &xLastExecutionTime, mainCHECK_TASK_PERIOD );\r
 202 \r
 203                 /* Has an error been found in any task? */\r
 204                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
 205                 {\r
 206                         ulErrorCode |= 0x01UL;\r
 207                 }\r
 208 \r
 209                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
 210                 {\r
 211                         ulErrorCode |= 0x02UL;\r
 212                 }\r
 213 \r
 214                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
 215                 {\r
 216                         ulErrorCode |= 0x04UL;\r
 217                 }\r
 218 \r
 219                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
 220             {\r
 221                 ulErrorCode |= 0x20UL;\r
 222             }\r
 223 \r
 224                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
 225             {\r
 226                 ulErrorCode |= 0x40UL;\r
 227             }\r
 228 \r
 229                 if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
 230                 {\r
 231                         ulErrorCode |= 0x80UL;\r
 232                 }\r
 233 \r
 234             if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
 235             {\r
 236                 ulErrorCode |= 0x100UL;\r
 237             }\r
 238 \r
 239                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
 240                 {\r
 241                         ulErrorCode |= 0x200UL;\r
 242                 }\r
 243 \r
 244                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
 245                 {\r
 246                         ulErrorCode |= 0x200UL;\r
 247                 }\r
 248 \r
 249                 /* Remember the reg test counts so a stall in their values can be\r
 250                 detected next time around. */\r
 251                 ulLastRegTest1Count = ulRegTest1Counter;\r
 252                 ulLastRegTest2Count = ulRegTest2Counter;\r
 253         }\r
 254 }\r
 255 /*-----------------------------------------------------------*/\r
 256 \r
 257 unsigned portLONG ulGetErrorCode( void )\r
 258 {\r
 259         /* Returns the error code for display via the WEB server. */\r
 260         return ulErrorCode;\r
 261 }\r
 262 /*-----------------------------------------------------------*/\r
 263 \r
 264 void prvSetupHardware( void )\r
 265 {\r
 266 __attribute__ ((section(".cfmconfig")))\r
 267 static const unsigned long _cfm[6] = {\r
 268         0, /* KEY_UPPER 0x00000400 */\r
 269         0, /* KEY_LOWER 0x00000404 */\r
 270         0, /* CFMPROT 0x00000408 */\r
 271         0, /* CFMSACC 0x0000040C */\r
 272         0, /* CFMDACC 0x00000410 */\r
 273         0, /* CFMSEC 0x00000414 */\r
 274 };\r
 275 \r
 276         /* Just to stop compiler warnings. */\r
 277         ( void ) _cfm;\r
 278 \r
 279         /* Ensure the watchdog is disabled. */\r
 280         MCF_SCM_CWCR = 0;\r
 281 \r
 282     /* Initialize IPSBAR (0x40000000). */\r
 283         asm volatile(\r
 284                 "move.l  #0x40000000,%d0        \n"\r
 285                 "andi.l  #0xC0000000,%d0        \n"\r
 286                 "add.l   #0x1,%d0                       \n"\r
 287                 "move.l  %d0,0x40000000         "\r
 288         );\r
 289 \r
 290     /* Initialize FLASHBAR (0x00) */\r
 291         asm volatile(\r
 292                 "move.l  #0x00,%d0                      \n"\r
 293                 "andi.l  #0xFFF80000,%d0        \n"\r
 294                 "add.l   #0x41,%d0                      \n"\r
 295                 "movec   %d0,%FLASHBAR          "\r
 296         );\r
 297 \r
 298         portDISABLE_INTERRUPTS();\r
 299 \r
 300         /* RAMBAR. */\r
 301         MCF_SCM_RAMBAR = MCF_SCM_RAMBAR_BA( RAMBAR_ADDRESS ) | MCF_SCM_RAMBAR_BDE;\r
 302 \r
 303         /* Multiply 25MHz crystal by 12 to get 60MHz clock. */\r
 304         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(4) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;\r
 305         while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))\r
 306         {\r
 307         }\r
 308 \r
 309         /* Setup the port used to toggle LEDs. */\r
 310         vParTestInitialise();\r
 311 }\r
 312 /*-----------------------------------------------------------*/\r
 313 \r
 314 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
 315 {\r
 316         /* This will get called if a stack overflow is detected during the context\r
 317         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
 318         problems within nested interrupts, but only do this for debug purposes as\r
 319         it will increase the context switch time. */\r
 320 \r
 321         ( void ) pxTask;\r
 322         ( void ) pcTaskName;\r
 323 \r
 324         for( ;; );\r
 325 }\r
 326 /*-----------------------------------------------------------*/\r
 327 \r
 328 static void vRegTest1Task( void *pvParameters )\r
 329 {\r
 330         /* Sanity check - did we receive the parameter expected? */\r
 331         if( pvParameters != &ulRegTest1Counter )\r
 332         {\r
 333                 /* Change here so the check task can detect that an error occurred. */\r
 334                 for( ;; );\r
 335         }\r
 336 \r
 337         /* Set all the registers to known values, then check that each retains its\r
 338         expected value - as described at the top of this file.  If an error is\r
 339         found then the loop counter will no longer be incremented allowing the check\r
 340         task to recognise the error. */\r
 341         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
 342                                                 "       moveq           #1, %d0                                 \n\t"\r
 343                                                 "       moveq           #2, %d1                                 \n\t"\r
 344                                                 "       moveq           #3, %d2                                 \n\t"\r
 345                                                 "       moveq           #4, %d3                                 \n\t"\r
 346                                                 "       moveq           #5, %d4                                 \n\t"\r
 347                                                 "       moveq           #6, %d5                                 \n\t"\r
 348                                                 "       moveq           #7, %d6                                 \n\t"\r
 349                                                 "       moveq           #8, %d7                                 \n\t"\r
 350                                                 "       move            #9, %a0                                 \n\t"\r
 351                                                 "       move            #10, %a1                                \n\t"\r
 352                                                 "       move            #11, %a2                                \n\t"\r
 353                                                 "       move            #12, %a3                                \n\t"\r
 354                                                 "       move            #13, %a4                                \n\t"\r
 355                                                 "       move            #14, %a5                                \n\t"\r
 356                                                 "       move            #15, %a6                                \n\t"\r
 357                                                 "                                                                               \n\t"\r
 358                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
 359                                                 "       bne                     reg_test_1_error                \n\t"\r
 360                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
 361                                                 "       bne                     reg_test_1_error                \n\t"\r
 362                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
 363                                                 "       bne                     reg_test_1_error                \n\t"\r
 364                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
 365                                                 "       bne                     reg_test_1_error                \n\t"\r
 366                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
 367                                                 "       bne                     reg_test_1_error                \n\t"\r
 368                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
 369                                                 "       bne                     reg_test_1_error                \n\t"\r
 370                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
 371                                                 "       bne                     reg_test_1_error                \n\t"\r
 372                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
 373                                                 "       bne                     reg_test_1_error                \n\t"\r
 374                                                 "       move            %a0, %d0                                \n\t"\r
 375                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
 376                                                 "       bne                     reg_test_1_error                \n\t"\r
 377                                                 "       move            %a1, %d0                                \n\t"\r
 378                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 379                                                 "       bne                     reg_test_1_error                \n\t"\r
 380                                                 "       move            %a2, %d0                                \n\t"\r
 381                                                 "       cmpi.l          #11, %d0                                \n\t"\r
 382                                                 "       bne                     reg_test_1_error                \n\t"\r
 383                                                 "       move            %a3, %d0                                \n\t"\r
 384                                                 "       cmpi.l          #12, %d0                                \n\t"\r
 385                                                 "       bne                     reg_test_1_error                \n\t"\r
 386                                                 "       move            %a4, %d0                                \n\t"\r
 387                                                 "       cmpi.l          #13, %d0                                \n\t"\r
 388                                                 "       bne                     reg_test_1_error                \n\t"\r
 389                                                 "       move            %a5, %d0                                \n\t"\r
 390                                                 "       cmpi.l          #14, %d0                                \n\t"\r
 391                                                 "       bne                     reg_test_1_error                \n\t"\r
 392                                                 "       move            %a6, %d0                                \n\t"\r
 393                                                 "       cmpi.l          #15, %d0                                \n\t"\r
 394                                                 "       bne                     reg_test_1_error                \n\t"\r
 395                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 396                                                 "       addql           #1, %d0                                 \n\t"\r
 397                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
 398                                                 "       bra                     reg_test_1_start                \n\t"\r
 399                                                 "reg_test_1_error:                                              \n\t"\r
 400                                                 "       bra                     reg_test_1_error                \n\t"\r
 401                                         );\r
 402 }\r
 403 /*-----------------------------------------------------------*/\r
 404 \r
 405 static void vRegTest2Task( void *pvParameters )\r
 406 {\r
 407         /* Sanity check - did we receive the parameter expected? */\r
 408         if( pvParameters != &ulRegTest2Counter )\r
 409         {\r
 410                 /* Change here so the check task can detect that an error occurred. */\r
 411                 for( ;; );\r
 412         }\r
 413 \r
 414         /* Set all the registers to known values, then check that each retains its\r
 415         expected value - as described at the top of this file.  If an error is\r
 416         found then the loop counter will no longer be incremented allowing the check\r
 417         task to recognise the error. */\r
 418         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
 419                                                 "       moveq           #10, %d0                                \n\t"\r
 420                                                 "       moveq           #20, %d1                                \n\t"\r
 421                                                 "       moveq           #30, %d2                                \n\t"\r
 422                                                 "       moveq           #40, %d3                                \n\t"\r
 423                                                 "       moveq           #50, %d4                                \n\t"\r
 424                                                 "       moveq           #60, %d5                                \n\t"\r
 425                                                 "       moveq           #70, %d6                                \n\t"\r
 426                                                 "       moveq           #80, %d7                                \n\t"\r
 427                                                 "       move            #90, %a0                                \n\t"\r
 428                                                 "       move            #100, %a1                               \n\t"\r
 429                                                 "       move            #110, %a2                               \n\t"\r
 430                                                 "       move            #120, %a3                               \n\t"\r
 431                                                 "       move            #130, %a4                               \n\t"\r
 432                                                 "       move            #140, %a5                               \n\t"\r
 433                                                 "       move            #150, %a6                               \n\t"\r
 434                                                 "                                                                               \n\t"\r
 435                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 436                                                 "       bne                     reg_test_2_error                \n\t"\r
 437                                                 "       cmpi.l          #20, %d1                                \n\t"\r
 438                                                 "       bne                     reg_test_2_error                \n\t"\r
 439                                                 "       cmpi.l          #30, %d2                                \n\t"\r
 440                                                 "       bne                     reg_test_2_error                \n\t"\r
 441                                                 "       cmpi.l          #40, %d3                                \n\t"\r
 442                                                 "       bne                     reg_test_2_error                \n\t"\r
 443                                                 "       cmpi.l          #50, %d4                                \n\t"\r
 444                                                 "       bne                     reg_test_2_error                \n\t"\r
 445                                                 "       cmpi.l          #60, %d5                                \n\t"\r
 446                                                 "       bne                     reg_test_2_error                \n\t"\r
 447                                                 "       cmpi.l          #70, %d6                                \n\t"\r
 448                                                 "       bne                     reg_test_2_error                \n\t"\r
 449                                                 "       cmpi.l          #80, %d7                                \n\t"\r
 450                                                 "       bne                     reg_test_2_error                \n\t"\r
 451                                                 "       move            %a0, %d0                                \n\t"\r
 452                                                 "       cmpi.l          #90, %d0                                \n\t"\r
 453                                                 "       bne                     reg_test_2_error                \n\t"\r
 454                                                 "       move            %a1, %d0                                \n\t"\r
 455                                                 "       cmpi.l          #100, %d0                               \n\t"\r
 456                                                 "       bne                     reg_test_2_error                \n\t"\r
 457                                                 "       move            %a2, %d0                                \n\t"\r
 458                                                 "       cmpi.l          #110, %d0                               \n\t"\r
 459                                                 "       bne                     reg_test_2_error                \n\t"\r
 460                                                 "       move            %a3, %d0                                \n\t"\r
 461                                                 "       cmpi.l          #120, %d0                               \n\t"\r
 462                                                 "       bne                     reg_test_2_error                \n\t"\r
 463                                                 "       move            %a4, %d0                                \n\t"\r
 464                                                 "       cmpi.l          #130, %d0                               \n\t"\r
 465                                                 "       bne                     reg_test_2_error                \n\t"\r
 466                                                 "       move            %a5, %d0                                \n\t"\r
 467                                                 "       cmpi.l          #140, %d0                               \n\t"\r
 468                                                 "       bne                     reg_test_2_error                \n\t"\r
 469                                                 "       move            %a6, %d0                                \n\t"\r
 470                                                 "       cmpi.l          #150, %d0                               \n\t"\r
 471                                                 "       bne                     reg_test_2_error                \n\t"\r
 472                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 473                                                 "       addql           #1, %d0                                 \n\t"\r
 474                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
 475                                                 "       bra                     reg_test_2_start                \n\t"\r
 476                                                 "reg_test_2_error:                                              \n\t"\r
 477                                                 "       bra                     reg_test_2_error                \n\t"\r
 478                                         );\r
 479 }\r
 480 /*-----------------------------------------------------------*/\r
 481 \r