2 * FreeRTOS Kernel V11.1.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in all
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17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
30 /*-----------------------------------------------------------
31 * Implementation of functions defined in portable.h for the ARM7 port.
33 * Components that can be compiled to either ARM or THUMB mode are
34 * contained in this file. The ISR routines, which can only be compiled
35 * to ARM mode are contained in portISR.c.
36 *----------------------------------------------------------*/
39 /* Standard includes. */
42 /* Scheduler includes. */
46 /* Constants required to setup the task context. */
47 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
48 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
49 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
50 #define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
52 /* Constants required to setup the tick ISR. */
53 #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
54 #define portPRESCALE_VALUE 0x00
55 #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
56 #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
58 /* Constants required to setup the VIC for the tick ISR. */
59 #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
60 #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
61 #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
63 /*-----------------------------------------------------------*/
65 /* Setup the timer to generate the tick interrupts. */
66 static void prvSetupTimerInterrupt( void );
69 * The scheduler can only be started from ARM mode, so
70 * vPortISRStartFirstSTask() is defined in portISR.c.
72 extern void vPortISRStartFirstTask( void );
74 /*-----------------------------------------------------------*/
77 * Initialise the stack of a task to look exactly as if a call to
78 * portSAVE_CONTEXT had been called.
80 * See header file for description.
82 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
83 TaskFunction_t pxCode,
86 StackType_t * pxOriginalTOS;
88 pxOriginalTOS = pxTopOfStack;
90 /* To ensure asserts in tasks.c don't fail, although in this case the assert
91 * is not really required. */
94 /* Setup the initial stack of the task. The stack is set exactly as
95 * expected by the portRESTORE_CONTEXT() macro. */
97 /* First on the stack is the return address - which in this case is the
98 * start of the task. The offset is added to make the return address appear
99 * as it would within an IRQ ISR. */
100 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
103 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
105 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
107 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
109 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
111 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
113 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
115 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
117 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
119 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
121 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
123 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
125 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
127 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
129 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
132 /* When the task starts is will expect to find the function parameter in
134 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
137 /* The last thing onto the stack is the status register, which is set for
138 * system mode, with interrupts enabled. */
139 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
141 if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
143 /* We want the task to start in thumb mode. */
144 *pxTopOfStack |= portTHUMB_MODE_BIT;
149 /* Some optimisation levels use the stack differently to others. This
150 * means the interrupt flags cannot always be stored on the stack and will
151 * instead be stored in a variable, which is then saved as part of the
153 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
157 /*-----------------------------------------------------------*/
159 BaseType_t xPortStartScheduler( void )
161 /* Start the timer that generates the tick ISR. Interrupts are disabled
163 prvSetupTimerInterrupt();
165 /* Start the first task. */
166 vPortISRStartFirstTask();
168 /* Should not get here! */
171 /*-----------------------------------------------------------*/
173 void vPortEndScheduler( void )
175 /* It is unlikely that the ARM port will require this function as there
176 * is nothing to return to. */
178 /*-----------------------------------------------------------*/
181 * Setup the timer 0 to generate the tick interrupts at the required frequency.
183 static void prvSetupTimerInterrupt( void )
185 uint32_t ulCompareMatch;
187 extern void( vTickISR )( void );
189 /* A 1ms tick does not require the use of the timer prescale. This is
190 * defaulted to zero but can be used if necessary. */
191 T0_PR = portPRESCALE_VALUE;
193 /* Calculate the match value required for our wanted tick rate. */
194 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
196 /* Protect against divide by zero. Using an if() statement still results
197 * in a warning - hence the #if. */
198 #if portPRESCALE_VALUE != 0
200 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
203 T0_MR0 = ulCompareMatch;
205 /* Generate tick with timer 0 compare match. */
206 T0_MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
208 /* Setup the VIC for the timer. */
209 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
210 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
212 /* The ISR installed depends on whether the preemptive or cooperative
213 * scheduler is being used. */
215 VICVectAddr0 = ( int32_t ) vTickISR;
216 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
218 /* Start the timer - interrupts are disabled when this function is called
219 * so it is okay to do this here. */
220 T0_TCR = portENABLE_TIMER;
222 /*-----------------------------------------------------------*/