2 * FreeRTOS Kernel V10.4.3
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22 * https://www.FreeRTOS.org
23 * https://github.com/FreeRTOS
28 /*-----------------------------------------------------------
29 * Implementation of functions defined in portable.h for the RXv3 DPFPU port.
30 *----------------------------------------------------------*/
32 #warning Testing for DFPU support in this port is not yet complete
34 /* Scheduler includes. */
38 /* Library includes. */
41 /* Hardware specifics. */
42 #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
46 #else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
50 #endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
52 /*-----------------------------------------------------------*/
54 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
55 * PSW is set with U and I set, and PM and IPL clear. */
56 #define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
57 #define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
58 #define portINITIAL_DPSW ( ( StackType_t ) 0x00000100 )
59 #define portINITIAL_DCMR ( ( StackType_t ) 0x00000000 )
60 #define portINITIAL_DECNT ( ( StackType_t ) 0x00000001 )
62 /* Tasks are not created with a DPFPU context, but can be given a DPFPU context
63 * after they have been created. A variable is stored as part of the tasks context
64 * that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
65 * any other value if the task does have a DPFPU context. */
66 #define portNO_DPFPU_CONTEXT ( ( StackType_t ) 0 )
67 #define portHAS_DPFPU_CONTEXT ( ( StackType_t ) 1 )
69 /* The space on the stack required to hold the DPFPU data registers. This is 16
70 * 64-bit registers. */
71 #define portDPFPU_DATA_REGISTER_WORDS ( 16 * 2 )
73 /*-----------------------------------------------------------*/
76 * Function to start the first task executing - written in asm code as direct
77 * access to registers is required.
79 static void prvStartFirstTask( void );
82 * Software interrupt handler. Performs the actual context switch (saving and
83 * restoring of registers). Written in asm code as direct register access is
86 __interrupt void vSoftwareInterruptISR( void );
89 * The tick ISR handler. The peripheral used is configured by the application
90 * via a hook/callback function.
92 __interrupt void vTickISR( void );
94 /*-----------------------------------------------------------*/
96 /* Saved as part of the task context. If ulPortTaskHasDPFPUContext is non-zero
97 * then a DPFPU context must be saved and restored for the task. */
98 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
100 StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
102 #endif /* configUSE_TASK_DPFPU_SUPPORT */
104 /* This is accessed by the inline assembler functions so is file scope for
106 extern void * pxCurrentTCB;
107 extern void vTaskSwitchContext( void );
109 /*-----------------------------------------------------------*/
112 * See header file for description.
114 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
115 TaskFunction_t pxCode,
116 void * pvParameters )
118 /* R0 is not included as it is the stack pointer. */
120 *pxTopOfStack = 0x00;
122 *pxTopOfStack = portINITIAL_PSW;
124 *pxTopOfStack = ( StackType_t ) pxCode;
126 /* When debugging it can be useful if every register is set to a known
127 * value. Otherwise code space can be saved by just setting the registers
128 * that need to be set. */
129 #ifdef USE_FULL_REGISTER_INITIALISATION
132 *pxTopOfStack = 0xffffffff; /* r15. */
134 *pxTopOfStack = 0xeeeeeeee;
136 *pxTopOfStack = 0xdddddddd;
138 *pxTopOfStack = 0xcccccccc;
140 *pxTopOfStack = 0xbbbbbbbb;
142 *pxTopOfStack = 0xaaaaaaaa;
144 *pxTopOfStack = 0x99999999;
146 *pxTopOfStack = 0x88888888;
148 *pxTopOfStack = 0x77777777;
150 *pxTopOfStack = 0x66666666;
152 *pxTopOfStack = 0x55555555;
154 *pxTopOfStack = 0x44444444;
156 *pxTopOfStack = 0x33333333;
158 *pxTopOfStack = 0x22222222;
161 #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
165 #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
167 *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
169 *pxTopOfStack = portINITIAL_FPSW;
171 *pxTopOfStack = 0x11111111; /* Accumulator 1. */
173 *pxTopOfStack = 0x22222222; /* Accumulator 1. */
175 *pxTopOfStack = 0x33333333; /* Accumulator 1. */
177 *pxTopOfStack = 0x44444444; /* Accumulator 0. */
179 *pxTopOfStack = 0x55555555; /* Accumulator 0. */
181 *pxTopOfStack = 0x66666666; /* Accumulator 0. */
183 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
185 /* The task will start without a DPFPU context. A task that
186 * uses the DPFPU hardware must call vPortTaskUsesDPFPU() before
187 * executing any floating point instructions. */
189 *pxTopOfStack = portNO_DPFPU_CONTEXT;
191 #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
193 /* The task will start with a DPFPU context. Leave enough
194 * space for the registers - and ensure they are initialised if desired. */
195 #ifdef USE_FULL_REGISTER_INITIALISATION
198 *(double *)pxTopOfStack = 1515.1515; /* DR15. */
200 *(double *)pxTopOfStack = 1414.1414; /* DR14. */
202 *(double *)pxTopOfStack = 1313.1313; /* DR13. */
204 *(double *)pxTopOfStack = 1212.1212; /* DR12. */
206 *(double *)pxTopOfStack = 1111.1111; /* DR11. */
208 *(double *)pxTopOfStack = 1010.1010; /* DR10. */
210 *(double *)pxTopOfStack = 909.0909; /* DR9. */
212 *(double *)pxTopOfStack = 808.0808; /* DR8. */
214 *(double *)pxTopOfStack = 707.0707; /* DR7. */
216 *(double *)pxTopOfStack = 606.0606; /* DR6. */
218 *(double *)pxTopOfStack = 505.0505; /* DR5. */
220 *(double *)pxTopOfStack = 404.0404; /* DR4. */
222 *(double *)pxTopOfStack = 303.0303; /* DR3. */
224 *(double *)pxTopOfStack = 202.0202; /* DR2. */
226 *(double *)pxTopOfStack = 101.0101; /* DR1. */
228 *(double *)pxTopOfStack = 9876.54321;/* DR0. */
230 #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
232 pxTopOfStack -= portDPFPU_DATA_REGISTER_WORDS;
233 memset( pxTopOfStack, 0x00, portDPFPU_DATA_REGISTER_WORDS * sizeof( StackType_t ) );
235 #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
237 *pxTopOfStack = portINITIAL_DECNT; /* DECNT. */
239 *pxTopOfStack = portINITIAL_DCMR; /* DCMR. */
241 *pxTopOfStack = portINITIAL_DPSW; /* DPSW. */
243 #elif ( configUSE_TASK_DPFPU_SUPPORT == 0 )
245 /* Omit DPFPU support. */
247 #else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
249 #error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
251 #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
255 /*-----------------------------------------------------------*/
257 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
259 void vPortTaskUsesDPFPU( void )
261 /* A task is registering the fact that it needs a DPFPU context. Set the
262 * DPFPU flag (which is saved as part of the task context). */
263 ulPortTaskHasDPFPUContext = portHAS_DPFPU_CONTEXT;
266 #endif /* configUSE_TASK_DPFPU_SUPPORT */
267 /*-----------------------------------------------------------*/
269 BaseType_t xPortStartScheduler( void )
271 extern void vApplicationSetupTimerInterrupt( void );
273 /* Use pxCurrentTCB just so it does not get optimised away. */
274 if( pxCurrentTCB != NULL )
276 /* Call an application function to set up the timer that will generate the
277 * tick interrupt. This way the application can decide which peripheral to
278 * use. A demo application is provided to show a suitable example. */
279 vApplicationSetupTimerInterrupt();
281 /* Enable the software interrupt. */
282 _IEN( _ICU_SWINT ) = 1;
284 /* Ensure the software interrupt is clear. */
285 _IR( _ICU_SWINT ) = 0;
287 /* Ensure the software interrupt is set to the kernel priority. */
288 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
290 /* Start the first task. */
294 /* Should not get here. */
297 /*-----------------------------------------------------------*/
299 void vPortEndScheduler( void )
301 /* Not implemented in ports where there is nothing to return to.
302 * Artificially force an assert. */
303 configASSERT( pxCurrentTCB == NULL );
305 /* The following line is just to prevent the symbol getting optimised away. */
306 ( void ) vTaskSwitchContext();
308 /*-----------------------------------------------------------*/
310 static void prvStartFirstTask( void )
315 /* When starting the scheduler there is nothing that needs moving to the
316 * interrupt stack because the function is not called from an interrupt.
317 * Just ensure the current stack is the user stack. */
321 /* Obtain the location of the stack associated with which ever task
322 * pxCurrentTCB is currently pointing to. */
323 "MOV.L #_pxCurrentTCB, R15 \n"\
324 "MOV.L [R15], R15 \n"\
325 "MOV.L [R15], R0 \n"\
328 /* Restore the registers from the stack of the task pointed to by
331 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
333 /* The restored ulPortTaskHasDPFPUContext is to be zero here.
334 * So, it is never necessary to restore the DPFPU context here. */
336 "MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\
337 "MOV.L R15, [R14] \n"\
339 #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
341 /* Restore the DPFPU context. */
342 "DPOPM.L DPSW-DECNT \n"\
343 "DPOPM.D DR0-DR15 \n"\
345 #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
349 /* Accumulator low 32 bits. */
350 "MVTACLO R15, A0 \n"\
353 /* Accumulator high 32 bits. */
354 "MVTACHI R15, A0 \n"\
357 /* Accumulator guard. */
358 "MVTACGU R15, A0 \n"\
361 /* Accumulator low 32 bits. */
362 "MVTACLO R15, A1 \n"\
365 /* Accumulator high 32 bits. */
366 "MVTACHI R15, A1 \n"\
369 /* Accumulator guard. */
370 "MVTACGU R15, A1 \n"\
373 /* Floating point status word. */
376 /* R1 to R15 - R0 is not included as it is the SP. */
379 /* This pops the remaining registers. */
385 /*-----------------------------------------------------------*/
387 #pragma vector = VECT( ICU, SWINT )
388 __interrupt void vSoftwareInterruptISR( void )
392 /* Re-enable interrupts. */
396 /* Move the data that was automatically pushed onto the interrupt stack when
397 * the interrupt occurred from the interrupt stack to the user stack.
399 * R15 is saved before it is clobbered. */
402 /* Read the user stack pointer. */
405 /* Move the address down to the data being moved. */
409 /* Copy the data across, R15, then PC, then PSW. */
410 "MOV.L [ R0 ], [ R15 ] \n"\
411 "MOV.L 4[ R0 ], 4[ R15 ] \n"\
412 "MOV.L 8[ R0 ], 8[ R15 ] \n"\
414 /* Move the interrupt stack pointer to its new correct position. */
417 /* All the rest of the registers are saved directly to the user stack. */
420 /* Save the rest of the general registers (R15 has been saved already). */
423 /* Save the FPSW and accumulators. */
426 "MVFACGU #0, A1, R15 \n"\
428 "MVFACHI #0, A1, R15 \n"\
430 "MVFACLO #0, A1, R15 \n" /* Low order word. */ \
432 "MVFACGU #0, A0, R15 \n"\
434 "MVFACHI #0, A0, R15 \n"\
436 "MVFACLO #0, A0, R15 \n" /* Low order word. */ \
439 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
441 /* Does the task have a DPFPU context that needs saving? If
442 * ulPortTaskHasDPFPUContext is 0 then no. */
443 "MOV.L #_ulPortTaskHasDPFPUContext, R15 \n"\
444 "MOV.L [R15], R15 \n"\
447 /* Save the DPFPU context, if any. */
449 "DPUSHM.D DR0-DR15 \n"\
450 "DPUSHM.L DPSW-DECNT \n"\
453 /* Save ulPortTaskHasDPFPUContext itself. */
456 #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
458 /* Save the DPFPU context, always. */
459 "DPUSHM.D DR0-DR15 \n"\
460 "DPUSHM.L DPSW-DECNT \n"\
462 #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
465 /* Save the stack pointer to the TCB. */
466 "MOV.L #_pxCurrentTCB, R15 \n"\
467 "MOV.L [ R15 ], R15 \n"\
468 "MOV.L R0, [ R15 ] \n"\
471 /* Ensure the interrupt mask is set to the syscall priority while the kernel
472 * structures are being accessed. */
475 /* Select the next task to run. */
476 "BSR.A _vTaskSwitchContext \n"\
478 /* Reset the interrupt mask as no more data structure access is required. */
482 /* Load the stack pointer of the task that is now selected as the Running
483 * state task from its TCB. */
484 "MOV.L #_pxCurrentTCB,R15 \n"\
485 "MOV.L [ R15 ], R15 \n"\
486 "MOV.L [ R15 ], R0 \n"\
489 /* Restore the context of the new task. The PSW (Program Status Word) and
490 * PC will be popped by the RTE instruction. */
492 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
494 /* Is there a DPFPU context to restore? If the restored
495 * ulPortTaskHasDPFPUContext is zero then no. */
497 "MOV.L #_ulPortTaskHasDPFPUContext, R14 \n"\
498 "MOV.L R15, [R14] \n"\
501 /* Restore the DPFPU context, if any. */
503 "DPOPM.L DPSW-DECNT \n"\
504 "DPOPM.D DR0-DR15 \n"\
507 #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
509 /* Restore the DPFPU context, always. */
510 "DPOPM.L DPSW-DECNT \n"\
511 "DPOPM.D DR0-DR15 \n"\
513 #endif /* if( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
517 /* Accumulator low 32 bits. */
518 "MVTACLO R15, A0 \n"\
521 /* Accumulator high 32 bits. */
522 "MVTACHI R15, A0 \n"\
525 /* Accumulator guard. */
526 "MVTACGU R15, A0 \n"\
529 /* Accumulator low 32 bits. */
530 "MVTACLO R15, A1 \n"\
533 /* Accumulator high 32 bits. */
534 "MVTACHI R15, A1 \n"\
537 /* Accumulator guard. */
538 "MVTACGU R15, A1 \n"\
545 portCDT_NO_PARSE( :: ) "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY )
548 /*-----------------------------------------------------------*/
550 #pragma vector = _VECT( configTICK_VECTOR )
551 __interrupt void vTickISR( void )
553 /* Re-enable interrupts. */
554 __enable_interrupt();
556 /* Increment the tick, and perform any processing the new tick value
557 * necessitates. Ensure IPL is at the max syscall value first. */
558 __set_interrupt_level( configMAX_SYSCALL_INTERRUPT_PRIORITY );
560 if( xTaskIncrementTick() != pdFALSE )
565 __set_interrupt_level( configKERNEL_INTERRUPT_PRIORITY );
567 /*-----------------------------------------------------------*/