2 FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify it under
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7 the terms of the GNU General Public License (version 2) as published by the
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8 Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS without being obliged to provide the
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11 source code for proprietary components outside of the FreeRTOS kernel.
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12 Alternative commercial license and support terms are also available upon
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13 request. See the licensing section of http://www.FreeRTOS.org for full
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16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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21 You should have received a copy of the GNU General Public License along
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22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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26 ***************************************************************************
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28 * Looking for a quick start? Then check out the FreeRTOS eBook! *
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29 * See http://www.FreeRTOS.org/Documentation for details *
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31 ***************************************************************************
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35 Please ensure to read the configuration and relevant port sections of the
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36 online documentation.
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38 http://www.FreeRTOS.org - Documentation, latest information, license and
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41 http://www.SafeRTOS.com - A version that is certified for use in safety
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44 http://www.OpenRTOS.com - Commercial support, development, porting,
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45 licensing and training services.
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48 /*-----------------------------------------------------------
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49 * Implementation of functions defined in portable.h for the Cygnal port.
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50 *----------------------------------------------------------*/
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52 /* Standard includes. */
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55 /* Scheduler includes. */
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56 #include "FreeRTOS.h"
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59 /* Constants required to setup timer 2 to produce the RTOS tick. */
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60 #define portCLOCK_DIVISOR ( ( unsigned portLONG ) 12 )
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61 #define portMAX_TIMER_VALUE ( ( unsigned portLONG ) 0xffff )
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62 #define portENABLE_TIMER ( ( unsigned portCHAR ) 0x04 )
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63 #define portTIMER_2_INTERRUPT_ENABLE ( ( unsigned portCHAR ) 0x20 )
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65 /* The value used in the IE register when a task first starts. */
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66 #define portGLOBAL_INTERRUPT_BIT ( ( portSTACK_TYPE ) 0x80 )
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68 /* The value used in the PSW register when a task first starts. */
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69 #define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00 )
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71 /* Macro to clear the timer 2 interrupt flag. */
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72 #define portCLEAR_INTERRUPT_FLAG() TMR2CN &= ~0x80;
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74 /* Used during a context switch to store the size of the stack being copied
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76 data static unsigned portCHAR ucStackBytes;
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78 /* Used during a context switch to point to the next byte in XRAM from/to which
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79 a RAM byte is to be copied. */
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80 xdata static portSTACK_TYPE * data pxXRAMStack;
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82 /* Used during a context switch to point to the next byte in RAM from/to which
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83 an XRAM byte is to be copied. */
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84 data static portSTACK_TYPE * data pxRAMStack;
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86 /* We require the address of the pxCurrentTCB variable, but don't want to know
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87 any details of its type. */
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88 typedef void tskTCB;
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89 extern volatile tskTCB * volatile pxCurrentTCB;
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92 * Setup the hardware to generate an interrupt off timer 2 at the required
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95 static void prvSetupTimerInterrupt( void );
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97 /*-----------------------------------------------------------*/
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99 * Macro that copies the current stack from internal RAM to XRAM. This is
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100 * required as the 8051 only contains enough internal RAM for a single stack,
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101 * but we have a stack for every task.
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103 #define portCOPY_STACK_TO_XRAM() \
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105 /* pxCurrentTCB points to a TCB which itself points to the location into \
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106 which the first stack byte should be copied. Set pxXRAMStack to point \
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107 to the location into which the first stack byte is to be copied. */ \
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108 pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \
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110 /* Set pxRAMStack to point to the first byte to be coped from the stack. */ \
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111 pxRAMStack = ( data portSTACK_TYPE * data ) configSTACK_START; \
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113 /* Calculate the size of the stack we are about to copy from the current \
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114 stack pointer value. */ \
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115 ucStackBytes = SP - ( configSTACK_START - 1 ); \
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117 /* Before starting to copy the stack, store the calculated stack size so \
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118 the stack can be restored when the task is resumed. */ \
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119 *pxXRAMStack = ucStackBytes; \
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121 /* Copy each stack byte in turn. pxXRAMStack is incremented first as we \
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122 have already stored the stack size into XRAM. */ \
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123 while( ucStackBytes ) \
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126 *pxXRAMStack = *pxRAMStack; \
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131 /*-----------------------------------------------------------*/
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134 * Macro that copies the stack of the task being resumed from XRAM into
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137 #define portCOPY_XRAM_TO_STACK() \
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139 /* Setup the pointers as per portCOPY_STACK_TO_XRAM(), but this time to \
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140 copy the data back out of XRAM and into the stack. */ \
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141 pxXRAMStack = ( xdata portSTACK_TYPE * ) *( ( xdata portSTACK_TYPE ** ) pxCurrentTCB ); \
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142 pxRAMStack = ( data portSTACK_TYPE * data ) ( configSTACK_START - 1 ); \
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144 /* The first value stored in XRAM was the size of the stack - i.e. the \
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145 number of bytes we need to copy back. */ \
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146 ucStackBytes = pxXRAMStack[ 0 ]; \
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148 /* Copy the required number of bytes back into the stack. */ \
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153 *pxRAMStack = *pxXRAMStack; \
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155 } while( ucStackBytes ); \
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157 /* Restore the stack pointer ready to use the restored stack. */ \
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158 SP = ( unsigned portCHAR ) pxRAMStack; \
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160 /*-----------------------------------------------------------*/
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163 * Macro to push the current execution context onto the stack, before the stack
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164 * is moved to XRAM.
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166 #define portSAVE_CONTEXT() \
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169 /* Push ACC first, as when restoring the context it must be restored \
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170 last (it is used to set the IE register). */ \
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172 /* Store the IE register then disable interrupts. */ \
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193 /*-----------------------------------------------------------*/
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196 * Macro that restores the execution context from the stack. The execution
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197 * context was saved into the stack before the stack was copied into XRAM.
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199 #define portRESTORE_CONTEXT() \
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215 /* The next byte of the stack is the IE register. Only the global \
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216 enable bit forms part of the task context. Pop off the IE then set \
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217 the global enable bit to match that of the stored IE register. */ \
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225 /* Finally pop off the ACC, which was the first register saved. */ \
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230 /*-----------------------------------------------------------*/
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233 * See header file for description.
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235 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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237 unsigned portLONG ulAddress;
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238 portSTACK_TYPE *pxStartOfStack;
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240 /* Leave space to write the size of the stack as the first byte. */
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241 pxStartOfStack = pxTopOfStack;
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244 /* Place a few bytes of known values on the bottom of the stack.
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245 This is just useful for debugging and can be uncommented if required.
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246 *pxTopOfStack = 0x11;
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248 *pxTopOfStack = 0x22;
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250 *pxTopOfStack = 0x33;
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254 /* Simulate how the stack would look after a call to the scheduler tick
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257 The return address that would have been pushed by the MCU. */
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258 ulAddress = ( unsigned portLONG ) pxCode;
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259 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress;
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262 *pxTopOfStack = ( portSTACK_TYPE ) ( ulAddress );
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265 /* Next all the registers will have been pushed by portSAVE_CONTEXT(). */
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266 *pxTopOfStack = 0xaa; /* acc */
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269 /* We want tasks to start with interrupts enabled. */
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270 *pxTopOfStack = portGLOBAL_INTERRUPT_BIT;
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273 /* The function parameters will be passed in the DPTR and B register as
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274 a three byte generic pointer is used. */
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275 ulAddress = ( unsigned portLONG ) pvParameters;
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276 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPL */
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279 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* DPH */
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282 *pxTopOfStack = ( portSTACK_TYPE ) ulAddress; /* b */
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285 /* The remaining registers are straight forward. */
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286 *pxTopOfStack = 0x02; /* R2 */
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288 *pxTopOfStack = 0x03; /* R3 */
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290 *pxTopOfStack = 0x04; /* R4 */
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292 *pxTopOfStack = 0x05; /* R5 */
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294 *pxTopOfStack = 0x06; /* R6 */
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296 *pxTopOfStack = 0x07; /* R7 */
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298 *pxTopOfStack = 0x00; /* R0 */
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300 *pxTopOfStack = 0x01; /* R1 */
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302 *pxTopOfStack = 0x00; /* PSW */
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304 *pxTopOfStack = 0xbb; /* BP */
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306 /* Dont increment the stack size here as we don't want to include
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307 the stack size byte as part of the stack size count.
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309 Finally we place the stack size at the beginning. */
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310 *pxStartOfStack = ( portSTACK_TYPE ) ( pxTopOfStack - pxStartOfStack );
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312 /* Unlike most ports, we return the start of the stack as this is where the
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313 size of the stack is stored. */
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314 return pxStartOfStack;
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316 /*-----------------------------------------------------------*/
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319 * See header file for description.
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321 portBASE_TYPE xPortStartScheduler( void )
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323 /* Setup timer 2 to generate the RTOS tick. */
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324 prvSetupTimerInterrupt();
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326 /* Make sure we start with the expected SFR page. This line should not
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327 really be required. */
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330 /* Copy the stack for the first task to execute from XRAM into the stack,
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331 restore the task context from the new stack, then start running the task. */
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332 portCOPY_XRAM_TO_STACK();
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333 portRESTORE_CONTEXT();
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335 /* Should never get here! */
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338 /*-----------------------------------------------------------*/
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340 void vPortEndScheduler( void )
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342 /* Not implemented for this port. */
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344 /*-----------------------------------------------------------*/
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347 * Manual context switch. The first thing we do is save the registers so we
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348 * can use a naked attribute.
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350 void vPortYield( void ) _naked
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352 /* Save the execution context onto the stack, then copy the entire stack
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353 to XRAM. This is necessary as the internal RAM is only large enough to
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354 hold one stack, and we want one per task.
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356 PERFORMANCE COULD BE IMPROVED BY ONLY COPYING TO XRAM IF A TASK SWITCH
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358 portSAVE_CONTEXT();
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359 portCOPY_STACK_TO_XRAM();
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361 /* Call the standard scheduler context switch function. */
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362 vTaskSwitchContext();
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364 /* Copy the stack of the task about to execute from XRAM into RAM and
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365 restore it's context ready to run on exiting. */
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366 portCOPY_XRAM_TO_STACK();
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367 portRESTORE_CONTEXT();
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369 /*-----------------------------------------------------------*/
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371 #if configUSE_PREEMPTION == 1
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372 void vTimer2ISR( void ) interrupt 5 _naked
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374 /* Preemptive context switch function triggered by the timer 2 ISR.
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375 This does the same as vPortYield() (see above) with the addition
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376 of incrementing the RTOS tick count. */
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378 portSAVE_CONTEXT();
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379 portCOPY_STACK_TO_XRAM();
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381 vTaskIncrementTick();
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382 vTaskSwitchContext();
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384 portCLEAR_INTERRUPT_FLAG();
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385 portCOPY_XRAM_TO_STACK();
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386 portRESTORE_CONTEXT();
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389 void vTimer2ISR( void ) interrupt 5
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391 /* When using the cooperative scheduler the timer 2 ISR is only
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392 required to increment the RTOS tick count. */
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394 vTaskIncrementTick();
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395 portCLEAR_INTERRUPT_FLAG();
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398 /*-----------------------------------------------------------*/
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400 static void prvSetupTimerInterrupt( void )
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402 unsigned portCHAR ucOriginalSFRPage;
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404 /* Constants calculated to give the required timer capture values. */
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405 const unsigned portLONG ulTicksPerSecond = configCPU_CLOCK_HZ / portCLOCK_DIVISOR;
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406 const unsigned portLONG ulCaptureTime = ulTicksPerSecond / configTICK_RATE_HZ;
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407 const unsigned portLONG ulCaptureValue = portMAX_TIMER_VALUE - ulCaptureTime;
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408 const unsigned portCHAR ucLowCaptureByte = ( unsigned portCHAR ) ( ulCaptureValue & ( unsigned portLONG ) 0xff );
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409 const unsigned portCHAR ucHighCaptureByte = ( unsigned portCHAR ) ( ulCaptureValue >> ( unsigned portLONG ) 8 );
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411 /* NOTE: This uses a timer only present on 8052 architecture. */
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413 /* Remember the current SFR page so we can restore it at the end of the
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415 ucOriginalSFRPage = SFRPAGE;
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418 /* TMR2CF can be left in its default state. */
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419 TMR2CF = ( unsigned portCHAR ) 0;
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421 /* Setup the overflow reload value. */
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422 RCAP2L = ucLowCaptureByte;
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423 RCAP2H = ucHighCaptureByte;
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425 /* The initial load is performed manually. */
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426 TMR2L = ucLowCaptureByte;
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427 TMR2H = ucHighCaptureByte;
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429 /* Enable the timer 2 interrupts. */
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430 IE |= portTIMER_2_INTERRUPT_ENABLE;
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432 /* Interrupts are disabled when this is called so the timer can be started
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434 TMR2CN = portENABLE_TIMER;
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436 /* Restore the original SFR page. */
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437 SFRPAGE = ucOriginalSFRPage;
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