2 ; * FreeRTOS SMP Kernel V202110.00
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25 ; * 1 tab == 4 spaces!
30 .extern vTaskSwitchContext
31 .extern ulMaxSyscallInterruptPriorityConst
34 .global _lc_ref__vector_pp_14
36 .global vPortStartFirstTask
37 .global vPortEnableVFP
38 .global ulPortSetInterruptMask
39 .global vPortClearInterruptMask
41 ;-----------------------------------------------------------
46 _vector_14: .type func
51 ;Get the location of the current TCB.
52 ldr.w r3, =pxCurrentTCB
55 ;Is the task using the FPU context? If so, push high vfp registers.
58 vstmdbeq r0!, {s16-s31}
60 ;Save the core registers.
61 stmdb r0!, {r4-r11, r14}
63 ;Save the new top of stack into the first member of the TCB.
67 ldr.w r0, =ulMaxSyscallInterruptPriorityConst
75 ;The first item in pxCurrentTCB is the task top of stack.
79 ;Pop the core registers.
80 ldmia r0!, {r4-r11, r14}
82 ;Is the task using the FPU context? If so, pop the high vfp registers too.
85 vldmiaeq r0!, {s16-s31}
91 .size _vector_14, $-_vector_14
94 ;-----------------------------------------------------------
96 ; This function is an XMC4000 silicon errata workaround. It will get used when
97 ; the SILICON_BUG_PMC_CM_001 linker macro is defined.
101 _lc_ref__vector_pp_14: .type func
106 ;Get the location of the current TCB.
107 ldr.w r3, =pxCurrentTCB
110 ;Is the task using the FPU context? If so, push high vfp registers.
113 vstmdbeq r0!, {s16-s31}
115 ;Save the core registers.
116 stmdb r0!, {r4-r11, r14}
118 ;Save the new top of stack into the first member of the TCB.
122 ldr.w r0, =ulMaxSyscallInterruptPriorityConst
125 bl vTaskSwitchContext
130 ;The first item in pxCurrentTCB is the task top of stack.
134 ;Pop the core registers.
135 ldmia r0!, {r4-r11, r14}
137 ;Is the task using the FPU context? If so, pop the high vfp registers too.
140 vldmiaeq r0!, {s16-s31}
145 pop { pc } ; XMC4000 specific errata workaround. Do not used "bx lr" here.
147 .size _lc_ref__vector_pp_14, $-_lc_ref__vector_pp_14
150 ;-----------------------------------------------------------
155 SVC_Handler: .type func
156 ;Get the location of the current TCB.
157 ldr.w r3, =pxCurrentTCB
160 ;Pop the core registers.
161 ldmia r0!, {r4-r11, r14}
167 .size SVC_Handler, $-SVC_Handler
170 ;-----------------------------------------------------------
175 vPortStartFirstTask .type func
176 ;Use the NVIC offset register to locate the stack.
177 ldr.w r0, =0xE000ED08
180 ;Set the msp back to the start of the stack.
182 ;Call SVC to start the first task.
188 .size vPortStartFirstTask, $-vPortStartFirstTask
191 ;-----------------------------------------------------------
196 vPortEnableVFP .type func
197 ;The FPU enable bits are in the CPACR.
198 ldr.w r0, =0xE000ED88
201 ;Enable CP10 and CP11 coprocessors, then save back.
202 orr r1, r1, #( 0xf << 20 )
205 .size vPortEnableVFP, $-vPortEnableVFP
208 ;-----------------------------------------------------------
213 ulPortSetInterruptMask:
215 ldr.w r1, =ulMaxSyscallInterruptPriorityConst
219 .size ulPortSetInterruptMask, $-ulPortSetInterruptMask
222 ;-----------------------------------------------------------
227 vPortClearInterruptMask:
230 .size vPortClearInterruptMask, $-vPortClearInterruptMask
233 ;-----------------------------------------------------------