begriffs open source - freertos/blob - portable/GCC/ARM

1 /*

2 * FreeRTOS SMP Kernel V202110.00

4 *

5 * Permission is hereby granted, free of charge, to any person obtaining a copy of

6 * this software and associated documentation files (the "Software"), to deal in

7 * the Software without restriction, including without limitation the rights to

8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of

9 * the Software, and to permit persons to whom the Software is furnished to do so,

10 * subject to the following conditions:

11 *

12 * The above copyright notice and this permission notice shall be included in all

13 * copies or substantial portions of the Software.

14 *

15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS

17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR

18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER

19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

21 *

22 * https://www.FreeRTOS.org

23 * https://github.com/FreeRTOS

24 *

25 * 1 tab == 4 spaces!

26 */

27

28 #ifndef PORTMACRO_H

29 #define PORTMACRO_H

30

31 #ifdef __cplusplus

32 extern "C" {

33 #endif

34

35 /*-----------------------------------------------------------

36 * Port specific definitions.

37 *

38 * The settings in this file configure FreeRTOS correctly for the given hardware

39 * and compiler.

40 *

41 * These settings should not be altered.

42 *-----------------------------------------------------------

43 */

44

45 /* Type definitions. */

46 #define portCHAR char

47 #define portFLOAT float

48 #define portDOUBLE double

49 #define portLONG long

50 #define portSHORT short

51 #define portSTACK_TYPE uint32_t

52 #define portBASE_TYPE long

53

54 typedef portSTACK_TYPE StackType_t;

55 typedef long BaseType_t;

56 typedef unsigned long UBaseType_t;

57

58 typedef uint32_t TickType_t;

59 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL

60

61 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do

62 not need to be guarded with a critical section. */

63 #define portTICK_TYPE_IS_ATOMIC 1

64

65 /*-----------------------------------------------------------*/

66

67 /* Hardware specifics. */

68 #define portSTACK_GROWTH ( -1 )

69 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )

70 #define portBYTE_ALIGNMENT 8

71

72 /*-----------------------------------------------------------*/

73

74 /* Task utilities. */

75

76 /* Called at the end of an ISR that can cause a context switch. */

77 #define portEND_SWITCHING_ISR( xSwitchRequired )\

78 { \

79 extern uint32_t ulPortYieldRequired; \

80 \

81 if( xSwitchRequired != pdFALSE ) \

82 { \

83 ulPortYieldRequired = pdTRUE; \

84 } \

85 }

86

87 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )

88 #define portYIELD() __asm volatile ( "SWI 0" ::: "memory" );

89

90

91 /*-----------------------------------------------------------

92 * Critical section control

93 *----------------------------------------------------------*/

94

95 extern void vPortEnterCritical( void );

96 extern void vPortExitCritical( void );

97 extern uint32_t ulPortSetInterruptMask( void );

98 extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );

99 extern void vPortInstallFreeRTOSVectorTable( void );

100

101 /* These macros do not globally disable/enable interrupts. They do mask off

102 interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */

103 #define portENTER_CRITICAL() vPortEnterCritical();

104 #define portEXIT_CRITICAL() vPortExitCritical();

105 #define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()

106 #define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )

107 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()

108 #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)

109

110 /*-----------------------------------------------------------*/

111

112 /* Task function macros as described on the FreeRTOS.org WEB site. These are

113 not required for this port but included in case common demo code that uses these

114 macros is used. */

115 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )

116 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )

117

118 /* Prototype of the FreeRTOS tick handler. This must be installed as the

119 handler for whichever peripheral is used to generate the RTOS tick. */

120 void FreeRTOS_Tick_Handler( void );

121

122 /* If configUSE_TASK_FPU_SUPPORT is set to 1 (or left undefined) then tasks are

123 created without an FPU context and must call vPortTaskUsesFPU() to give

124 themselves an FPU context before using any FPU instructions. If

125 configUSE_TASK_FPU_SUPPORT is set to 2 then all tasks will have an FPU context

126 by default. */

127 #if( configUSE_TASK_FPU_SUPPORT != 2 )

128 void vPortTaskUsesFPU( void );

129 #else

130 /* Each task has an FPU context already, so define this function away to

131 nothing to prevent it being called accidentally. */

132 #define vPortTaskUsesFPU()

133 #endif

134 #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()

135

136 #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )

137 #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )

138

139 /* Architecture specific optimisations. */

140 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION

141 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1

142 #endif

143

144 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1

145

146 /* Store/clear the ready priorities in a bit map. */

147 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )

148 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )

149

150 /*-----------------------------------------------------------*/

151

152 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )

153

154 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */

155

156 #ifdef configASSERT

157 void vPortValidateInterruptPriority( void );

158 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()

159 #endif /* configASSERT */

160

161 #define portNOP() __asm volatile( "NOP" )

162 #define portINLINE __inline

163

164 #ifdef __cplusplus

165 } /* extern C */

166 #endif

167

168

169 /* The number of bits to shift for an interrupt priority is dependent on the

170 number of bits implemented by the interrupt controller. */

171 #if configUNIQUE_INTERRUPT_PRIORITIES == 16

172 #define portPRIORITY_SHIFT 4

173 #define portMAX_BINARY_POINT_VALUE 3

174 #elif configUNIQUE_INTERRUPT_PRIORITIES == 32

175 #define portPRIORITY_SHIFT 3

176 #define portMAX_BINARY_POINT_VALUE 2

177 #elif configUNIQUE_INTERRUPT_PRIORITIES == 64

178 #define portPRIORITY_SHIFT 2

179 #define portMAX_BINARY_POINT_VALUE 1

180 #elif configUNIQUE_INTERRUPT_PRIORITIES == 128

181 #define portPRIORITY_SHIFT 1

182 #define portMAX_BINARY_POINT_VALUE 0

183 #elif configUNIQUE_INTERRUPT_PRIORITIES == 256

184 #define portPRIORITY_SHIFT 0

185 #define portMAX_BINARY_POINT_VALUE 0

186 #else

187 #error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware

188 #endif

189

190 /* Interrupt controller access addresses. */

191 #define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )

192 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )

193 #define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )

194 #define portICCBPR_BINARY_POINT_OFFSET ( 0x08 )

195 #define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )

196

197 #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )

198 #define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )

199 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )

200 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )

201 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )

202 #define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )

203 #define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )

204

205 #define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )

206

207 #endif /* PORTMACRO_H */

208