begriffs open source - freertos/blob - portable/GCC/ARM

1 /*

2 * FreeRTOS SMP Kernel V202110.00

4 *

5 * Permission is hereby granted, free of charge, to any person obtaining a copy of

6 * this software and associated documentation files (the "Software"), to deal in

7 * the Software without restriction, including without limitation the rights to

8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of

9 * the Software, and to permit persons to whom the Software is furnished to do so,

10 * subject to the following conditions:

11 *

12 * The above copyright notice and this permission notice shall be included in all

13 * copies or substantial portions of the Software.

14 *

15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS

17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR

18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER

19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

21 *

22 * https://www.FreeRTOS.org

23 * https://github.com/FreeRTOS

24 *

25 * 1 tab == 4 spaces!

26 */

27

28 #ifndef PORTMACRO_H

29 #define PORTMACRO_H

30

31 #ifdef __cplusplus

32 extern "C" {

33 #endif

34

35 /*-----------------------------------------------------------

36 * Port specific definitions.

37 *

38 * The settings in this file configure FreeRTOS correctly for the given hardware

39 * and compiler.

40 *

41 * These settings should not be altered.

42 *-----------------------------------------------------------

43 */

44

45 /* Type definitions. */

46 #define portCHAR char

47 #define portFLOAT float

48 #define portDOUBLE double

49 #define portLONG long

50 #define portSHORT short

51 #define portSTACK_TYPE uint32_t

52 #define portBASE_TYPE long

53

54 typedef portSTACK_TYPE StackType_t;

55 typedef long BaseType_t;

56 typedef unsigned long UBaseType_t;

57

58 typedef uint32_t TickType_t;

59 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL

60

61 /*-----------------------------------------------------------*/

62

63 /* Hardware specifics. */

64 #define portSTACK_GROWTH ( -1 )

65 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )

66 #define portBYTE_ALIGNMENT 8

67

68 /*-----------------------------------------------------------*/

69

70 /* Task utilities. */

71

72 /* Called at the end of an ISR that can cause a context switch. */

73 #define portEND_SWITCHING_ISR( xSwitchRequired ) \

74 { \

75 extern uint32_t ulPortYieldRequired; \

76 \

77 if( xSwitchRequired != pdFALSE ) \

78 { \

79 ulPortYieldRequired = pdTRUE; \

80 } \

81 }

82

83 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )

84 #define portYIELD() __asm volatile ( "SWI 0" ::: "memory" );

85

86

87 /*-----------------------------------------------------------

88 * Critical section control

89 *----------------------------------------------------------*/

90

91 extern void vPortEnterCritical( void );

92 extern void vPortExitCritical( void );

93 extern uint32_t ulPortSetInterruptMask( void );

94 extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );

95 extern void vPortInstallFreeRTOSVectorTable( void );

96

97 /* These macros do not globally disable/enable interrupts. They do mask off

98 * interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */

99 #define portENTER_CRITICAL() vPortEnterCritical();

100 #define portEXIT_CRITICAL() vPortExitCritical();

101 #define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()

102 #define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )

103 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()

104 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x )

105

106 /*-----------------------------------------------------------*/

107

108 /* Task function macros as described on the FreeRTOS.org WEB site. These are

109 * not required for this port but included in case common demo code that uses these

110 * macros is used. */

111 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )

112 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )

113

114 /* Prototype of the FreeRTOS tick handler. This must be installed as the

115 * handler for whichever peripheral is used to generate the RTOS tick. */

116 void FreeRTOS_Tick_Handler( void );

117

118 /* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()

119 * before any floating point instructions are executed. */

120 void vPortTaskUsesFPU( void );

121 #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()

122

123 #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )

124 #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )

125

126 /* Architecture specific optimisations. */

127 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION

128 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1

129 #endif

130

131 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1

132

133 /* Store/clear the ready priorities in a bit map. */

134 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )

135 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )

136

137 /*-----------------------------------------------------------*/

138

139 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) )

140

141 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */

142

143 #ifdef configASSERT

144 void vPortValidateInterruptPriority( void );

145 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()

146 #endif /* configASSERT */

147

148 #define portNOP() __asm volatile ( "NOP" )

149

150

151 #ifdef __cplusplus

152 } /* extern C */

153 #endif

154

155

156 /* The number of bits to shift for an interrupt priority is dependent on the

157 * number of bits implemented by the interrupt controller. */

158 #if configUNIQUE_INTERRUPT_PRIORITIES == 16

159 #define portPRIORITY_SHIFT 4

160 #define portMAX_BINARY_POINT_VALUE 3

161 #elif configUNIQUE_INTERRUPT_PRIORITIES == 32

162 #define portPRIORITY_SHIFT 3

163 #define portMAX_BINARY_POINT_VALUE 2

164 #elif configUNIQUE_INTERRUPT_PRIORITIES == 64

165 #define portPRIORITY_SHIFT 2

166 #define portMAX_BINARY_POINT_VALUE 1

167 #elif configUNIQUE_INTERRUPT_PRIORITIES == 128

168 #define portPRIORITY_SHIFT 1

169 #define portMAX_BINARY_POINT_VALUE 0

170 #elif configUNIQUE_INTERRUPT_PRIORITIES == 256

171 #define portPRIORITY_SHIFT 0

172 #define portMAX_BINARY_POINT_VALUE 0

173 #else /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */

174 #error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware

175 #endif /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */

176

177 /* Interrupt controller access addresses. */

178 #define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )

179 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )

180 #define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )

181 #define portICCBPR_BINARY_POINT_OFFSET ( 0x08 )

182 #define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )

183

184 #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )

185 #define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )

186 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )

187 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )

188 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )

189 #define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )

190 #define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )

191

192 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )

193

194 #endif /* PORTMACRO_H */