]> begriffs open source - freertos/log
freertos
3 years agoREADME.md: Remove coroutine references.
Paul Bartell [Tue, 22 Nov 2022 19:04:02 +0000 (11:04 -0800)]
README.md: Remove coroutine references.

3 years agoCMakeLists.txt: Remove croutine.c from CMakeLists.txt
Paul Bartell [Tue, 22 Nov 2022 19:03:24 +0000 (11:03 -0800)]
CMakeLists.txt: Remove croutine.c from CMakeLists.txt
CMakeLists.txt: Remove croutine.c

3 years agoRemove coroutine terms from lexicon
Paul Bartell [Tue, 22 Nov 2022 19:03:05 +0000 (11:03 -0800)]
Remove coroutine terms from lexicon

3 years agoRemove coroutines from FreeRTOS-Kernel.
Paul Bartell [Wed, 7 Apr 2021 17:48:05 +0000 (10:48 -0700)]
Remove coroutines from FreeRTOS-Kernel.

3 years agoMake unit-test run on 20.04 ubuntu
Aniruddha Kanhere [Fri, 18 Nov 2022 09:32:10 +0000 (15:02 +0530)]
Make unit-test run on 20.04 ubuntu

3 years agoUpdate kernel-checks.yml
Aniruddha Kanhere [Fri, 18 Nov 2022 09:21:11 +0000 (14:51 +0530)]
Update kernel-checks.yml

3 years agoUpdate ci.yml
Aniruddha Kanhere [Fri, 18 Nov 2022 09:18:30 +0000 (14:48 +0530)]
Update ci.yml

3 years agoUpdate actions to use 20.04 ubuntu
Aniruddha Kanhere [Fri, 18 Nov 2022 09:11:59 +0000 (14:41 +0530)]
Update actions to use 20.04 ubuntu

3 years agoOnly adding freertos_config if it exists. Removing auto generation of it from a FREER...
Paul Helter [Fri, 4 Nov 2022 23:23:52 +0000 (16:23 -0700)]
Only adding freertos_config if it exists. Removing auto generation of it from a FREERTOS_CONFIG_FILE_DIRECTORY.

3 years agoAdded in documentation on how to consume from a main project. Added default PORT...
Paul Helter [Sun, 23 Oct 2022 23:46:05 +0000 (16:46 -0700)]
Added in documentation on how to consume from a main project. Added default PORT selection for native POSIX and MINGW platforms.

3 years agoRemoving compiler warnings for GNU and Clang. (#571)
Paul Helter [Wed, 12 Oct 2022 10:00:24 +0000 (03:00 -0700)]
Removing compiler warnings for GNU and Clang. (#571)

3 years agoSupporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)
Paul Helter [Tue, 11 Oct 2022 19:27:08 +0000 (12:27 -0700)]
Supporting backwards compatibility with FREERTOS_CONFIG_FILE_DIRECTORY (#571)

3 years agoUsing single name definition for libraries everywhere. (#558)
Paul Helter [Fri, 30 Sep 2022 22:16:20 +0000 (15:16 -0700)]
Using single name definition for libraries everywhere. (#558)

3 years agoAdding in ability to support a library for freertos_config and a custom freertos_kern...
Paul Helter [Thu, 29 Sep 2022 22:04:39 +0000 (15:04 -0700)]
Adding in ability to support a library for freertos_config and a custom freertos_kernel_port (#558)

3 years agoVersion Change (#587)
Soren Ptak [Fri, 18 Nov 2022 01:29:55 +0000 (17:29 -0800)]
Version Change (#587)

* Updating to version v10.5.1

Co-authored-by: Soren Ptak <skptak@amazon.com>
3 years agoAdd support for the configUSE_TASK_FPU_SUPPORT constant in the GCC/ARM_CR5 port ...
ChristosZosi [Mon, 14 Nov 2022 05:18:47 +0000 (06:18 +0100)]
Add support for the configUSE_TASK_FPU_SUPPORT constant in the GCC/ARM_CR5 port (#584)

* Add support for the configUSE_TASK_FPU_SUPPORT in the GCC/ARM_CR5 port

This is done almost identically as in the GCC/ARM_CA9 port

* Adjust task stack initialitation of the GCC/ARM_CR5 port

Ensure that the task stack initialization is done correctly for the
different options of configUSE_TASK_FPU_SUPPORT.

This is very similar to the GCC/ARM_CA9 port. The only meaningful
difference is, that the FPU of the Cortex-R5 has just sixteen 64-bit
floating point registers as it implements the VFPv3-D16 architecture.
You may also refer to the ARM documentation

* Add support for FPU safe interrupts to the GCC/ARM_CR5 port

Similar to GCC/ARM_CA9 port

* Clarify comment about the size of the FPU registers of Cortex R5

3 years agoFix context switch when time slicing is off (#568)
Gaurav-Aggarwal-AWS [Tue, 8 Nov 2022 08:35:35 +0000 (14:05 +0530)]
Fix context switch when time slicing is off (#568)

* Fix context switch when time slicing is off

When time slicing is off, context switch should only happen when a
task with priority higher than the currently executing one is unblocked.
Earlier the code was invoking a context switch even when a task with
priority equal the currently executing task was unblocked. This commit
fixes the code to only do a context switch when a higher priority
task is unblocked.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoUpdate Cortex-M55 and Cortex-M85 ports (#579)
Gaurav-Aggarwal-AWS [Fri, 28 Oct 2022 05:11:56 +0000 (10:41 +0530)]
Update Cortex-M55 and Cortex-M85 ports (#579)

These were missed when PR #59 was merged.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoUpdate the NIOSII port to enable longer jumps (#578)
RichardBarry [Thu, 20 Oct 2022 05:04:53 +0000 (22:04 -0700)]
Update the NIOSII port to enable longer jumps (#578)

Update the NIOSII port so it works on systems with more RAM as
per https://forums.freertos.org/t/nios-ii-r-nios2-call26-noat-linker-error/16028

3 years agoRemoved the 'configASSERT( xInheritanceOccurred == pdFALSE )' assertion from xQueueSe...
Niklas Gürtler [Thu, 13 Oct 2022 17:22:24 +0000 (19:22 +0200)]
Removed the 'configASSERT( xInheritanceOccurred == pdFALSE )' assertion from xQueueSemaphoreTake as the reasoning behind it is wrong; it can trigger on wrongly on highly-contested semaphores on multicore systems. See https://forums.freertos.org/t/15967 (#576)

Co-authored-by: Niklas Gürtler <niklas.guertler@tacterion.com>
3 years agoAdd warning message to ensure min stack size (#575)
arshi016 [Wed, 12 Oct 2022 04:17:02 +0000 (00:17 -0400)]
Add warning message to ensure min stack size (#575)

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
3 years agoUpdated ESP32 port-layer to ESP-IDF `v4.4.2` (#572)
Laukik Hase [Tue, 11 Oct 2022 21:27:32 +0000 (02:57 +0530)]
Updated ESP32 port-layer to ESP-IDF `v4.4.2` (#572)

* Xtensa_ESP32: Added esp-idf v4.4.2 specific changes

* Xtensa_ESP32: Updated SPDX license identifiers

3 years agoTickless idle fixes/improvement (#59)
Jeff Tenney [Mon, 3 Oct 2022 19:39:17 +0000 (12:39 -0700)]
Tickless idle fixes/improvement (#59)

* Fix tickless idle when stopping systick on zero...

...and don't stop SysTick at all in the eAbortSleep case.

Prior to this commit, if vPortSuppressTicksAndSleep() happens to stop
the SysTick on zero, then after tickless idle ends, xTickCount advances
one full tick more than the time that actually elapsed as measured by
the SysTick.  See "bug 1" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40

SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M.  SysTick starts counting down from
the value stored in its reload register.  When SysTick reaches zero, it
requests an interrupt.  On the next SysTick clock cycle, it loads the
counter again from the reload register.  To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.

Bug Example
-----------
- Idle task calls vPortSuppressTicksAndSleep(xExpectedIdleTime = 2).
  [Doesn't have to be "2" -- could be any number.]
- vPortSuppressTicksAndSleep() stops SysTick, and the current-count
  register happens to stop on zero.
- SysTick ISR executes, setting xPendedTicks = 1
- vPortSuppressTicksAndSleep() masks interrupts and calls
  eTaskConfirmSleepModeStatus() which confirms the sleep operation. ***
- vPortSuppressTicksAndSleep() configures SysTick for 1 full tick
  (xExpectedIdleTime - 1) plus the current-count register (which is 0)
- One tick period elapses in sleep.
- SysTick wakes CPU, ISR executes and increments xPendedTicks to 2.
- vPortSuppressTicksAndSleep() calls vTaskStepTick(1), then returns.
- Idle task resumes scheduler, which increments xTickCount twice (for
  xPendedTicks = 2)

In the end, two ticks elapsed as measured by SysTick, but the code
increments xTickCount three times.  The root cause is that the code
assumes the SysTick current-count register always contains the number of
SysTick counts remaining in the current tick period.  However, when the
current-count register is zero, there are ulTimerCountsForOneTick
counts remaining, not zero.  This error is not the kind of time slippage
normally associated with tickless idle.

*** Note that a recent commit https://github.com/FreeRTOS/FreeRTOS-Kernel/commit/e1b98f0
results in eAbortSleep in this case, due to xPendedTicks != 0.  That
commit does mostly resolve this bug without specifically mentioning
it, and without this commit.  But that resolution allows the code in
port.c not to directly address the special case of stopping SysTick on
zero in any code or comments.  That commit also generates additional
instances of eAbortSleep, and a second purpose of this commit is to
optimize how vPortSuppressTicksAndSleep() behaves for eAbortSleep, as
noted below.

This commit also includes an optimization to avoid stopping the SysTick
when eTaskConfirmSleepModeStatus() returns eAbortSleep.  This
optimization belongs with this fix because the method of handling the
SysTick being stopped on zero changes with this optimization.

* Fix imminent tick rescheduled after tickless idle

Prior to this commit, if something other than systick wakes the CPU from
tickless idle, vPortSuppressTicksAndSleep() might cause xTickCount to
increment once too many times.  See "bug 2" in this forum post:
https://forums.freertos.org/t/ultasknotifytake-timeout-accuracy/9629/40

SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M.  SysTick starts counting down from
the value stored in its reload register.  When SysTick reaches zero, it
requests an interrupt.  On the next SysTick clock cycle, it loads the
counter again from the reload register.  To get periodic interrupts
every N SysTick clock cycles, the reload register must be N - 1.

Bug Example
-----------
- CPU is sleeping in vPortSuppressTicksAndSleep()
- Something other than the SysTick wakes the CPU.
- vPortSuppressTicksAndSleep() calculates the number of SysTick counts
  until the next tick.  The bug occurs only if this number is small.
- vPortSuppressTicksAndSleep() puts this small number into the SysTick
  reload register, and starts SysTick.
- vPortSuppressTicksAndSleep() calls vTaskStepTick()
- While vTaskStepTick() executes, the SysTick expires.  The ISR pends
  because interrupts are masked, and SysTick starts a 2nd period still
  based on the small number of counts in its reload register.  This 2nd
  period is undesirable and is likely to cause the error noted below.
- vPortSuppressTicksAndSleep() puts the normal tick duration into the
  SysTick's reload register.
- vPortSuppressTicksAndSleep() unmasks interrupts before the SysTick
  starts a new period based on the new value in the reload register.
  [This is a race condition that can go either way, but for the bug
  to occur, the race must play out this way.]
- The pending SysTick ISR executes and increments xPendedTicks.
- The SysTick expires again, finishing the second very small period, and
  starts a new period this time based on the full tick duration.
- The SysTick ISR increments xPendedTicks (or xTickCount) even though
  only a tiny fraction of a tick period has elapsed since the previous
  tick.

The bug occurs when *two* consecutive small periods of the SysTick are
both counted as ticks.  The root cause is a race caused by the small
SysTick period.  If vPortSuppressTicksAndSleep() unmasks interrupts
*after* the small period expires but *before* the SysTick starts a
period based on the full tick period, then two small periods are
counted as ticks when only one should be counted.

The end result is xTickCount advancing nearly one full tick more than
time actually elapsed as measured by the SysTick.  This is not the kind
of time slippage normally associated with tickless idle.

After this commit the code starts the SysTick and then immediately
modifies the reload register to ensure the very short cycle (if any) is
conducted only once.  This strategy requires special consideration for
the build option that configures SysTick to use a divided clock.  To
avoid waiting around for the SysTick to load value from the reload
register, the new code temporarily configures the SysTick to use the
undivided clock.  The resulting timing error is typical for tickless
idle.  The error (commonly known as drift or slippage in kernel time)
caused by this strategy is equivalent to one or two counts in
ulStoppedTimerCompensation.

This commit also updates comments and #define symbols related to the
SysTick clock option.  The SysTick can optionally be clocked by a
divided version of the CPU clock (commonly divide-by-8).  The new code
in this commit adjusts these comments and symbols to make them clearer
and more useful in configurations that use the divided clock.  The fix
made in this commit requires the use of these symbols, as noted in the
code comments.

* Fix tickless idle with alternate systick clocking

Prior to this commit, in configurations using the alternate SysTick
clocking, vPortSuppressTicksAndSleep() might cause xTickCount to jump
ahead as much as the entire expected idle time or fall behind as much
as one full tick compared to time as measured by the SysTick.

SysTick
-------
The SysTick is the hardware timer that provides the OS tick interrupt
in the official ports for Cortex M. SysTick starts counting down from
the value stored in its reload register. When SysTick reaches zero, it
requests an interrupt. On the next SysTick clock cycle, it loads the
counter again from the reload register. The SysTick has a configuration
option to be clocked by an alternate clock besides the core clock.
This alternate clock is MCU dependent.

Scenarios Fixed
---------------
The new code in this commit handles the following scenarios that were
not handled correctly prior to this commit.

1. Before the sleep, vPortSuppressTicksAndSleep() stops the SysTick on
zero, long after SysTick reached zero.  Prior to this commit, this
scenario caused xTickCount to jump ahead one full tick for the same
reason documented here: https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/59/commits/0c7b04bd3a745c52151abebc882eed3f811c4c81

2. After the sleep, vPortSuppressTicksAndSleep() stops the SysTick
before it loads the counter from the reload register.  Prior to this
commit, this scenario caused xTickCount to jump ahead by the entire
expected idle time (xExpectedIdleTime) because the current-count
register is zero before it loads from the reload register.

3. Prior to return, vPortSuppressTicksAndSleep() attempts to start a
short SysTick period when the current SysTick clock cycle has a lot of
time remaining.  Prior to this commit, this scenario could cause
xTickCount to fall behind by as much as nearly one full tick because the
short SysTick cycle never started.

Note that #3 is partially fixed by https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/59/commits/967acc9b200d3d4beeb289d9da9e88798074b431
even though that commit addresses a different issue.  So this commit
completes the partial fix.

* Improve comments and name of preprocessor symbol

Add a note in the code comments that SysTick requests an interrupt when
decrementing from 1 to 0, so that's why stopping SysTick on zero is a
special case.  Readers might unknowingly assume that SysTick requests
an interrupt when wrapping from 0 back to the load-register value.

Reconsider new "_SETTING" suffix since "_CONFIG" suffix seems more
descriptive.  The code relies on *both* of these preprocessor symbols:

portNVIC_SYSTICK_CLK_BIT
portNVIC_SYSTICK_CLK_BIT_CONFIG  **new**

A meaningful suffix is really helpful to distinguish the two symbols.

* Revert introduction of 2nd name for NVIC register

When I added portNVIC_ICSR_REG I didn't realize there was already a
portNVIC_INT_CTRL_REG, which identifies the same register.  Not good
to have both.  Note that portNVIC_INT_CTRL_REG is defined in portmacro.h
and is already used in this file (port.c).

* Replicate to other Cortex M ports

Also set a new fiddle factor based on tests with a CM4F.  I used gcc,
optimizing at -O1.  Users can fine-tune as needed.

Also add configSYSTICK_CLOCK_HZ to the CM0 ports to be just like the
other Cortex M ports.  This change allowed uniformity in the default
tickless implementations across all Cortex M ports.  And CM0 is likely
to benefit from configSYSTICK_CLOCK_HZ, especially considering new CM0
devices with very fast CPU clock speeds.

* Revert changes to IAR-CM0-portmacro.h

portNVIC_INT_CTRL_REG was already defined in port.c.  No need to define
it in portmacro.h.

* Handle edge cases with slow SysTick clock

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: abhidixi11 <44424462+abhidixi11@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
3 years agoUpdate doc comments in task.h (#570)
Gaurav-Aggarwal-AWS [Wed, 28 Sep 2022 16:12:05 +0000 (21:42 +0530)]
Update doc comments in task.h (#570)

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoAdded better pointer declaration readability (#567)
Cristian Cristea [Mon, 26 Sep 2022 21:43:30 +0000 (00:43 +0300)]
Added better pointer declaration readability (#567)

* Add better pointer declaration readability

I revised the declaration of single-line pointers by splitting it into
multiple lines. Now, every pointer is declared (and initialized
accordingly) on its own line. This refactoring should enhance
readability and decrease the probability of error when a new pointer is
added/removed or a current one has its initialization value modified.

Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
* Remove unnecessary whitespace characters and lines

It removes whitespace characters at the end of lines (empty or
othwerwise) and clear lines at the end of the file (only one remains).
It is an automatic operation done by git.

Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
Signed-off-by: Cristian Cristea <cristiancristea00@gmail.com>
3 years agoUpdate RISC-V IAR port to support vector mode. (#458)
Ming Yue [Tue, 20 Sep 2022 22:32:41 +0000 (15:32 -0700)]
Update RISC-V IAR port to support vector mode. (#458)

* Update RISC-V IAR port to support vector mode.

* uncrustify

Co-authored-by: David Chalco <david@chalco.io>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
3 years agoUpdate History.txt as per the PR feedback
Gaurav Aggarwal [Fri, 16 Sep 2022 16:45:49 +0000 (22:15 +0530)]
Update History.txt as per the PR feedback

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoUpdate History.txt
Gaurav Aggarwal [Fri, 16 Sep 2022 11:04:04 +0000 (16:34 +0530)]
Update History.txt

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoRestrict unpriv task to invoke code with privilege
Gaurav Aggarwal [Wed, 7 Sep 2022 09:28:52 +0000 (14:58 +0530)]
Restrict unpriv task to invoke code with privilege

It was possible for an unprivileged task to invoke any function with
privilege by passing it as a parameter to MPU_xTaskCreate,
MPU_xTaskCreateStatic, MPU_xTimerCreate, MPU_xTimerCreateStatic, or
MPU_xTimerPendFunctionCall.

This commit ensures that MPU_xTaskCreate and MPU_xTaskCreateStatic can
only create unprivileged tasks. It also removes the following APIs:
1. MPU_xTimerCreate
2. MPU_xTimerCreateStatic
3. MPU_xTimerPendFunctionCall

We thank Huazhong University of Science and Technology for reporting
this issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoRemove local stack variable form MPU wrappers
Gaurav Aggarwal [Wed, 7 Sep 2022 09:27:37 +0000 (14:57 +0530)]
Remove local stack variable form MPU wrappers

It was possible for a third party that had already independently gained
the ability to execute injected code to achieve further privilege
escalation by branching directly inside a FreeRTOS MPU API wrapper
function with a manually crafted stack frame. This commit removes the
local stack variable `xRunningPrivileged` so that a manually crafted
stack frame cannot be used for privilege escalation by branching
directly inside a FreeRTOS MPU API wrapper.

We thank Certibit Consulting, LLC, Huazhong University of Science and
Technology and the SecLab team at Northeastern University for reporting
this issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoMake RAM regions non-executable
Gaurav Aggarwal [Wed, 7 Sep 2022 09:20:30 +0000 (14:50 +0530)]
Make RAM regions non-executable

This commit makes the privileged RAM and stack regions non-executable.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoUse highest numbered MPU regions for kernel
Gaurav Aggarwal [Wed, 7 Sep 2022 09:17:14 +0000 (14:47 +0530)]
Use highest numbered MPU regions for kernel

ARMv7-M allows overlapping MPU regions. When 2 MPU regions overlap, the
MPU configuration of the higher numbered MPU region is applied. For
example, if a memory area is covered by 2 MPU regions 0 and 1, the
memory permissions for MPU region 1 are applied.

We use 5 MPU regions for kernel code and kernel data protections and
leave the remaining for the application writer. We were using lowest
numbered MPU regions (0-4) for kernel protections and leaving the
remaining for the application writer. The application writer could
configure those higher numbered MPU regions to override kernel
protections.

This commit changes the code to use highest numbered MPU regions for
kernel protections and leave the remaining for the application writer.
This ensures that the application writer cannot override kernel
protections.

We thank the SecLab team at Northeastern University for reporting this
issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoUpdate CMakeLists.txt for Cortex-M55 and Cortex-M85 ports (#560)
Paul Bartell [Fri, 16 Sep 2022 07:00:11 +0000 (00:00 -0700)]
Update CMakeLists.txt for Cortex-M55 and Cortex-M85 ports (#560)

* Annotate ports CMakeLists.txt with port details

* CMake: Add Cortex-M55 and Cortex-M85 ports

3 years agoportable-RP2040: Fix typo in README.md (#559)
Paul Bartell [Wed, 14 Sep 2022 06:43:10 +0000 (23:43 -0700)]
portable-RP2040: Fix typo in README.md (#559)

Replace "import" with "include" in cmake code sample.

3 years agoM85 support (#556)
Gabor Toth [Tue, 13 Sep 2022 16:38:25 +0000 (18:38 +0200)]
M85 support (#556)

* Extend support to Arm Cortex-M85

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: I679ba8e193638126b683b651513f08df445f9fe6

* Add generated Cortex-M85 support files

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: Ib329d88623c2936ffe3e9a24f5d6e07655e4e5c8

* Extend Trusted Firmware M port

Extend Trusted Firmware M port to Cortex-M23,
Cortex-M55 and Cortex-M85.

Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Change-Id: If8f1081acfd04e547b3227579e70e355a6adffe3

* Re-run copy_files.py script

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Gabor Toth <gabor.toth@arm.com>
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoUpdate of three badly terminated macro definitions (#555)
newbrain [Thu, 8 Sep 2022 17:33:41 +0000 (19:33 +0200)]
Update of three badly terminated macro definitions (#555)

* Update of three badly terminated macro definitions
- vTaskDelayUntil() to conform to usual pattern do { ... } while(0)
- vTaskNotifyGiveFromISR() and
- vTaskGenericNotifyGiveFromISR() to remove extra terminating semicolons
- This PR addresses issues #553 and #554

* Adjust formatting of task.h

Co-authored-by: Paul Bartell <pbartell@amazon.com>
3 years agoAdded checks for index in ThreadLocalStorage APIs (#552)
Aniruddha Kanhere [Thu, 1 Sep 2022 20:23:02 +0000 (13:23 -0700)]
Added checks for index in ThreadLocalStorage APIs (#552)

Added checks for ( xIndex >= 0 ) in ThreadLocalStorage APIs

3 years agoRISC-V: Add support for RV32E extension in GCC port (#543)
Jakub Lužný [Tue, 30 Aug 2022 23:49:37 +0000 (01:49 +0200)]
RISC-V: Add support for RV32E extension in GCC port (#543)

Co-authored-by: Joseph Julicher <jjulicher@mac.com>
3 years ago[Fix] Type for pointers operations (#550)
Octaviarius [Tue, 30 Aug 2022 20:27:39 +0000 (23:27 +0300)]
[Fix] Type for pointers operations (#550)

* fix type for pointers operations in some places: size_t -> portPOINTER_SIZE_TYPE

* fix pointer arithmetics

* fix xAddress type

3 years agoAdd FreeRTOS config directory to include dirs (#548)
Gaurav-Aggarwal-AWS [Mon, 22 Aug 2022 15:28:07 +0000 (20:58 +0530)]
Add FreeRTOS config directory to include dirs (#548)

This allows the application write to set FREERTOS_CONFIG_FILE_DIRECTORY
to whichever directory the FreeRTOSConfig.h file exists in.

This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/545

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoAdd support for MISRA rule 20.7 (#546)
Monika Singh [Fri, 19 Aug 2022 10:21:57 +0000 (15:51 +0530)]
Add support for MISRA rule 20.7 (#546)

Misra rule 20.7 requires parenthesis to all parameter names
in macro definitions.

The issue was reported here : https://forums.freertos.org/t/misra-20-7-compatibility/15385

3 years agoFix warnings in posix port (#544)
Archit Gupta [Tue, 16 Aug 2022 11:11:17 +0000 (04:11 -0700)]
Fix warnings in posix port (#544)

Fixes warnings about unused parameters and variables when built with
`-Wall -Wextra`.

3 years agocorrect grammar in include/FreeRTOS.h
Paul Bartell [Tue, 9 Aug 2022 22:48:56 +0000 (15:48 -0700)]
correct grammar in include/FreeRTOS.h

Co-authored-by: Aniruddha Kanhere <60444055+AniruddhaKanhere@users.noreply.github.com>
3 years agoFix formatting of FreeRTOS.h
Paul Bartell [Tue, 9 Aug 2022 18:13:12 +0000 (11:13 -0700)]
Fix formatting of FreeRTOS.h

3 years agoMove some of the complex pre-processor guards on prvWriteNameToBuffer() to compile...
RichardBarry [Sun, 19 Dec 2021 19:18:54 +0000 (11:18 -0800)]
Move some of the complex pre-processor guards on prvWriteNameToBuffer() to compile time checks in FreeRTOS.h.

Co-authored-by: Paul Bartell <pbartell@amazon.com>
3 years agoInclude string.h at the top of portable/GCC/ARM_CA9/port.c to prevent memset() genera...
RichardBarry [Tue, 9 Aug 2022 17:37:24 +0000 (10:37 -0700)]
Include string.h at the top of portable/GCC/ARM_CA9/port.c to prevent memset() generating a warning. (#430)

Co-authored-by: none <unknown>
3 years agoChange default value of INCLUDE_xTaskGetCurrentTaskHandle (#542)
Ravishankar Bhagavandas [Tue, 9 Aug 2022 16:48:44 +0000 (09:48 -0700)]
Change default value of INCLUDE_xTaskGetCurrentTaskHandle (#542)

3 years agoGeneralize Thread Local Storage (TLS) support (#540)
Gaurav-Aggarwal-AWS [Mon, 8 Aug 2022 15:53:29 +0000 (21:23 +0530)]
Generalize Thread Local Storage (TLS) support (#540)

* Generalize Thread Local Storage (TLS) support

FreeRTOS's Thread Local Storage (TLS) support used variables and
functions from newlib, thereby making the TLS support specific to
newlib. This commit generalizes the TLS support so that it can be used
with other c-runtime libraries also. The default behavior for newlib
support is still kept same for backward compatibility.

The application writer would need to set configUSE_C_RUNTIME_TLS_SUPPORT
to 1 in their FreeRTOSConfig.h and define the following macros to
support TLS for a c-runtime library:

1. configTLS_BLOCK_TYPE - Type used to define the TLS block in TCB.
2. configINIT_TLS_BLOCK( xTLSBlock ) - Allocate and initialize memory
   block for the task's TLS Block.
3. configSET_TLS_BLOCK( xTLSBlock ) - Switch C-Runtime's TLS Block to
   point to xTLSBlock.
4. configDEINIT_TLS_BLOCK( xTLSBlock ) - Free up the memory allocated
   for the task's TLS Block.

The following is an example to support TLS for picolibc:

 #define configUSE_C_RUNTIME_TLS_SUPPORT        1
 #define configTLS_BLOCK_TYPE                   void*
 #define configINIT_TLS_BLOCK( xTLSBlock )      _init_tls( xTLSBlock )
 #define configSET_TLS_BLOCK( xTLSBlock )       _set_tls( xTLSBlock )
 #define configDEINIT_TLS_BLOCK( xTLSBlock )

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoAdd .syntax unified to GCC assembly functions (#538)
Gaurav-Aggarwal-AWS [Sun, 7 Aug 2022 17:16:11 +0000 (22:46 +0530)]
Add .syntax unified to GCC assembly functions (#538)

This fixes the compilation issue with XC32 compiler.

It was reported here - https://forums.freertos.org/t/xc32-v4-00-error-with-building-freertos-portasm-c/14357/4

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
3 years agoUpdate History.txt (#535)
Gaurav-Aggarwal-AWS [Sun, 7 Aug 2022 17:01:47 +0000 (22:31 +0530)]
Update History.txt (#535)

* Update History.txt

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoBlock SIG_RESUME in the main thread of the Posix port so that sigwait works as expect...
Chris Copeland [Thu, 4 Aug 2022 18:11:31 +0000 (11:11 -0700)]
Block SIG_RESUME in the main thread of the Posix port so that sigwait works as expected (#532)

Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
3 years agoChange type of message buffer handle (#537)
Ravishankar Bhagavandas [Thu, 4 Aug 2022 17:07:49 +0000 (10:07 -0700)]
Change type of message buffer handle (#537)

3 years agoFix NULL pointer dereference in vPortGetHeapStats
Gaurav Aggarwal [Thu, 4 Aug 2022 11:11:33 +0000 (16:41 +0530)]
Fix NULL pointer dereference in vPortGetHeapStats

When the heap is exhausted (no free block), start and end markers are
the only blocks present in the free block list:

     +---------------+     +-----------> NULL
     |               |     |
     |               V     |
+ ----- +            + ----- +
|   |   |            |   |   |
|   |   |            |   |   |
+ ----- +            + ----- +
  xStart               pxEnd

The code block which traverses the list of free blocks to calculate heap
stats used a do..while loop that moved past the end marker when the heap
had no free block resulting in a NULL pointer dereference. This commit
changes the do..while loop to while loop thereby ensuring that we never
move past the end marker.

This was reported here - https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/534

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoAdd vPortRemoveInterruptHandler API (#533)
Gaurav-Aggarwal-AWS [Wed, 3 Aug 2022 20:45:27 +0000 (13:45 -0700)]
Add vPortRemoveInterruptHandler API (#533)

* Add xPortRemoveInterruptHandler API

This API is added to the MicroBlazeV9 port. It enables the application
writer to remove an interrupt handler.

This was originally contributed in this PR - https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/523

* Change API signature to return void

This makes the API similar to vPortDisableInterrupt.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gavin Lambert <uecasm@users.noreply.github.com>
3 years agoUpdate codecov action to v3.1.0
Paul Bartell [Tue, 28 Jun 2022 21:07:17 +0000 (14:07 -0700)]
Update codecov action to v3.1.0

3 years agoImplement MicroBlazeV9 stack protection (#523)
Gavin Lambert [Wed, 3 Aug 2022 06:31:18 +0000 (18:31 +1200)]
Implement MicroBlazeV9 stack protection (#523)

* Implement stack protection for MicroBlaze (without MPU wrappers)

3 years agoadd portDONT_DISCARD to pxCurrentTCB (#479)
Patrick Oppenlander [Tue, 2 Aug 2022 10:39:58 +0000 (20:39 +1000)]
add portDONT_DISCARD to pxCurrentTCB (#479)

This fixes link failures with LTO:

/tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst2':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:249: undefined reference to `pxCurrentTCB'
/usr/lib/gcc/arm-none-eabi/11.2.0/../../../../arm-none-eabi/bin/ld: /tmp/ccJbaKaD.ltrans0.ltrans.o: in function `pxCurrentTCBConst':
/root/project/FreeRTOS/portable/GCC/ARM_CM4F/port.c:443: undefined reference to `pxCurrentTCB'

3 years agoAdd SBOM Generation in auto_release.yml (#524)
Xin Lin [Thu, 28 Jul 2022 17:35:29 +0000 (10:35 -0700)]
Add SBOM Generation in auto_release.yml (#524)

3 years agoPosix: Removed unused signal set from port (#528)
0xjakob [Mon, 25 Jul 2022 17:05:30 +0000 (01:05 +0800)]
Posix: Removed unused signal set from port (#528)

Co-authored-by: Jakob Hasse <0xjakob@users.noreply.github.com>
3 years agoRP2040: Use indirect reference for pxCurrentTCB (#525)
NomiChirps [Mon, 18 Jul 2022 23:05:30 +0000 (16:05 -0700)]
RP2040: Use indirect reference for pxCurrentTCB (#525)

3 years agoAdd Cortex M7 r0p1 Errata 837070 workaround to CM4_MPU ports (#513)
Paul Bartell [Thu, 30 Jun 2022 05:05:26 +0000 (22:05 -0700)]
Add Cortex M7 r0p1 Errata 837070 workaround to CM4_MPU ports (#513)

* Clarify Cortex M7 r0p1 errata number in r0p1 specific port.

* Add ARM Cortex M7 r0p0 / r0p1 Errata 837070 workaround to CM4 MPU ports.

Optionally, enable the errata workaround by defining configTARGET_ARM_CM7_r0p0 or configTARGET_ARM_CM7_r0p1 in FreeRTOSConfig.h.

* Add r0p1 errata support to IAR port as well

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Change macro name to configENABLE_ERRATA_837070_WORKAROUND

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoUpdate submodule pointer of Community Supported Ports (#486)
Gaurav-Aggarwal-AWS [Wed, 29 Jun 2022 15:01:00 +0000 (08:01 -0700)]
Update submodule pointer of Community Supported Ports (#486)

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
3 years agoUpdate to TF-M version TF-Mv1.6.0 (#517)
Xinyu Zhang [Wed, 29 Jun 2022 06:52:30 +0000 (14:52 +0800)]
Update to TF-M version TF-Mv1.6.0 (#517)

Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Change-Id: I0c15564b342873f9bd7a8240822e770950a0563e

3 years agoRP2040: Allow FreeRTOS to be added to the parent CMake project post initialization...
Graham Sanderson [Fri, 24 Jun 2022 11:52:49 +0000 (06:52 -0500)]
RP2040: Allow FreeRTOS to be added to the parent CMake project post initialization of the Pico SDK (#497)

Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
3 years agoEnsure that xTaskGetCurrentTaskHandle is included (#507)
Gaurav-Aggarwal-AWS [Thu, 23 Jun 2022 17:17:17 +0000 (10:17 -0700)]
Ensure that xTaskGetCurrentTaskHandle is included (#507)

This commits adds a check that INCLUDE_xTaskGetCurrentTaskHandle is
set to 1. A compile time error message is produced if it is not set to
1. This is needed because stream_buffer.c uses xTaskGetCurrentTaskHandle.

This was reported here - https://forums.freertos.org/t/xstreambufferreceive-include-xtaskgetcur/15283

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoRP2040: Remove incorrect assertion (#508)
Graham Sanderson [Wed, 22 Jun 2022 17:27:26 +0000 (12:27 -0500)]
RP2040: Remove incorrect assertion (#508)

After the xEventGroupWaitBits in vProtLockInternalSpinUnlockWithWait there was an assertion about
pxYiledSpinLock being NULL, however when xEventGroupWaitBits returns, IRQs have been re-enabled
and so it is no longer safe to assert on the state which is protected by IRQs being disabled.

Co-authored-by: graham sanderson <graham.sanderson@raspeberryi.com>
3 years agoAdd configUSE_MUTEXES to function declarations in header (#504)
Gaurav-Aggarwal-AWS [Tue, 21 Jun 2022 10:34:52 +0000 (03:34 -0700)]
Add configUSE_MUTEXES to function declarations in header (#504)

This commit adds the configUSE_MUTEXES guard to the function
declarations in semphr.h which are only available when configUSE_MUTEXES
is set to 1.

It was reported here - https://forums.freertos.org/t/mutex-missing-reference-to-configuse-mutexes-on-the-online-documentation/15231

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoAdd callback overrides for stream buffer and message buffers (#437)
Ravishankar Bhagavandas [Tue, 21 Jun 2022 00:48:34 +0000 (17:48 -0700)]
Add callback overrides for stream buffer and message buffers (#437)

* Let each stream/message can use its own sbSEND_COMPLETED

In FreeRTOS.h, set the default value of configUSE_SB_COMPLETED_CALLBACK
to zero, and add additional space for the function pointer when
the buffer created statically.

In stream_buffer.c, modify the macro of sbSEND_COMPLETED which let
the stream buffer to use its own implementation, and then add an
pointer to the stream buffer's structure, and modify the
implementation of the buffer creating and initializing

Co-authored-by: eddie9712 <qw1562435@gmail.com>
3 years agoUpdate feature_request.md (#500)
Tanmoy Sen [Wed, 8 Jun 2022 17:09:39 +0000 (10:09 -0700)]
Update feature_request.md (#500)

* Update feature_request.md

* Remove trailing spaces

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoadd extra check for compiler time (#499)
AndreiCherniaev [Thu, 2 Jun 2022 17:03:37 +0000 (21:03 +0400)]
add extra check for compiler time (#499)

minor change to add extra check for compiler time to prevent bad config

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
3 years agoAdd suppport for ARM CM55 (#494)
alfred gedeon [Wed, 1 Jun 2022 22:00:10 +0000 (00:00 +0200)]
Add suppport for ARM CM55 (#494)

* Add supposrt for ARM CM55

* Fix file header

* Remove duplicate code

* Refactor portmacro.h

1. portmacro.h is re-factored into 2 parts - portmacrocommon.h which is
   common to all ARMv8-M ports and portmacro.h which is different for
   different compiler and architecture. This enables us to provide
   Cortex-M55 ports without code duplication.
2. Update copy_files.py so that it copies Cortex-M55 ports correctly -
   all files except portmacro.h are used from Cortex-M33 ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoAligned nullptr check for heap3. (#493)
Dusan Cervenka [Tue, 17 May 2022 16:56:01 +0000 (18:56 +0200)]
Aligned nullptr check for heap3. (#493)

Signed-off-by: Cervenka Dusan <cervenka@acrios.com>
3 years agoqueue.h: cTaskWokenByPost -> xTaskWokenByReceive (#491)
Robert Berger [Mon, 25 Apr 2022 21:11:51 +0000 (00:11 +0300)]
queue.h: cTaskWokenByPost -> xTaskWokenByReceive (#491)

Co-authored-by: Robert Berger <robert.berger@ReliableEmbeddedSystems.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
3 years agoFormat code, and rmove implicit tests (#489)
alfred gedeon [Thu, 21 Apr 2022 17:18:58 +0000 (10:18 -0700)]
Format code, and rmove implicit tests (#489)

3 years agoAdd atomic flag for 16-bit ticks PIC24 (#488)
Kody Stribrny [Fri, 15 Apr 2022 15:13:14 +0000 (08:13 -0700)]
Add atomic flag for 16-bit ticks PIC24 (#488)

This change allows the PIC24 family of
16 bit processors to read the tick count
without a critical section when the tick
count is 16 bits.

Inspired from discussion - https://forums.freertos.org/t/xtaskgettickcount-with-critical-section-on-16-bit-mcu/14860/5

3 years agoCorrected spelling mistake in mpu_prototypes.h
Anton Lagerholm [Thu, 14 Apr 2022 06:09:38 +0000 (08:09 +0200)]
Corrected spelling mistake in mpu_prototypes.h

tasks.h doesn't exist.

3 years agoCorrect spelling mistake in mpu_wrappers.h
Anton Lagerholm [Thu, 14 Apr 2022 06:05:42 +0000 (08:05 +0200)]
Correct spelling mistake in mpu_wrappers.h

tasks.h doesn't exist.

3 years agoDeclare vApplicationMallocFailedHook function in task.h instead in each C heap file...
pierrenoel-bouteville-act [Wed, 13 Apr 2022 17:44:14 +0000 (19:44 +0200)]
Declare vApplicationMallocFailedHook function in task.h instead in each C heap file (#483)

vApplicationMallocFailedHook was declared in each Heap file. which forces users to declare it and can cause problems if the prototype of the function changes.

Co-authored-by: Pierre-Noel Bouteville <pnb990@gmail.com>
3 years agoEnable use of --text-section-literals in Xtensa port (#485)
Archit Gupta [Mon, 11 Apr 2022 22:07:08 +0000 (15:07 -0700)]
Enable use of --text-section-literals in Xtensa port (#485)

Patch submitted by customer on forums here: https://forums.freertos.org/t/cannot-compile-xtensa-port-assembly-with-text-section-literals/14838

3 years agoAdd configSYSTICK_CLOCK_HZ to Cortex-M0 ports (#484)
Gaurav-Aggarwal-AWS [Fri, 8 Apr 2022 18:13:11 +0000 (23:43 +0530)]
Add configSYSTICK_CLOCK_HZ to Cortex-M0 ports (#484)

This is needed to support the case when SysTick timer is not clocked
from the same source as CPU. This support already exists in other
Cortex-M ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agotasks.c:2067:11: warning: this condition has identical branches [-Wduplicated-branche...
pierrenoel-bouteville-act [Wed, 6 Apr 2022 18:08:44 +0000 (20:08 +0200)]
tasks.c:2067:11: warning: this condition has identical branches [-Wduplicated-branches] (#482)

* replace duplicated if branch because empty by a comment to avoid warning/error with option GCC -Wduplicated-branches

* Missing ';'

* cosmetic comment

* update comment as suggested by Gaurav-Aggarwal-AWS

* cosmetic

Co-authored-by: Pierre-Noel Bouteville <pnb990@gmail.com>
3 years agoAdd a guard around mpu_wrappers.c (#480)
Gaurav-Aggarwal-AWS [Tue, 5 Apr 2022 17:29:30 +0000 (22:59 +0530)]
Add a guard around mpu_wrappers.c (#480)

* Add a guard around mpu_wrappers.c

This avoid linker errors when this file is accidently compiled in
projects using non-MPU ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix formatting check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoUpdate portable/ThirdParty/README.md (#474)
Gaurav-Aggarwal-AWS [Fri, 11 Mar 2022 03:41:45 +0000 (19:41 -0800)]
Update portable/ThirdParty/README.md (#474)

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agofix: add additional .ltorg directives to GCC CM3/CM4 mpu ports (#473)
niniemann [Thu, 10 Mar 2022 17:19:58 +0000 (18:19 +0100)]
fix: add additional .ltorg directives to GCC CM3/CM4 mpu ports (#473)

Co-authored-by: Nils Niemann <Niemann.N@eppendorf.de>
3 years agoUpdate the README to align with TF-M v1.5.0 in TF-M integration (#469)
xinyu-tfm [Sun, 6 Mar 2022 00:31:08 +0000 (08:31 +0800)]
Update the README to align with TF-M v1.5.0 in TF-M integration (#469)

Signed-off-by: Xinyu Zhang <xinyu.zhang@arm.com>
Change-Id: Ic04b82259ac17d5e0f8662118385c803e68af3e5

3 years agoCheck for add overflow only once (#467)
Gaurav-Aggarwal-AWS [Thu, 3 Mar 2022 23:16:39 +0000 (15:16 -0800)]
Check for add overflow only once (#467)

Update the size calculations such that we only need to check for add
overflow only once. Also, change the way we detect add overflow so that
we do not need to cause an overflow to detect an overflow.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoMove MSB check after final size calculation (#463)
Gaurav-Aggarwal-AWS [Mon, 28 Feb 2022 19:59:00 +0000 (11:59 -0800)]
Move MSB check after final size calculation (#463)

We use the MSB of the size member of a BlockLink_t to track whether not
a block is allocated. Consequently, the size must not be so large that
the MSB is set. The check to see if the MSB in the size is set needs to
be done after the final size (metadata + alignment) is calculated.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoHeap improvements (#462)
Gaurav-Aggarwal-AWS [Thu, 24 Feb 2022 18:52:10 +0000 (10:52 -0800)]
Heap improvements (#462)

* Heap improvements

This commit makes the following improvements:

1. Add a check to heap_2 to track if a memory block is allocated to the
   application or not. The MSB of the size field is used for this
   purpose. The same check already exists in heap_4 and heap_5. This
   check prevents against double free.

2. Add a new flag configHEAP_CLEAR_MEMORY_ON_FREE to heap_2, heap_4 and
   heap_5. The application writer can set it to 1 in their
   FreeRTOSConfig.h to ensure that a block of memory allocated using
   pvPortMalloc is cleared (i.e. set to zero) when it is freed using
   vPortFree. If left undefined, configHEAP_CLEAR_MEMORY_ON_FREE
   defaults to 0 for backward compatibility. We recommend setting
   configHEAP_CLEAR_MEMORY_ON_FREE to 1 for better security.

3. Add a new API pvPortCalloc to heap_2, heap_4 and heap_5. This API
   has the following signature:
   void * pvPortCalloc( size_t xNum, size_t xSize );
   It allocates memory for an array of xNum objects each of which is of
   xSize and initializes all bytes in the allocated storage to zero. If
   allocation succeeds, it returns a pointer to the lowest byte in the
   allocated memory block. On failure, it returns a null pointer.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoMigrated RL78/IAR port to EWRL78v3+ (#461)
Felipe Torrezan [Thu, 24 Feb 2022 17:04:46 +0000 (18:04 +0100)]
Migrated RL78/IAR port to EWRL78v3+ (#461)

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
3 years agoUpdate documentation of uxTaskGetTaskNumber function (#460)
Gaurav-Aggarwal-AWS [Tue, 22 Feb 2022 18:44:05 +0000 (10:44 -0800)]
Update documentation of uxTaskGetTaskNumber function (#460)

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoCMake: Move mpu_wrapper to ports library. (#459)
imi415 [Tue, 22 Feb 2022 15:30:09 +0000 (00:30 +0900)]
CMake: Move mpu_wrapper to ports library. (#459)

3 years agoRemove exception loop tags. (#457)
Ming Yue [Thu, 17 Feb 2022 23:28:04 +0000 (15:28 -0800)]
Remove exception loop tags. (#457)

3 years agoUse a dedicated symbol for in-function loop to avoid the weak symbol JAL range error...
Ming Yue [Tue, 15 Feb 2022 22:56:13 +0000 (14:56 -0800)]
Use a dedicated symbol for in-function loop to avoid the weak symbol JAL range error when a strong symbol is defined outside. (#455)

3 years agoFix typo (#454)
mikisama [Sun, 13 Feb 2022 23:47:52 +0000 (07:47 +0800)]
Fix typo (#454)

3 years agoFix some warnings in doxygen comments (#453)
Muneeb Ahmed [Thu, 10 Feb 2022 19:36:42 +0000 (12:36 -0700)]
Fix some warnings in doxygen comments (#453)

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
3 years agoportable/Xtensa_ESP32: Add SPDX license identifiers (#452)
Shubham Kulkarni [Wed, 9 Feb 2022 00:28:07 +0000 (05:58 +0530)]
portable/Xtensa_ESP32: Add SPDX license identifiers (#452)

Co-authored-by: Paul Bartell <pbartell@amazon.com>
3 years agoAdd alignment for the direct mode handler (#449)
Gaurav-Aggarwal-AWS [Tue, 8 Feb 2022 19:51:25 +0000 (11:51 -0800)]
Add alignment for the direct mode handler (#449)

It is still possible to further relax the alignment using linker script
if needed.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoAdd support for 16 MPU regions to GCC Cortex-M33 ports (#448)
Gaurav-Aggarwal-AWS [Tue, 8 Feb 2022 00:51:19 +0000 (16:51 -0800)]
Add support for 16 MPU regions to GCC Cortex-M33 ports (#448)

* Add support for 16 MPU regions to GCC Cortex-M33 TZ port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* Add support for 16 MPU regions to Cortex-M33 NTZ GCC port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoUpdate History.txt to include 10.4.6 changes (#451)
Gaurav-Aggarwal-AWS [Tue, 8 Feb 2022 00:33:53 +0000 (16:33 -0800)]
Update History.txt to include 10.4.6 changes (#451)

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years agoFix description of configQUEUE_REGISTRY_SIZE (#446)
Tobias Nießen [Mon, 31 Jan 2022 19:12:47 +0000 (20:12 +0100)]
Fix description of configQUEUE_REGISTRY_SIZE (#446)