3 set remote hardware-breakpoint-limit @CROSS_NUM_BREAKPOINTS@
4 set remote hardware-watchpoint-limit @CROSS_NUM_WATCHPOINTS@
5 monitor arm semihosting enable
7 echo Loading ARMv7M GDB macros.\n
18 set $icsr = *(unsigned *)0xe000ed04
19 set $vect = $icsr & 0x1ff
20 set $pend = ($icsr & 0x1ff000) >> 12
21 set $shcsr = *(unsigned *)0xe000ed24
22 set $cfsr = *(unsigned *)0xe000ed28
23 set $mmfsr = $cfsr & 0xff
24 set $bfsr = ($cfsr >> 8) & 0xff
25 set $ufsr = ($cfsr >> 16) & 0xffff
26 set $hfsr = *(unsigned *)0xe000ed2c
27 set $bfar = *(unsigned *)0xe000ed38
28 set $mmfar = *(unsigned *)0xe000ed34
35 printf " due to vector table read fault\n"
38 printf " forced due to escalated or disabled configurable fault (see below)\n"
41 printf " due to an unexpected debug event\n"
47 printf " during lazy FP state save"
50 printf " during exception entry"
53 printf " during exception return"
56 printf " during data access"
59 printf " during instruction prefetch"
62 printf " accessing 0x%08x", $mmfar
75 printf " during lazy FP state save"
78 printf " during exception entry"
81 printf " during exception return"
84 printf " during instruction prefetch"
87 printf " accessing 0x%08x", $bfar
94 printf " due to divide-by-zero"
97 printf " due to unaligned memory access"
100 printf " due to access to disabled/absent coprocessor"
103 printf " due to a bad EXC_RETURN value"
106 printf " due to bad T or IT bits in EPSR"
109 printf " due to executing an undefined instruction"
115 printf "Handling vector %u\n", $vect
119 echo \nSelect relevant thread, and run "prefault" to restore state prior to fault.\n\n
125 if (($lr & 0xffffff00) == 0xffffff00) && (($lr & 0x1) == 0x1)
126 # save register values so they can be restored
137 echo Stack was in PSP:\n
138 set $stack = (uint32_t*)$psp
140 echo Stack was in MSP:\n
141 set $stack = (uint32_t*)$msp
144 # retrieve prior register states from the eight
145 # 32-bit words the MCU pushed on the stack
146 set $r0_pre = $stack[0]
147 set $r1_pre = $stack[1]
148 set $r2_pre = $stack[2]
149 set $r3_pre = $stack[3]
150 set $r12_pre = $stack[4]
151 set $lr_pre = $stack[5]
152 set $pc_pre = $stack[6]
153 set $psr_pre = $stack[7]
155 set $stack_offset_cpu = 4*8
157 # exception stack alignment. this is constant across CPUs
158 if (unsigned int)$psr_pre & 0x200
159 set $stack_offset_exception_align = 4
161 set $stack_offset_exception_align = 0
164 # reset SP to pre-fault stack frame
165 set $sp = $stack + $stack_offset_cpu + $stack_offset_exception_align
167 # reset other core regs to pre-fault values
177 echo \nRestored registers to pre-fault status.\n
178 echo The "postfault" command returns to the fault handler.\n
182 echo \nDid not detect fault status. Doing nothing.\n
188 echo \nRestoring core registers.\n
198 # clear sentinel to prevent repated Calls
201 echo \nNo post-fault state to restore.\n
205 # Hook to resume target on quit