begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.5.2-dev2">
  12       Active development...
  13       CMSIS-Core(M): 5.3.0 (see revision history for details)
  14        - Added provisions for compiler-independent C startup code.
  15       CMSIS-RTOS:
  16         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  17       CMSIS-RTOS2:
  18         - RTX 5.5.1 (see revision history for details)
  19       Devices:
  20        - Generalized/fixed startup code for Armv8.1-MML.
  21     </release>
  22     <release version="5.5.1" date="2019-03-20">
  23       The following folders are deprecated
  24         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  25
  26       CMSIS-Core(M): 5.2.1 (see revision history for details)
  27         - Fixed compilation issue in cmsis_armclang_ltm.h
  28     </release>
  29     <release version="5.5.0" date="2019-03-18">
  30       The following folders have been removed:
  31         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  32         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  33       The following folders are deprecated
  34         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  35
  36       CMSIS-Core(M): 5.2.0 (see revision history for details)
  37         - Reworked Stack/Heap configuration for ARM startup files.
  38         - Added Cortex-M35P device support.
  39         - Added generic Armv8.1-M Mainline device support.
  40       CMSIS-Core(A): 1.1.3 (see revision history for details)
  41       CMSIS-DSP: 1.6.0 (see revision history for details)
  42         - reworked DSP library source files
  43         - reworked DSP library documentation
  44         - Changed DSP folder structure
  45         - moved DSP libraries to folder ./DSP/Lib
  46         - ARM DSP Libraries are built with ARMCLANG
  47         - Added DSP Libraries Source variant
  48       CMSIS-RTOS2:
  49         - RTX 5.5.0 (see revision history for details)
  50       CMSIS-Driver: 2.7.0
  51         - Added WiFi Interface API 1.0.0-beta
  52         - Added components for project specific driver implementations
  53       CMSIS-Pack: 1.6.0 (see revision history for details)
  54       Devices:
  55         - Added Cortex-M35P and ARMv81MML device templates.
  56         - Fixed C-Startup Code for GCC (aligned with other compilers)
  57       Utilities:
  58         - SVDConv 3.3.25
  59         - PackChk 1.3.82
  60     </release>
  61     <release version="5.4.0" date="2018-08-01">
  62       Aligned pack structure with repository.
  63       The following folders are deprecated:
  64         - CMSIS/Include/
  65         - CMSIS/DSP_Lib/
  66
  67       CMSIS-Core(M): 5.1.2 (see revision history for details)
  68         - Added Cortex-M1 support (beta).
  69       CMSIS-Core(A): 1.1.2 (see revision history for details)
  70       CMSIS-NN: 1.1.0
  71         - Added new math functions.
  72       CMSIS-RTOS2:
  73         - API 2.1.3 (see revision history for details)
  74         - RTX 5.4.0 (see revision history for details)
  75           * Updated exception handling on Cortex-A
  76       CMSIS-Driver:
  77         - Flash Driver API V2.2.0
  78       Utilities:
  79         - SVDConv 3.3.21
  80         - PackChk 1.3.71
  81     </release>
  82     <release version="5.3.0" date="2018-02-22">
  83       Updated Arm company brand.
  84       CMSIS-Core(M): 5.1.1 (see revision history for details)
  85       CMSIS-Core(A): 1.1.1 (see revision history for details)
  86       CMSIS-DAP: 2.0.0 (see revision history for details)
  87       CMSIS-NN: 1.0.0
  88         - Initial contribution of the bare metal Neural Network Library.
  89       CMSIS-RTOS2:
  90         - RTX 5.3.0 (see revision history for details)
  91         - OS Tick API 1.0.1
  92     </release>
  93     <release version="5.2.0" date="2017-11-16">
  94       CMSIS-Core(M): 5.1.0 (see revision history for details)
  95         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  96         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  97       CMSIS-Core(A): 1.1.0 (see revision history for details)
  98         - Added compiler_iccarm.h.
  99         - Added additional access functions for physical timer.
 100       CMSIS-DAP: 1.2.0 (see revision history for details)
 101       CMSIS-DSP: 1.5.2 (see revision history for details)
 102       CMSIS-Driver: 2.6.0 (see revision history for details)
 103         - CAN Driver API V1.2.0
 104         - NAND Driver API V2.3.0
 105       CMSIS-RTOS:
 106         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 107       CMSIS-RTOS2:
 108         - API 2.1.2 (see revision history for details)
 109         - RTX 5.2.3 (see revision history for details)
 110       Devices:
 111         - Added GCC startup and linker script for Cortex-A9.
 112         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 113         - Added IAR startup code for Cortex-A9
 114     </release>
 115     <release version="5.1.1" date="2017-09-19">
 116       CMSIS-RTOS2:
 117       - RTX 5.2.1 (see revision history for details)
 118     </release>
 119     <release version="5.1.0" date="2017-08-04">
 120       CMSIS-Core(M): 5.0.2 (see revision history for details)
 121       - Changed Version Control macros to be core agnostic.
 122       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 123       CMSIS-Core(A): 1.0.0 (see revision history for details)
 124       - Initial release
 125       - IRQ Controller API 1.0.0
 126       CMSIS-Driver: 2.05 (see revision history for details)
 127       - All typedefs related to status have been made volatile.
 128       CMSIS-RTOS2:
 129       - API 2.1.1 (see revision history for details)
 130       - RTX 5.2.0 (see revision history for details)
 131       - OS Tick API 1.0.0
 132       CMSIS-DSP: 1.5.2 (see revision history for details)
 133       - Fixed GNU Compiler specific diagnostics.
 134       CMSIS-Pack: 1.5.0 (see revision history for details)
 135       - added System Description File (*.SDF) Format
 136       CMSIS-Zone: 0.0.1 (Preview)
 137       - Initial specification draft
 138     </release>
 139     <release version="5.0.1" date="2017-02-03">
 140       Package Description:
 141       - added taxonomy for Cclass RTOS
 142       CMSIS-RTOS2:
 143       - API 2.1   (see revision history for details)
 144       - RTX 5.1.0 (see revision history for details)
 145       CMSIS-Core: 5.0.1 (see revision history for details)
 146       - Added __PACKED_STRUCT macro
 147       - Added uVisior support
 148       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 149       - Updated template for secure main function (main_s.c)
 150       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 151       CMSIS-DSP: 1.5.1 (see revision history for details)
 152       - added ARMv8M DSP libraries.
 153       CMSIS-Pack:1.4.9 (see revision history for details)
 154       - added Pack Index File specification and schema file
 155     </release>
 156     <release version="5.0.0" date="2016-11-11">
 157       Changed open source license to Apache 2.0
 158       CMSIS_Core:
 159        - Added support for Cortex-M23 and Cortex-M33.
 160        - Added ARMv8-M device configurations for mainline and baseline.
 161        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 162        - Added cmsis_compiler.h to unify compiler behaviour.
 163        - Updated function SCB_EnableICache (for Cortex-M7).
 164        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 165       CMSIS-RTOS:
 166         - bug fix in RTX 4.82 (see revision history for details)
 167       CMSIS-RTOS2:
 168         - new API including compatibility layer to CMSIS-RTOS
 169         - reference implementation based on RTX5
 170         - supports all Cortex-M variants including TrustZone for ARMv8-M
 171       CMSIS-SVD:
 172        - reworked SVD format documentation
 173        - removed SVD file database documentation as SVD files are distributed in packs
 174        - updated SVDConv for Win32 and Linux
 175       CMSIS-DSP:
 176        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 177        - Added DSP libraries build projects to CMSIS pack.
 178     </release>
 179     <release version="4.5.0" date="2015-10-28">
 180       - CMSIS-Core     4.30.0  (see revision history for details)
 181       - CMSIS-DAP      1.1.0   (unchanged)
 182       - CMSIS-Driver   2.04.0  (see revision history for details)
 183       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 184       - CMSIS-Pack     1.4.1   (see revision history for details)
 185       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 186       - CMSIS-SVD      1.3.1   (see revision history for details)
 187     </release>
 188     <release version="4.4.0" date="2015-09-11">
 189       - CMSIS-Core     4.20   (see revision history for details)
 190       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 191       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 192       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 193       - CMSIS-RTOS
 194         -- API         1.02   (unchanged)
 195         -- RTX         4.79   (see revision history for details)
 196       - CMSIS-SVD      1.3.0  (see revision history for details)
 197       - CMSIS-DAP      1.1.0  (extended with SWO support)
 198     </release>
 199     <release version="4.3.0" date="2015-03-20">
 200       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 201       - CMSIS-DSP      1.4.5  (see revision history for details)
 202       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 203       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 204       - CMSIS-RTOS
 205         -- API         1.02   (unchanged)
 206         -- RTX         4.78   (see revision history for details)
 207       - CMSIS-SVD      1.2    (unchanged)
 208     </release>
 209     <release version="4.2.0" date="2014-09-24">
 210       Adding Cortex-M7 support
 211       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 212       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 213       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 214       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 215       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 216     </release>
 217     <release version="4.1.1" date="2014-06-30">
 218       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 219     </release>
 220     <release version="4.1.0" date="2014-06-12">
 221       - CMSIS-Driver   2.02  (incompatible update)
 222       - CMSIS-Pack     1.3   (see revision history for details)
 223       - CMSIS-DSP      1.4.2 (unchanged)
 224       - CMSIS-Core     3.30  (unchanged)
 225       - CMSIS-RTOS RTX 4.74  (unchanged)
 226       - CMSIS-RTOS API 1.02  (unchanged)
 227       - CMSIS-SVD      1.10  (unchanged)
 228       PACK:
 229       - removed G++ specific files from PACK
 230       - added Component Startup variant "C Startup"
 231       - added Pack Checking Utility
 232       - updated conditions to reflect tool-chain dependency
 233       - added Taxonomy for Graphics
 234       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 235     </release>
 236     <release version="4.0.0">
 237       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 238       - CMSIS-Pack     1.1   Preliminary
 239       - CMSIS-DSP      1.4.2 (see revision history for details)
 240       - CMSIS-Core     3.30  (see revision history for details)
 241       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 242       - CMSIS-RTOS API 1.02  (unchanged)
 243       - CMSIS-SVD      1.10  (unchanged)
 244     </release>
 245     <release version="3.20.4">
 246       - CMSIS-RTOS 4.74 (see revision history for details)
 247       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 248     </release>
 249     <release version="3.20.3">
 250       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 251       - CMSIS-RTOS 4.73 (see revision history for details)
 252     </release>
 253     <release version="3.20.2">
 254       - CMSIS-Pack documentation has been added
 255       - CMSIS-Drivers header and documentation have been added to PACK
 256       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 257     </release>
 258     <release version="3.20.1">
 259       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 260       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 261     </release>
 262     <release version="3.20.0">
 263       The software portions that are deployed in the application program are now under a BSD license which allows usage
 264       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 265       The individual components have been update as listed below:
 266       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 267       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 268       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 269       - CMSIS-SVD is unchanged.
 270     </release>
 271   </releases>
 272
 273   <taxonomy>
 274     <description Cclass="Audio">Software components for audio processing</description>
 275     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 276     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 277     <description Cclass="Compiler">Compiler Software Extensions</description>
 278     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 279     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 280     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 281     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 282     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 283     <description Cclass="File System">File Drive Support and File System</description>
 284     <description Cclass="IoT Client">IoT cloud client connector</description>
 285     <description Cclass="IoT Utility">IoT specific software utility</description>
 286     <description Cclass="Graphics">Graphical User Interface</description>
 287     <description Cclass="Network">Network Stack using Internet Protocols</description>
 288     <description Cclass="RTOS">Real-time Operating System</description>
 289     <description Cclass="Security">Encryption for secure communication or storage</description>
 290     <description Cclass="USB">Universal Serial Bus Stack</description>
 291     <description Cclass="Utility">Generic software utility components</description>
 292   </taxonomy>
 293
 294   <devices>
 295     <!-- ******************************  Cortex-M0  ****************************** -->
 296     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 297       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 298       <description>
 299 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 300 - simple, easy-to-use programmers model
 301 - highly efficient ultra-low power operation
 302 - excellent code density
 303 - deterministic, high-performance interrupt handling
 304 - upward compatibility with the rest of the Cortex-M processor family.
 305       </description>
 306       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 307       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 308       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 309       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 310
 311       <device Dname="ARMCM0">
 312         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 313         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 314       </device>
 315     </family>
 316
 317     <!-- ******************************  Cortex-M0P  ****************************** -->
 318     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 319       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 320       <description>
 321 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 322 - simple, easy-to-use programmers model
 323 - highly efficient ultra-low power operation
 324 - excellent code density
 325 - deterministic, high-performance interrupt handling
 326 - upward compatibility with the rest of the Cortex-M processor family.
 327       </description>
 328       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 329       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 330       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 331       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 332
 333       <device Dname="ARMCM0P">
 334         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 335         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 336       </device>
 337
 338       <device Dname="ARMCM0P_MPU">
 339         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 340         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 341       </device>
 342     </family>
 343
 344     <!-- ******************************  Cortex-M1  ****************************** -->
 345     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 346       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 347       <description>
 348 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 349 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 350       </description>
 351       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 352       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 353       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 354       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 355
 356       <device Dname="ARMCM1">
 357         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 358         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 359       </device>
 360     </family>
 361
 362     <!-- ******************************  Cortex-M3  ****************************** -->
 363     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 364       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 365       <description>
 366 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 367 - simple, easy-to-use programmers model
 368 - highly efficient ultra-low power operation
 369 - excellent code density
 370 - deterministic, high-performance interrupt handling
 371 - upward compatibility with the rest of the Cortex-M processor family.
 372       </description>
 373       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 374       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 375       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 376       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 377
 378       <device Dname="ARMCM3">
 379         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 380         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 381       </device>
 382     </family>
 383
 384     <!-- ******************************  Cortex-M4  ****************************** -->
 385     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 386       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 387       <description>
 388 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 389 - simple, easy-to-use programmers model
 390 - highly efficient ultra-low power operation
 391 - excellent code density
 392 - deterministic, high-performance interrupt handling
 393 - upward compatibility with the rest of the Cortex-M processor family.
 394       </description>
 395       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 396       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 397       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 398       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 399
 400       <device Dname="ARMCM4">
 401         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 402         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 403       </device>
 404
 405       <device Dname="ARMCM4_FP">
 406         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 407         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 408       </device>
 409     </family>
 410
 411     <!-- ******************************  Cortex-M7  ****************************** -->
 412     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 413       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 414       <description>
 415 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 416 - simple, easy-to-use programmers model
 417 - highly efficient ultra-low power operation
 418 - excellent code density
 419 - deterministic, high-performance interrupt handling
 420 - upward compatibility with the rest of the Cortex-M processor family.
 421       </description>
 422       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 423       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 424       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 425       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 426
 427       <device Dname="ARMCM7">
 428         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 429         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 430       </device>
 431
 432       <device Dname="ARMCM7_SP">
 433         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 434         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 435       </device>
 436
 437       <device Dname="ARMCM7_DP">
 438         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 439         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 440       </device>
 441     </family>
 442
 443     <!-- ******************************  Cortex-M23  ********************** -->
 444     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 445       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 446       <description>
 447 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 448 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 449 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 450       </description>
 451       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 452       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 453       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 454       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 455       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 456       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 457
 458       <device Dname="ARMCM23">
 459         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 460         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 461       </device>
 462
 463       <device Dname="ARMCM23_TZ">
 464         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 465         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 466       </device>
 467     </family>
 468
 469     <!-- ******************************  Cortex-M33  ****************************** -->
 470     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 471       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 472       <description>
 473 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 474 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 475       </description>
 476       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 477       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 478       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 479       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 480       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 481       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 482
 483       <device Dname="ARMCM33">
 484         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 485         <description>
 486           no DSP Instructions, no Floating Point Unit, no TrustZone
 487         </description>
 488         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 489       </device>
 490
 491       <device Dname="ARMCM33_TZ">
 492         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 493         <description>
 494           no DSP Instructions, no Floating Point Unit, TrustZone
 495         </description>
 496         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 497       </device>
 498
 499       <device Dname="ARMCM33_DSP_FP">
 500         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 501         <description>
 502           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 503         </description>
 504         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 505       </device>
 506
 507       <device Dname="ARMCM33_DSP_FP_TZ">
 508         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 509         <description>
 510           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 511         </description>
 512         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 513       </device>
 514     </family>
 515
 516     <!-- ******************************  Cortex-M35P  ****************************** -->
 517     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 518       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 519       <description>
 520 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 521 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 522       </description>
 523
 524       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 525       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 526       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 527       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 528       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 529       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 530
 531       <device Dname="ARMCM35P">
 532         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 533         <description>
 534           no DSP Instructions, no Floating Point Unit, no TrustZone
 535         </description>
 536         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 537       </device>
 538
 539       <device Dname="ARMCM35P_TZ">
 540         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 541         <description>
 542           no DSP Instructions, no Floating Point Unit, TrustZone
 543         </description>
 544         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 545       </device>
 546
 547       <device Dname="ARMCM35P_DSP_FP">
 548         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 549         <description>
 550           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 551         </description>
 552         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 553       </device>
 554
 555       <device Dname="ARMCM35P_DSP_FP_TZ">
 556         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 557         <description>
 558           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 559         </description>
 560         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 561       </device>
 562     </family>
 563
 564     <!-- ******************************  ARMSC000  ****************************** -->
 565     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 566       <description>
 567 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 568 - simple, easy-to-use programmers model
 569 - highly efficient ultra-low power operation
 570 - excellent code density
 571 - deterministic, high-performance interrupt handling
 572       </description>
 573       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 574       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 575       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 576       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 577
 578       <device Dname="ARMSC000">
 579         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 580         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 581       </device>
 582     </family>
 583
 584     <!-- ******************************  ARMSC300  ****************************** -->
 585     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 586       <description>
 587 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 588 - simple, easy-to-use programmers model
 589 - highly efficient ultra-low power operation
 590 - excellent code density
 591 - deterministic, high-performance interrupt handling
 592       </description>
 593       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 594       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 595       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 596       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 597
 598       <device Dname="ARMSC300">
 599         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 600         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 601       </device>
 602     </family>
 603
 604     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 605     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 606       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 607       <description>
 608 Armv8-M Baseline based device with TrustZone
 609       </description>
 610       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 611       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 612       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 613       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 614       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 615       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 616
 617       <device Dname="ARMv8MBL">
 618         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 619         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 620       </device>
 621     </family>
 622
 623     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 624     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 625       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 626       <description>
 627 Armv8-M Mainline based device with TrustZone
 628       </description>
 629       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 630       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 631       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 632       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 633       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 634       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 635
 636       <device Dname="ARMv8MML">
 637         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 638         <description>
 639           no DSP Instructions, no Floating Point Unit, TrustZone
 640         </description>
 641         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 642       </device>
 643
 644       <device Dname="ARMv8MML_DSP">
 645         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 646         <description>
 647           DSP Instructions, no Floating Point Unit, TrustZone
 648         </description>
 649         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 650       </device>
 651
 652       <device Dname="ARMv8MML_SP">
 653         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 654         <description>
 655           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 656         </description>
 657         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 658       </device>
 659
 660       <device Dname="ARMv8MML_DSP_SP">
 661         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 662         <description>
 663           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 664         </description>
 665         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 666       </device>
 667
 668       <device Dname="ARMv8MML_DP">
 669         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 670         <description>
 671           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 672         </description>
 673         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 674       </device>
 675
 676       <device Dname="ARMv8MML_DSP_DP">
 677         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 678         <description>
 679           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 680         </description>
 681         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 682       </device>
 683     </family>
 684
 685     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 686     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 687       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 688       <description>
 689 Armv8.1-M Mainline based device with TrustZone and MVE
 690       </description>
 691       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 692       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 693       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 694       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 695       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 696       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 697
 698
 699       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 700         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 701         <description>
 702           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 703         </description>
 704         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 705       </device>
 706     </family>
 707
 708     <!-- ******************************  Cortex-A5  ****************************** -->
 709     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 710       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 711       <description>
 712 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 713 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 714 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 715       </description>
 716
 717       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 718       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 719
 720       <device Dname="ARMCA5">
 721         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 722         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 723       </device>
 724     </family>
 725
 726     <!-- ******************************  Cortex-A7  ****************************** -->
 727     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 728       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 729       <description>
 730 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 731 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 732 an optional integrated GIC, and an optional L2 cache controller.
 733       </description>
 734
 735       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 736       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 737
 738       <device Dname="ARMCA7">
 739         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 740         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 741       </device>
 742     </family>
 743
 744     <!-- ******************************  Cortex-A9  ****************************** -->
 745     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 746       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 747       <description>
 748 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 749 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 750 and 8-bit Java bytecodes in Jazelle state.
 751       </description>
 752
 753       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 754       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 755
 756       <device Dname="ARMCA9">
 757         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 758         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 759       </device>
 760     </family>
 761   </devices>
 762
 763
 764   <apis>
 765     <!-- CMSIS Device API -->
 766     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 767       <description>Device interrupt controller interface</description>
 768       <files>
 769         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 770       </files>
 771     </api>
 772     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 773       <description>RTOS Kernel system tick timer interface</description>
 774       <files>
 775         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 776       </files>
 777     </api>
 778     <!-- CMSIS-RTOS API -->
 779     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 780       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 781       <files>
 782         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 783       </files>
 784     </api>
 785     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 786       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 787       <files>
 788         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 789         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 790       </files>
 791     </api>
 792     <!-- CMSIS Driver API -->
 793     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 794       <description>USART Driver API for Cortex-M</description>
 795       <files>
 796         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 797         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 798       </files>
 799     </api>
 800     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 801       <description>SPI Driver API for Cortex-M</description>
 802       <files>
 803         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 804         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 805       </files>
 806     </api>
 807     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 808       <description>SAI Driver API for Cortex-M</description>
 809       <files>
 810         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 811         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 812       </files>
 813     </api>
 814     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 815       <description>I2C Driver API for Cortex-M</description>
 816       <files>
 817         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 818         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 819       </files>
 820     </api>
 821     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 822       <description>CAN Driver API for Cortex-M</description>
 823       <files>
 824         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 825         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 826       </files>
 827     </api>
 828     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 829       <description>Flash Driver API for Cortex-M</description>
 830       <files>
 831         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 832         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 833       </files>
 834     </api>
 835     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 836       <description>MCI Driver API for Cortex-M</description>
 837       <files>
 838         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 839         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 840       </files>
 841     </api>
 842     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 843       <description>NAND Flash Driver API for Cortex-M</description>
 844       <files>
 845         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 846         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 847       </files>
 848     </api>
 849     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 850       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 851       <files>
 852         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 853         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 854         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 855       </files>
 856     </api>
 857     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 858       <description>Ethernet MAC Driver API for Cortex-M</description>
 859       <files>
 860         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 861         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 862       </files>
 863     </api>
 864     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 865       <description>Ethernet PHY Driver API for Cortex-M</description>
 866       <files>
 867         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 868         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 869       </files>
 870     </api>
 871     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 872       <description>USB Device Driver API for Cortex-M</description>
 873       <files>
 874         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 875         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 876       </files>
 877     </api>
 878     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 879       <description>USB Host Driver API for Cortex-M</description>
 880       <files>
 881         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 882         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 883       </files>
 884     </api>
 885     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0-beta" exclusive="0">
 886       <description>WiFi driver</description>
 887       <files>
 888         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 889         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 890       </files>
 891     </api>
 892   </apis>
 893
 894   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 895   <conditions>
 896     <!-- compiler -->
 897     <condition id="ARMCC6">
 898       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 899       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 900     </condition>
 901     <condition id="ARMCC5">
 902       <require Tcompiler="ARMCC" Toptions="AC5"/>
 903     </condition>
 904     <condition id="ARMCC">
 905       <require Tcompiler="ARMCC"/>
 906     </condition>
 907     <condition id="GCC">
 908       <require Tcompiler="GCC"/>
 909     </condition>
 910     <condition id="IAR">
 911       <require Tcompiler="IAR"/>
 912     </condition>
 913     <condition id="ARMCC GCC">
 914       <accept Tcompiler="ARMCC"/>
 915       <accept Tcompiler="GCC"/>
 916     </condition>
 917     <condition id="ARMCC GCC IAR">
 918       <accept Tcompiler="ARMCC"/>
 919       <accept Tcompiler="GCC"/>
 920       <accept Tcompiler="IAR"/>
 921     </condition>
 922
 923     <!-- Arm architecture -->
 924     <condition id="ARMv6-M Device">
 925       <description>Armv6-M architecture based device</description>
 926       <accept Dcore="Cortex-M0"/>
 927       <accept Dcore="Cortex-M1"/>
 928       <accept Dcore="Cortex-M0+"/>
 929       <accept Dcore="SC000"/>
 930     </condition>
 931     <condition id="ARMv7-M Device">
 932       <description>Armv7-M architecture based device</description>
 933       <accept Dcore="Cortex-M3"/>
 934       <accept Dcore="Cortex-M4"/>
 935       <accept Dcore="Cortex-M7"/>
 936       <accept Dcore="SC300"/>
 937     </condition>
 938     <condition id="ARMv8-M Device">
 939       <description>Armv8-M architecture based device</description>
 940       <accept Dcore="ARMV8MBL"/>
 941       <accept Dcore="ARMV8MML"/>
 942       <accept Dcore="ARMV81MML"/>
 943       <accept Dcore="Cortex-M23"/>
 944       <accept Dcore="Cortex-M33"/>
 945       <accept Dcore="Cortex-M35P"/>
 946     </condition>
 947     <condition id="ARMv8-M TZ Device">
 948       <description>Armv8-M architecture based device with TrustZone</description>
 949       <require condition="ARMv8-M Device"/>
 950       <require Dtz="TZ"/>
 951     </condition>
 952     <condition id="ARMv6_7-M Device">
 953       <description>Armv6_7-M architecture based device</description>
 954       <accept condition="ARMv6-M Device"/>
 955       <accept condition="ARMv7-M Device"/>
 956     </condition>
 957     <condition id="ARMv6_7_8-M Device">
 958       <description>Armv6_7_8-M architecture based device</description>
 959       <accept condition="ARMv6-M Device"/>
 960       <accept condition="ARMv7-M Device"/>
 961       <accept condition="ARMv8-M Device"/>
 962     </condition>
 963     <condition id="ARMv7-A Device">
 964       <description>Armv7-A architecture based device</description>
 965       <accept Dcore="Cortex-A5"/>
 966       <accept Dcore="Cortex-A7"/>
 967       <accept Dcore="Cortex-A9"/>
 968     </condition>
 969
 970     <!-- ARM core -->
 971     <condition id="CM0">
 972       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 973       <accept Dcore="Cortex-M0"/>
 974       <accept Dcore="Cortex-M0+"/>
 975       <accept Dcore="SC000"/>
 976     </condition>
 977     <condition id="CM1">
 978       <description>Cortex-M1</description>
 979       <require Dcore="Cortex-M1"/>
 980     </condition>
 981     <condition id="CM3">
 982       <description>Cortex-M3 or SC300 processor based device</description>
 983       <accept Dcore="Cortex-M3"/>
 984       <accept Dcore="SC300"/>
 985     </condition>
 986     <condition id="CM4">
 987       <description>Cortex-M4 processor based device</description>
 988       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 989     </condition>
 990     <condition id="CM4_FP">
 991       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 992       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 993       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 994       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 995     </condition>
 996     <condition id="CM7">
 997       <description>Cortex-M7 processor based device</description>
 998       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 999     </condition>
1000     <condition id="CM7_FP">
1001       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1002       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1003       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1004     </condition>
1005     <condition id="CM7_SP">
1006       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1007       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1008     </condition>
1009     <condition id="CM7_DP">
1010       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1011       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1012     </condition>
1013     <condition id="CM23">
1014       <description>Cortex-M23 processor based device</description>
1015       <require Dcore="Cortex-M23"/>
1016     </condition>
1017     <condition id="CM33">
1018       <description>Cortex-M33 processor based device</description>
1019       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1020     </condition>
1021     <condition id="CM33_FP">
1022       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1023       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1024     </condition>
1025     <condition id="CM35P">
1026       <description>Cortex-M35P processor based device</description>
1027       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1028     </condition>
1029     <condition id="CM35P_FP">
1030       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1031       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1032     </condition>
1033     <condition id="ARMv8MBL">
1034       <description>Armv8-M Baseline processor based device</description>
1035       <require Dcore="ARMV8MBL"/>
1036     </condition>
1037     <condition id="ARMv8MML">
1038       <description>Armv8-M Mainline processor based device</description>
1039       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1040     </condition>
1041     <condition id="ARMv8MML_FP">
1042       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1043       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1044       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1045     </condition>
1046
1047     <condition id="CM33_NODSP_NOFPU">
1048       <description>CM33, no DSP, no FPU</description>
1049       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1050     </condition>
1051     <condition id="CM33_DSP_NOFPU">
1052       <description>CM33, DSP, no FPU</description>
1053       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1054     </condition>
1055     <condition id="CM33_NODSP_SP">
1056       <description>CM33, no DSP, SP FPU</description>
1057       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1058     </condition>
1059     <condition id="CM33_DSP_SP">
1060       <description>CM33, DSP, SP FPU</description>
1061       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1062     </condition>
1063
1064     <condition id="CM35P_NODSP_NOFPU">
1065       <description>CM35P, no DSP, no FPU</description>
1066       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1067     </condition>
1068     <condition id="CM35P_DSP_NOFPU">
1069       <description>CM35P, DSP, no FPU</description>
1070       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1071     </condition>
1072     <condition id="CM35P_NODSP_SP">
1073       <description>CM35P, no DSP, SP FPU</description>
1074       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1075     </condition>
1076     <condition id="CM35P_DSP_SP">
1077       <description>CM35P, DSP, SP FPU</description>
1078       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1079     </condition>
1080
1081     <condition id="ARMv8MML_NODSP_NOFPU">
1082       <description>Armv8-M Mainline, no DSP, no FPU</description>
1083       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1084     </condition>
1085     <condition id="ARMv8MML_DSP_NOFPU">
1086       <description>Armv8-M Mainline, DSP, no FPU</description>
1087       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1088     </condition>
1089     <condition id="ARMv8MML_NODSP_SP">
1090       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1091       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1092     </condition>
1093     <condition id="ARMv8MML_DSP_SP">
1094       <description>Armv8-M Mainline, DSP, SP FPU</description>
1095       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1096     </condition>
1097
1098     <condition id="ARMv81MML">
1099       <description>Armv8.1-M Mainline</description>
1100       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1101     </condition>
1102
1103     <condition id="CA5_CA9">
1104       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1105       <accept Dcore="Cortex-A5"/>
1106       <accept Dcore="Cortex-A9"/>
1107     </condition>
1108
1109     <condition id="CA7">
1110       <description>Cortex-A7 processor based device</description>
1111       <accept Dcore="Cortex-A7"/>
1112     </condition>
1113
1114     <!-- ARMCC compiler -->
1115     <condition id="CA_ARMCC5">
1116       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1117       <require condition="ARMv7-A Device"/>
1118       <require condition="ARMCC5"/>
1119     </condition>
1120     <condition id="CA_ARMCC6">
1121       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1122       <require condition="ARMv7-A Device"/>
1123       <require condition="ARMCC6"/>
1124     </condition>
1125
1126     <condition id="CM0_ARMCC">
1127       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1128       <require condition="CM0"/>
1129       <require Tcompiler="ARMCC"/>
1130     </condition>
1131     <condition id="CM0_LE_ARMCC">
1132       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1133       <require condition="CM0_ARMCC"/>
1134       <require Dendian="Little-endian"/>
1135     </condition>
1136     <condition id="CM0_BE_ARMCC">
1137       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1138       <require condition="CM0_ARMCC"/>
1139       <require Dendian="Big-endian"/>
1140     </condition>
1141
1142     <condition id="CM1_ARMCC">
1143       <description>Cortex-M1 based device for the Arm Compiler</description>
1144       <require condition="CM1"/>
1145       <require Tcompiler="ARMCC"/>
1146     </condition>
1147     <condition id="CM1_LE_ARMCC">
1148       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1149       <require condition="CM1_ARMCC"/>
1150       <require Dendian="Little-endian"/>
1151     </condition>
1152     <condition id="CM1_BE_ARMCC">
1153       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1154       <require condition="CM1_ARMCC"/>
1155       <require Dendian="Big-endian"/>
1156     </condition>
1157
1158     <condition id="CM3_ARMCC">
1159       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1160       <require condition="CM3"/>
1161       <require Tcompiler="ARMCC"/>
1162     </condition>
1163     <condition id="CM3_LE_ARMCC">
1164       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1165       <require condition="CM3_ARMCC"/>
1166       <require Dendian="Little-endian"/>
1167     </condition>
1168     <condition id="CM3_BE_ARMCC">
1169       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1170       <require condition="CM3_ARMCC"/>
1171       <require Dendian="Big-endian"/>
1172     </condition>
1173
1174     <condition id="CM4_ARMCC">
1175       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1176       <require condition="CM4"/>
1177       <require Tcompiler="ARMCC"/>
1178     </condition>
1179     <condition id="CM4_LE_ARMCC">
1180       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1181       <require condition="CM4_ARMCC"/>
1182       <require Dendian="Little-endian"/>
1183     </condition>
1184     <condition id="CM4_BE_ARMCC">
1185       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1186       <require condition="CM4_ARMCC"/>
1187       <require Dendian="Big-endian"/>
1188     </condition>
1189
1190     <condition id="CM4_FP_ARMCC">
1191       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1192       <require condition="CM4_FP"/>
1193       <require Tcompiler="ARMCC"/>
1194     </condition>
1195     <condition id="CM4_FP_LE_ARMCC">
1196       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1197       <require condition="CM4_FP_ARMCC"/>
1198       <require Dendian="Little-endian"/>
1199     </condition>
1200     <condition id="CM4_FP_BE_ARMCC">
1201       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1202       <require condition="CM4_FP_ARMCC"/>
1203       <require Dendian="Big-endian"/>
1204     </condition>
1205
1206     <condition id="CM7_ARMCC">
1207       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1208       <require condition="CM7"/>
1209       <require Tcompiler="ARMCC"/>
1210     </condition>
1211     <condition id="CM7_LE_ARMCC">
1212       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1213       <require condition="CM7_ARMCC"/>
1214       <require Dendian="Little-endian"/>
1215     </condition>
1216     <condition id="CM7_BE_ARMCC">
1217       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1218       <require condition="CM7_ARMCC"/>
1219       <require Dendian="Big-endian"/>
1220     </condition>
1221
1222     <condition id="CM7_FP_ARMCC">
1223       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1224       <require condition="CM7_FP"/>
1225       <require Tcompiler="ARMCC"/>
1226     </condition>
1227     <condition id="CM7_FP_LE_ARMCC">
1228       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1229       <require condition="CM7_FP_ARMCC"/>
1230       <require Dendian="Little-endian"/>
1231     </condition>
1232     <condition id="CM7_FP_BE_ARMCC">
1233       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1234       <require condition="CM7_FP_ARMCC"/>
1235       <require Dendian="Big-endian"/>
1236     </condition>
1237
1238     <condition id="CM7_SP_ARMCC">
1239       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1240       <require condition="CM7_SP"/>
1241       <require Tcompiler="ARMCC"/>
1242     </condition>
1243     <condition id="CM7_SP_LE_ARMCC">
1244       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1245       <require condition="CM7_SP_ARMCC"/>
1246       <require Dendian="Little-endian"/>
1247     </condition>
1248     <condition id="CM7_SP_BE_ARMCC">
1249       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1250       <require condition="CM7_SP_ARMCC"/>
1251       <require Dendian="Big-endian"/>
1252     </condition>
1253
1254     <condition id="CM7_DP_ARMCC">
1255       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1256       <require condition="CM7_DP"/>
1257       <require Tcompiler="ARMCC"/>
1258     </condition>
1259     <condition id="CM7_DP_LE_ARMCC">
1260       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1261       <require condition="CM7_DP_ARMCC"/>
1262       <require Dendian="Little-endian"/>
1263     </condition>
1264     <condition id="CM7_DP_BE_ARMCC">
1265       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1266       <require condition="CM7_DP_ARMCC"/>
1267       <require Dendian="Big-endian"/>
1268     </condition>
1269
1270     <condition id="CM23_ARMCC">
1271       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1272       <require condition="CM23"/>
1273       <require Tcompiler="ARMCC"/>
1274     </condition>
1275     <condition id="CM23_LE_ARMCC">
1276       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1277       <require condition="CM23_ARMCC"/>
1278       <require Dendian="Little-endian"/>
1279     </condition>
1280     <condition id="CM23_BE_ARMCC">
1281       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1282       <require condition="CM23_ARMCC"/>
1283       <require Dendian="Big-endian"/>
1284     </condition>
1285
1286     <condition id="CM33_ARMCC">
1287       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1288       <require condition="CM33"/>
1289       <require Tcompiler="ARMCC"/>
1290     </condition>
1291     <condition id="CM33_LE_ARMCC">
1292       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1293       <require condition="CM33_ARMCC"/>
1294       <require Dendian="Little-endian"/>
1295     </condition>
1296     <condition id="CM33_BE_ARMCC">
1297       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1298       <require condition="CM33_ARMCC"/>
1299       <require Dendian="Big-endian"/>
1300     </condition>
1301
1302     <condition id="CM33_FP_ARMCC">
1303       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1304       <require condition="CM33_FP"/>
1305       <require Tcompiler="ARMCC"/>
1306     </condition>
1307     <condition id="CM33_FP_LE_ARMCC">
1308       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1309       <require condition="CM33_FP_ARMCC"/>
1310       <require Dendian="Little-endian"/>
1311     </condition>
1312     <condition id="CM33_FP_BE_ARMCC">
1313       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1314       <require condition="CM33_FP_ARMCC"/>
1315       <require Dendian="Big-endian"/>
1316     </condition>
1317
1318     <condition id="CM33_NODSP_NOFPU_ARMCC">
1319       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1320       <require condition="CM33_NODSP_NOFPU"/>
1321       <require Tcompiler="ARMCC"/>
1322     </condition>
1323     <condition id="CM33_DSP_NOFPU_ARMCC">
1324       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1325       <require condition="CM33_DSP_NOFPU"/>
1326       <require Tcompiler="ARMCC"/>
1327     </condition>
1328     <condition id="CM33_NODSP_SP_ARMCC">
1329       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1330       <require condition="CM33_NODSP_SP"/>
1331       <require Tcompiler="ARMCC"/>
1332     </condition>
1333     <condition id="CM33_DSP_SP_ARMCC">
1334       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1335       <require condition="CM33_DSP_SP"/>
1336       <require Tcompiler="ARMCC"/>
1337     </condition>
1338     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1339       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1340       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1341       <require Dendian="Little-endian"/>
1342     </condition>
1343     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1344       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1345       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1346       <require Dendian="Little-endian"/>
1347     </condition>
1348     <condition id="CM33_NODSP_SP_LE_ARMCC">
1349       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1350       <require condition="CM33_NODSP_SP_ARMCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="CM33_DSP_SP_LE_ARMCC">
1354       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1355       <require condition="CM33_DSP_SP_ARMCC"/>
1356       <require Dendian="Little-endian"/>
1357     </condition>
1358
1359     <condition id="CM35P_ARMCC">
1360       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1361       <require condition="CM35P"/>
1362       <require Tcompiler="ARMCC"/>
1363     </condition>
1364     <condition id="CM35P_LE_ARMCC">
1365       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1366       <require condition="CM35P_ARMCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="CM35P_BE_ARMCC">
1370       <description>Cortex-M35P processor based device in big endian mode for the Arm Compiler</description>
1371       <require condition="CM35P_ARMCC"/>
1372       <require Dendian="Big-endian"/>
1373     </condition>
1374
1375     <condition id="CM35P_FP_ARMCC">
1376       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1377       <require condition="CM35P_FP"/>
1378       <require Tcompiler="ARMCC"/>
1379     </condition>
1380     <condition id="CM35P_FP_LE_ARMCC">
1381       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1382       <require condition="CM35P_FP_ARMCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385     <condition id="CM35P_FP_BE_ARMCC">
1386       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1387       <require condition="CM35P_FP_ARMCC"/>
1388       <require Dendian="Big-endian"/>
1389     </condition>
1390
1391     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1392       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1393       <require condition="CM35P_NODSP_NOFPU"/>
1394       <require Tcompiler="ARMCC"/>
1395     </condition>
1396     <condition id="CM35P_DSP_NOFPU_ARMCC">
1397       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1398       <require condition="CM35P_DSP_NOFPU"/>
1399       <require Tcompiler="ARMCC"/>
1400     </condition>
1401     <condition id="CM35P_NODSP_SP_ARMCC">
1402       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1403       <require condition="CM35P_NODSP_SP"/>
1404       <require Tcompiler="ARMCC"/>
1405     </condition>
1406     <condition id="CM35P_DSP_SP_ARMCC">
1407       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1408       <require condition="CM35P_DSP_SP"/>
1409       <require Tcompiler="ARMCC"/>
1410     </condition>
1411     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1412       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1413       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1414       <require Dendian="Little-endian"/>
1415     </condition>
1416     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1417       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1418       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1419       <require Dendian="Little-endian"/>
1420     </condition>
1421     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1422       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1423       <require condition="CM35P_NODSP_SP_ARMCC"/>
1424       <require Dendian="Little-endian"/>
1425     </condition>
1426     <condition id="CM35P_DSP_SP_LE_ARMCC">
1427       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1428       <require condition="CM35P_DSP_SP_ARMCC"/>
1429       <require Dendian="Little-endian"/>
1430     </condition>
1431
1432     <condition id="ARMv8MBL_ARMCC">
1433       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1434       <require condition="ARMv8MBL"/>
1435       <require Tcompiler="ARMCC"/>
1436     </condition>
1437     <condition id="ARMv8MBL_LE_ARMCC">
1438       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1439       <require condition="ARMv8MBL_ARMCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442     <condition id="ARMv8MBL_BE_ARMCC">
1443       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1444       <require condition="ARMv8MBL_ARMCC"/>
1445       <require Dendian="Big-endian"/>
1446     </condition>
1447
1448     <condition id="ARMv8MML_ARMCC">
1449       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1450       <require condition="ARMv8MML"/>
1451       <require Tcompiler="ARMCC"/>
1452     </condition>
1453     <condition id="ARMv8MML_LE_ARMCC">
1454       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1455       <require condition="ARMv8MML_ARMCC"/>
1456       <require Dendian="Little-endian"/>
1457     </condition>
1458     <condition id="ARMv8MML_BE_ARMCC">
1459       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1460       <require condition="ARMv8MML_ARMCC"/>
1461       <require Dendian="Big-endian"/>
1462     </condition>
1463
1464     <condition id="ARMv8MML_FP_ARMCC">
1465       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1466       <require condition="ARMv8MML_FP"/>
1467       <require Tcompiler="ARMCC"/>
1468     </condition>
1469     <condition id="ARMv8MML_FP_LE_ARMCC">
1470       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1471       <require condition="ARMv8MML_FP_ARMCC"/>
1472       <require Dendian="Little-endian"/>
1473     </condition>
1474     <condition id="ARMv8MML_FP_BE_ARMCC">
1475       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1476       <require condition="ARMv8MML_FP_ARMCC"/>
1477       <require Dendian="Big-endian"/>
1478     </condition>
1479
1480     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1481       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1482       <require condition="ARMv8MML_NODSP_NOFPU"/>
1483       <require Tcompiler="ARMCC"/>
1484     </condition>
1485     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1486       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1487       <require condition="ARMv8MML_DSP_NOFPU"/>
1488       <require Tcompiler="ARMCC"/>
1489     </condition>
1490     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1491       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1492       <require condition="ARMv8MML_NODSP_SP"/>
1493       <require Tcompiler="ARMCC"/>
1494     </condition>
1495     <condition id="ARMv8MML_DSP_SP_ARMCC">
1496       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1497       <require condition="ARMv8MML_DSP_SP"/>
1498       <require Tcompiler="ARMCC"/>
1499     </condition>
1500     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1501       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1502       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1503       <require Dendian="Little-endian"/>
1504     </condition>
1505     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1506       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1507       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1508       <require Dendian="Little-endian"/>
1509     </condition>
1510     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1511       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1512       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1513       <require Dendian="Little-endian"/>
1514     </condition>
1515     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1516       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1517       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1518       <require Dendian="Little-endian"/>
1519     </condition>
1520
1521     <!-- GCC compiler -->
1522     <condition id="CA_GCC">
1523       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1524       <require condition="ARMv7-A Device"/>
1525       <require Tcompiler="GCC"/>
1526     </condition>
1527
1528     <condition id="CM0_GCC">
1529       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1530       <require condition="CM0"/>
1531       <require Tcompiler="GCC"/>
1532     </condition>
1533     <condition id="CM0_LE_GCC">
1534       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1535       <require condition="CM0_GCC"/>
1536       <require Dendian="Little-endian"/>
1537     </condition>
1538     <condition id="CM0_BE_GCC">
1539       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1540       <require condition="CM0_GCC"/>
1541       <require Dendian="Big-endian"/>
1542     </condition>
1543
1544     <condition id="CM1_GCC">
1545       <description>Cortex-M1 based device for the GCC Compiler</description>
1546       <require condition="CM1"/>
1547       <require Tcompiler="GCC"/>
1548     </condition>
1549     <condition id="CM1_LE_GCC">
1550       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1551       <require condition="CM1_GCC"/>
1552       <require Dendian="Little-endian"/>
1553     </condition>
1554     <condition id="CM1_BE_GCC">
1555       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1556       <require condition="CM1_GCC"/>
1557       <require Dendian="Big-endian"/>
1558     </condition>
1559
1560     <condition id="CM3_GCC">
1561       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1562       <require condition="CM3"/>
1563       <require Tcompiler="GCC"/>
1564     </condition>
1565     <condition id="CM3_LE_GCC">
1566       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1567       <require condition="CM3_GCC"/>
1568       <require Dendian="Little-endian"/>
1569     </condition>
1570     <condition id="CM3_BE_GCC">
1571       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1572       <require condition="CM3_GCC"/>
1573       <require Dendian="Big-endian"/>
1574     </condition>
1575
1576     <condition id="CM4_GCC">
1577       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1578       <require condition="CM4"/>
1579       <require Tcompiler="GCC"/>
1580     </condition>
1581     <condition id="CM4_LE_GCC">
1582       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1583       <require condition="CM4_GCC"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586     <condition id="CM4_BE_GCC">
1587       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1588       <require condition="CM4_GCC"/>
1589       <require Dendian="Big-endian"/>
1590     </condition>
1591
1592     <condition id="CM4_FP_GCC">
1593       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1594       <require condition="CM4_FP"/>
1595       <require Tcompiler="GCC"/>
1596     </condition>
1597     <condition id="CM4_FP_LE_GCC">
1598       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1599       <require condition="CM4_FP_GCC"/>
1600       <require Dendian="Little-endian"/>
1601     </condition>
1602     <condition id="CM4_FP_BE_GCC">
1603       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1604       <require condition="CM4_FP_GCC"/>
1605       <require Dendian="Big-endian"/>
1606     </condition>
1607
1608     <condition id="CM7_GCC">
1609       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1610       <require condition="CM7"/>
1611       <require Tcompiler="GCC"/>
1612     </condition>
1613     <condition id="CM7_LE_GCC">
1614       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1615       <require condition="CM7_GCC"/>
1616       <require Dendian="Little-endian"/>
1617     </condition>
1618     <condition id="CM7_BE_GCC">
1619       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1620       <require condition="CM7_GCC"/>
1621       <require Dendian="Big-endian"/>
1622     </condition>
1623
1624     <condition id="CM7_FP_GCC">
1625       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1626       <require condition="CM7_FP"/>
1627       <require Tcompiler="GCC"/>
1628     </condition>
1629     <condition id="CM7_FP_LE_GCC">
1630       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1631       <require condition="CM7_FP_GCC"/>
1632       <require Dendian="Little-endian"/>
1633     </condition>
1634     <condition id="CM7_FP_BE_GCC">
1635       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1636       <require condition="CM7_FP_GCC"/>
1637       <require Dendian="Big-endian"/>
1638     </condition>
1639
1640     <condition id="CM7_SP_GCC">
1641       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1642       <require condition="CM7_SP"/>
1643       <require Tcompiler="GCC"/>
1644     </condition>
1645     <condition id="CM7_SP_LE_GCC">
1646       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1647       <require condition="CM7_SP_GCC"/>
1648       <require Dendian="Little-endian"/>
1649     </condition>
1650     <condition id="CM7_SP_BE_GCC">
1651       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1652       <require condition="CM7_SP_GCC"/>
1653       <require Dendian="Big-endian"/>
1654     </condition>
1655
1656     <condition id="CM7_DP_GCC">
1657       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1658       <require condition="CM7_DP"/>
1659       <require Tcompiler="GCC"/>
1660     </condition>
1661     <condition id="CM7_DP_LE_GCC">
1662       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1663       <require condition="CM7_DP_GCC"/>
1664       <require Dendian="Little-endian"/>
1665     </condition>
1666     <condition id="CM7_DP_BE_GCC">
1667       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1668       <require condition="CM7_DP_GCC"/>
1669       <require Dendian="Big-endian"/>
1670     </condition>
1671
1672     <condition id="CM23_GCC">
1673       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1674       <require condition="CM23"/>
1675       <require Tcompiler="GCC"/>
1676     </condition>
1677     <condition id="CM23_LE_GCC">
1678       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1679       <require condition="CM23_GCC"/>
1680       <require Dendian="Little-endian"/>
1681     </condition>
1682     <condition id="CM23_BE_GCC">
1683       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1684       <require condition="CM23_GCC"/>
1685       <require Dendian="Big-endian"/>
1686     </condition>
1687
1688     <condition id="CM33_GCC">
1689       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1690       <require condition="CM33"/>
1691       <require Tcompiler="GCC"/>
1692     </condition>
1693     <condition id="CM33_LE_GCC">
1694       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1695       <require condition="CM33_GCC"/>
1696       <require Dendian="Little-endian"/>
1697     </condition>
1698     <condition id="CM33_BE_GCC">
1699       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1700       <require condition="CM33_GCC"/>
1701       <require Dendian="Big-endian"/>
1702     </condition>
1703
1704     <condition id="CM33_FP_GCC">
1705       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1706       <require condition="CM33_FP"/>
1707       <require Tcompiler="GCC"/>
1708     </condition>
1709     <condition id="CM33_FP_LE_GCC">
1710       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1711       <require condition="CM33_FP_GCC"/>
1712       <require Dendian="Little-endian"/>
1713     </condition>
1714     <condition id="CM33_FP_BE_GCC">
1715       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1716       <require condition="CM33_FP_GCC"/>
1717       <require Dendian="Big-endian"/>
1718     </condition>
1719
1720     <condition id="CM33_NODSP_NOFPU_GCC">
1721       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1722       <require condition="CM33_NODSP_NOFPU"/>
1723       <require Tcompiler="GCC"/>
1724     </condition>
1725     <condition id="CM33_DSP_NOFPU_GCC">
1726       <description>CM33, DSP, no FPU, GCC Compiler</description>
1727       <require condition="CM33_DSP_NOFPU"/>
1728       <require Tcompiler="GCC"/>
1729     </condition>
1730     <condition id="CM33_NODSP_SP_GCC">
1731       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1732       <require condition="CM33_NODSP_SP"/>
1733       <require Tcompiler="GCC"/>
1734     </condition>
1735     <condition id="CM33_DSP_SP_GCC">
1736       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1737       <require condition="CM33_DSP_SP"/>
1738       <require Tcompiler="GCC"/>
1739     </condition>
1740     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1741       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1742       <require condition="CM33_NODSP_NOFPU_GCC"/>
1743       <require Dendian="Little-endian"/>
1744     </condition>
1745     <condition id="CM33_DSP_NOFPU_LE_GCC">
1746       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1747       <require condition="CM33_DSP_NOFPU_GCC"/>
1748       <require Dendian="Little-endian"/>
1749     </condition>
1750     <condition id="CM33_NODSP_SP_LE_GCC">
1751       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1752       <require condition="CM33_NODSP_SP_GCC"/>
1753       <require Dendian="Little-endian"/>
1754     </condition>
1755     <condition id="CM33_DSP_SP_LE_GCC">
1756       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1757       <require condition="CM33_DSP_SP_GCC"/>
1758       <require Dendian="Little-endian"/>
1759     </condition>
1760
1761     <condition id="CM35P_GCC">
1762       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1763       <require condition="CM35P"/>
1764       <require Tcompiler="GCC"/>
1765     </condition>
1766     <condition id="CM35P_LE_GCC">
1767       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1768       <require condition="CM35P_GCC"/>
1769       <require Dendian="Little-endian"/>
1770     </condition>
1771     <condition id="CM35P_BE_GCC">
1772       <description>Cortex-M35P processor based device in big endian mode for the GCC Compiler</description>
1773       <require condition="CM35P_GCC"/>
1774       <require Dendian="Big-endian"/>
1775     </condition>
1776
1777     <condition id="CM35P_FP_GCC">
1778       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1779       <require condition="CM35P_FP"/>
1780       <require Tcompiler="GCC"/>
1781     </condition>
1782     <condition id="CM35P_FP_LE_GCC">
1783       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1784       <require condition="CM35P_FP_GCC"/>
1785       <require Dendian="Little-endian"/>
1786     </condition>
1787     <condition id="CM35P_FP_BE_GCC">
1788       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1789       <require condition="CM35P_FP_GCC"/>
1790       <require Dendian="Big-endian"/>
1791     </condition>
1792
1793     <condition id="CM35P_NODSP_NOFPU_GCC">
1794       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1795       <require condition="CM35P_NODSP_NOFPU"/>
1796       <require Tcompiler="GCC"/>
1797     </condition>
1798     <condition id="CM35P_DSP_NOFPU_GCC">
1799       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1800       <require condition="CM35P_DSP_NOFPU"/>
1801       <require Tcompiler="GCC"/>
1802     </condition>
1803     <condition id="CM35P_NODSP_SP_GCC">
1804       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1805       <require condition="CM35P_NODSP_SP"/>
1806       <require Tcompiler="GCC"/>
1807     </condition>
1808     <condition id="CM35P_DSP_SP_GCC">
1809       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1810       <require condition="CM35P_DSP_SP"/>
1811       <require Tcompiler="GCC"/>
1812     </condition>
1813     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1814       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1815       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1816       <require Dendian="Little-endian"/>
1817     </condition>
1818     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1819       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1820       <require condition="CM35P_DSP_NOFPU_GCC"/>
1821       <require Dendian="Little-endian"/>
1822     </condition>
1823     <condition id="CM35P_NODSP_SP_LE_GCC">
1824       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1825       <require condition="CM35P_NODSP_SP_GCC"/>
1826       <require Dendian="Little-endian"/>
1827     </condition>
1828     <condition id="CM35P_DSP_SP_LE_GCC">
1829       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1830       <require condition="CM35P_DSP_SP_GCC"/>
1831       <require Dendian="Little-endian"/>
1832     </condition>
1833
1834     <condition id="ARMv8MBL_GCC">
1835       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1836       <require condition="ARMv8MBL"/>
1837       <require Tcompiler="GCC"/>
1838     </condition>
1839     <condition id="ARMv8MBL_LE_GCC">
1840       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1841       <require condition="ARMv8MBL_GCC"/>
1842       <require Dendian="Little-endian"/>
1843     </condition>
1844     <condition id="ARMv8MBL_BE_GCC">
1845       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1846       <require condition="ARMv8MBL_GCC"/>
1847       <require Dendian="Big-endian"/>
1848     </condition>
1849
1850     <condition id="ARMv8MML_GCC">
1851       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1852       <require condition="ARMv8MML"/>
1853       <require Tcompiler="GCC"/>
1854     </condition>
1855     <condition id="ARMv8MML_LE_GCC">
1856       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1857       <require condition="ARMv8MML_GCC"/>
1858       <require Dendian="Little-endian"/>
1859     </condition>
1860     <condition id="ARMv8MML_BE_GCC">
1861       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1862       <require condition="ARMv8MML_GCC"/>
1863       <require Dendian="Big-endian"/>
1864     </condition>
1865
1866     <condition id="ARMv8MML_FP_GCC">
1867       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1868       <require condition="ARMv8MML_FP"/>
1869       <require Tcompiler="GCC"/>
1870     </condition>
1871     <condition id="ARMv8MML_FP_LE_GCC">
1872       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1873       <require condition="ARMv8MML_FP_GCC"/>
1874       <require Dendian="Little-endian"/>
1875     </condition>
1876     <condition id="ARMv8MML_FP_BE_GCC">
1877       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1878       <require condition="ARMv8MML_FP_GCC"/>
1879       <require Dendian="Big-endian"/>
1880     </condition>
1881
1882     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1883       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1884       <require condition="ARMv8MML_NODSP_NOFPU"/>
1885       <require Tcompiler="GCC"/>
1886     </condition>
1887     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1888       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1889       <require condition="ARMv8MML_DSP_NOFPU"/>
1890       <require Tcompiler="GCC"/>
1891     </condition>
1892     <condition id="ARMv8MML_NODSP_SP_GCC">
1893       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1894       <require condition="ARMv8MML_NODSP_SP"/>
1895       <require Tcompiler="GCC"/>
1896     </condition>
1897     <condition id="ARMv8MML_DSP_SP_GCC">
1898       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1899       <require condition="ARMv8MML_DSP_SP"/>
1900       <require Tcompiler="GCC"/>
1901     </condition>
1902     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1903       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1904       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1905       <require Dendian="Little-endian"/>
1906     </condition>
1907     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1908       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1909       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1910       <require Dendian="Little-endian"/>
1911     </condition>
1912     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1913       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1914       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1915       <require Dendian="Little-endian"/>
1916     </condition>
1917     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1918       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1919       <require condition="ARMv8MML_DSP_SP_GCC"/>
1920       <require Dendian="Little-endian"/>
1921     </condition>
1922
1923     <!-- IAR compiler -->
1924     <condition id="CA_IAR">
1925       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1926       <require condition="ARMv7-A Device"/>
1927       <require Tcompiler="IAR"/>
1928     </condition>
1929
1930     <condition id="CM0_IAR">
1931       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1932       <require condition="CM0"/>
1933       <require Tcompiler="IAR"/>
1934     </condition>
1935     <condition id="CM0_LE_IAR">
1936       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1937       <require condition="CM0_IAR"/>
1938       <require Dendian="Little-endian"/>
1939     </condition>
1940     <condition id="CM0_BE_IAR">
1941       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1942       <require condition="CM0_IAR"/>
1943       <require Dendian="Big-endian"/>
1944     </condition>
1945
1946     <condition id="CM1_IAR">
1947       <description>Cortex-M1 based device for the IAR Compiler</description>
1948       <require condition="CM1"/>
1949       <require Tcompiler="IAR"/>
1950     </condition>
1951     <condition id="CM1_LE_IAR">
1952       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1953       <require condition="CM1_IAR"/>
1954       <require Dendian="Little-endian"/>
1955     </condition>
1956     <condition id="CM1_BE_IAR">
1957       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1958       <require condition="CM1_IAR"/>
1959       <require Dendian="Big-endian"/>
1960     </condition>
1961
1962     <condition id="CM3_IAR">
1963       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1964       <require condition="CM3"/>
1965       <require Tcompiler="IAR"/>
1966     </condition>
1967     <condition id="CM3_LE_IAR">
1968       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1969       <require condition="CM3_IAR"/>
1970       <require Dendian="Little-endian"/>
1971     </condition>
1972     <condition id="CM3_BE_IAR">
1973       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1974       <require condition="CM3_IAR"/>
1975       <require Dendian="Big-endian"/>
1976     </condition>
1977
1978     <condition id="CM4_IAR">
1979       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1980       <require condition="CM4"/>
1981       <require Tcompiler="IAR"/>
1982     </condition>
1983     <condition id="CM4_LE_IAR">
1984       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1985       <require condition="CM4_IAR"/>
1986       <require Dendian="Little-endian"/>
1987     </condition>
1988     <condition id="CM4_BE_IAR">
1989       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1990       <require condition="CM4_IAR"/>
1991       <require Dendian="Big-endian"/>
1992     </condition>
1993
1994     <condition id="CM4_FP_IAR">
1995       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1996       <require condition="CM4_FP"/>
1997       <require Tcompiler="IAR"/>
1998     </condition>
1999     <condition id="CM4_FP_LE_IAR">
2000       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2001       <require condition="CM4_FP_IAR"/>
2002       <require Dendian="Little-endian"/>
2003     </condition>
2004     <condition id="CM4_FP_BE_IAR">
2005       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2006       <require condition="CM4_FP_IAR"/>
2007       <require Dendian="Big-endian"/>
2008     </condition>
2009
2010     <condition id="CM7_IAR">
2011       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2012       <require condition="CM7"/>
2013       <require Tcompiler="IAR"/>
2014     </condition>
2015     <condition id="CM7_LE_IAR">
2016       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2017       <require condition="CM7_IAR"/>
2018       <require Dendian="Little-endian"/>
2019     </condition>
2020     <condition id="CM7_BE_IAR">
2021       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2022       <require condition="CM7_IAR"/>
2023       <require Dendian="Big-endian"/>
2024     </condition>
2025
2026     <condition id="CM7_FP_IAR">
2027       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2028       <require condition="CM7_FP"/>
2029       <require Tcompiler="IAR"/>
2030     </condition>
2031     <condition id="CM7_FP_LE_IAR">
2032       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2033       <require condition="CM7_FP_IAR"/>
2034       <require Dendian="Little-endian"/>
2035     </condition>
2036     <condition id="CM7_FP_BE_IAR">
2037       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2038       <require condition="CM7_FP_IAR"/>
2039       <require Dendian="Big-endian"/>
2040     </condition>
2041
2042     <condition id="CM7_SP_IAR">
2043       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2044       <require condition="CM7_SP"/>
2045       <require Tcompiler="IAR"/>
2046     </condition>
2047     <condition id="CM7_SP_LE_IAR">
2048       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2049       <require condition="CM7_SP_IAR"/>
2050       <require Dendian="Little-endian"/>
2051     </condition>
2052     <condition id="CM7_SP_BE_IAR">
2053       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2054       <require condition="CM7_SP_IAR"/>
2055       <require Dendian="Big-endian"/>
2056     </condition>
2057
2058     <condition id="CM7_DP_IAR">
2059       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2060       <require condition="CM7_DP"/>
2061       <require Tcompiler="IAR"/>
2062     </condition>
2063     <condition id="CM7_DP_LE_IAR">
2064       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2065       <require condition="CM7_DP_IAR"/>
2066       <require Dendian="Little-endian"/>
2067     </condition>
2068     <condition id="CM7_DP_BE_IAR">
2069       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2070       <require condition="CM7_DP_IAR"/>
2071       <require Dendian="Big-endian"/>
2072     </condition>
2073
2074     <condition id="CM23_IAR">
2075       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2076       <require condition="CM23"/>
2077       <require Tcompiler="IAR"/>
2078     </condition>
2079     <condition id="CM23_LE_IAR">
2080       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2081       <require condition="CM23_IAR"/>
2082       <require Dendian="Little-endian"/>
2083     </condition>
2084     <condition id="CM23_BE_IAR">
2085       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
2086       <require condition="CM23_IAR"/>
2087       <require Dendian="Big-endian"/>
2088     </condition>
2089
2090     <condition id="CM33_IAR">
2091       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2092       <require condition="CM33"/>
2093       <require Tcompiler="IAR"/>
2094     </condition>
2095     <condition id="CM33_LE_IAR">
2096       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2097       <require condition="CM33_IAR"/>
2098       <require Dendian="Little-endian"/>
2099     </condition>
2100     <condition id="CM33_BE_IAR">
2101       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
2102       <require condition="CM33_IAR"/>
2103       <require Dendian="Big-endian"/>
2104     </condition>
2105
2106     <condition id="CM33_FP_IAR">
2107       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2108       <require condition="CM33_FP"/>
2109       <require Tcompiler="IAR"/>
2110     </condition>
2111     <condition id="CM33_FP_LE_IAR">
2112       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2113       <require condition="CM33_FP_IAR"/>
2114       <require Dendian="Little-endian"/>
2115     </condition>
2116     <condition id="CM33_FP_BE_IAR">
2117       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2118       <require condition="CM33_FP_IAR"/>
2119       <require Dendian="Big-endian"/>
2120     </condition>
2121
2122     <condition id="CM33_NODSP_NOFPU_IAR">
2123       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2124       <require condition="CM33_NODSP_NOFPU"/>
2125       <require Tcompiler="IAR"/>
2126     </condition>
2127     <condition id="CM33_DSP_NOFPU_IAR">
2128       <description>CM33, DSP, no FPU, IAR Compiler</description>
2129       <require condition="CM33_DSP_NOFPU"/>
2130       <require Tcompiler="IAR"/>
2131     </condition>
2132     <condition id="CM33_NODSP_SP_IAR">
2133       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2134       <require condition="CM33_NODSP_SP"/>
2135       <require Tcompiler="IAR"/>
2136     </condition>
2137     <condition id="CM33_DSP_SP_IAR">
2138       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2139       <require condition="CM33_DSP_SP"/>
2140       <require Tcompiler="IAR"/>
2141     </condition>
2142     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2143       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2144       <require condition="CM33_NODSP_NOFPU_IAR"/>
2145       <require Dendian="Little-endian"/>
2146     </condition>
2147     <condition id="CM33_DSP_NOFPU_LE_IAR">
2148       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2149       <require condition="CM33_DSP_NOFPU_IAR"/>
2150       <require Dendian="Little-endian"/>
2151     </condition>
2152     <condition id="CM33_NODSP_SP_LE_IAR">
2153       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2154       <require condition="CM33_NODSP_SP_IAR"/>
2155       <require Dendian="Little-endian"/>
2156     </condition>
2157     <condition id="CM33_DSP_SP_LE_IAR">
2158       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2159       <require condition="CM33_DSP_SP_IAR"/>
2160       <require Dendian="Little-endian"/>
2161     </condition>
2162
2163     <condition id="CM35P_IAR">
2164       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2165       <require condition="CM35P"/>
2166       <require Tcompiler="IAR"/>
2167     </condition>
2168     <condition id="CM35P_LE_IAR">
2169       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2170       <require condition="CM35P_IAR"/>
2171       <require Dendian="Little-endian"/>
2172     </condition>
2173     <condition id="CM35P_BE_IAR">
2174       <description>Cortex-M35P processor based device in big endian mode for the IAR Compiler</description>
2175       <require condition="CM35P_IAR"/>
2176       <require Dendian="Big-endian"/>
2177     </condition>
2178
2179     <condition id="CM35P_FP_IAR">
2180       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2181       <require condition="CM35P_FP"/>
2182       <require Tcompiler="IAR"/>
2183     </condition>
2184     <condition id="CM35P_FP_LE_IAR">
2185       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2186       <require condition="CM35P_FP_IAR"/>
2187       <require Dendian="Little-endian"/>
2188     </condition>
2189     <condition id="CM35P_FP_BE_IAR">
2190       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2191       <require condition="CM35P_FP_IAR"/>
2192       <require Dendian="Big-endian"/>
2193     </condition>
2194
2195     <condition id="CM35P_NODSP_NOFPU_IAR">
2196       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2197       <require condition="CM35P_NODSP_NOFPU"/>
2198       <require Tcompiler="IAR"/>
2199     </condition>
2200     <condition id="CM35P_DSP_NOFPU_IAR">
2201       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2202       <require condition="CM35P_DSP_NOFPU"/>
2203       <require Tcompiler="IAR"/>
2204     </condition>
2205     <condition id="CM35P_NODSP_SP_IAR">
2206       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2207       <require condition="CM35P_NODSP_SP"/>
2208       <require Tcompiler="IAR"/>
2209     </condition>
2210     <condition id="CM35P_DSP_SP_IAR">
2211       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2212       <require condition="CM35P_DSP_SP"/>
2213       <require Tcompiler="IAR"/>
2214     </condition>
2215     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2216       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2217       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2218       <require Dendian="Little-endian"/>
2219     </condition>
2220     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2221       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2222       <require condition="CM35P_DSP_NOFPU_IAR"/>
2223       <require Dendian="Little-endian"/>
2224     </condition>
2225     <condition id="CM35P_NODSP_SP_LE_IAR">
2226       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2227       <require condition="CM35P_NODSP_SP_IAR"/>
2228       <require Dendian="Little-endian"/>
2229     </condition>
2230     <condition id="CM35P_DSP_SP_LE_IAR">
2231       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2232       <require condition="CM35P_DSP_SP_IAR"/>
2233       <require Dendian="Little-endian"/>
2234     </condition>
2235
2236     <condition id="ARMv8MBL_IAR">
2237       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2238       <require condition="ARMv8MBL"/>
2239       <require Tcompiler="IAR"/>
2240     </condition>
2241     <condition id="ARMv8MBL_LE_IAR">
2242       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2243       <require condition="ARMv8MBL_IAR"/>
2244       <require Dendian="Little-endian"/>
2245     </condition>
2246     <condition id="ARMv8MBL_BE_IAR">
2247       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
2248       <require condition="ARMv8MBL_IAR"/>
2249       <require Dendian="Big-endian"/>
2250     </condition>
2251
2252     <condition id="ARMv8MML_IAR">
2253       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2254       <require condition="ARMv8MML"/>
2255       <require Tcompiler="IAR"/>
2256     </condition>
2257     <condition id="ARMv8MML_LE_IAR">
2258       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2259       <require condition="ARMv8MML_IAR"/>
2260       <require Dendian="Little-endian"/>
2261     </condition>
2262     <condition id="ARMv8MML_BE_IAR">
2263       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
2264       <require condition="ARMv8MML_IAR"/>
2265       <require Dendian="Big-endian"/>
2266     </condition>
2267
2268     <condition id="ARMv8MML_FP_IAR">
2269       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2270       <require condition="ARMv8MML_FP"/>
2271       <require Tcompiler="IAR"/>
2272     </condition>
2273     <condition id="ARMv8MML_FP_LE_IAR">
2274       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2275       <require condition="ARMv8MML_FP_IAR"/>
2276       <require Dendian="Little-endian"/>
2277     </condition>
2278     <condition id="ARMv8MML_FP_BE_IAR">
2279       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2280       <require condition="ARMv8MML_FP_IAR"/>
2281       <require Dendian="Big-endian"/>
2282     </condition>
2283
2284     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2285       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2286       <require condition="ARMv8MML_NODSP_NOFPU"/>
2287       <require Tcompiler="IAR"/>
2288     </condition>
2289     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2290       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2291       <require condition="ARMv8MML_DSP_NOFPU"/>
2292       <require Tcompiler="IAR"/>
2293     </condition>
2294     <condition id="ARMv8MML_NODSP_SP_IAR">
2295       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2296       <require condition="ARMv8MML_NODSP_SP"/>
2297       <require Tcompiler="IAR"/>
2298     </condition>
2299     <condition id="ARMv8MML_DSP_SP_IAR">
2300       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2301       <require condition="ARMv8MML_DSP_SP"/>
2302       <require Tcompiler="IAR"/>
2303     </condition>
2304     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2305       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2306       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2307       <require Dendian="Little-endian"/>
2308     </condition>
2309     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2310       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2311       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2312       <require Dendian="Little-endian"/>
2313     </condition>
2314     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2315       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2316       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2317       <require Dendian="Little-endian"/>
2318     </condition>
2319     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2320       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2321       <require condition="ARMv8MML_DSP_SP_IAR"/>
2322       <require Dendian="Little-endian"/>
2323     </condition>
2324
2325     <!-- conditions selecting single devices and CMSIS Core -->
2326     <!-- used for component startup, GCC version is used for C-Startup -->
2327     <condition id="ARMCM0 CMSIS">
2328       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2329       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2330       <require Cclass="CMSIS" Cgroup="CORE"/>
2331     </condition>
2332     <condition id="ARMCM0 CMSIS GCC">
2333       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
2334       <require condition="ARMCM0 CMSIS"/>
2335       <require condition="GCC"/>
2336     </condition>
2337
2338     <condition id="ARMCM0+ CMSIS">
2339       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2340       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2341       <require Cclass="CMSIS" Cgroup="CORE"/>
2342     </condition>
2343     <condition id="ARMCM0+ CMSIS GCC">
2344       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
2345       <require condition="ARMCM0+ CMSIS"/>
2346       <require condition="GCC"/>
2347     </condition>
2348
2349     <condition id="ARMCM1 CMSIS">
2350       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2351       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2352       <require Cclass="CMSIS" Cgroup="CORE"/>
2353     </condition>
2354     <condition id="ARMCM1 CMSIS GCC">
2355       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
2356       <require condition="ARMCM1 CMSIS"/>
2357       <require condition="GCC"/>
2358     </condition>
2359
2360     <condition id="ARMCM3 CMSIS">
2361       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2362       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2363       <require Cclass="CMSIS" Cgroup="CORE"/>
2364     </condition>
2365     <condition id="ARMCM3 CMSIS GCC">
2366       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2367       <require condition="ARMCM3 CMSIS"/>
2368       <require condition="GCC"/>
2369     </condition>
2370
2371     <condition id="ARMCM4 CMSIS">
2372       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2373       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2374       <require Cclass="CMSIS" Cgroup="CORE"/>
2375     </condition>
2376     <condition id="ARMCM4 CMSIS GCC">
2377       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2378       <require condition="ARMCM4 CMSIS"/>
2379       <require condition="GCC"/>
2380     </condition>
2381
2382     <condition id="ARMCM7 CMSIS">
2383       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2384       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2385       <require Cclass="CMSIS" Cgroup="CORE"/>
2386     </condition>
2387     <condition id="ARMCM7 CMSIS GCC">
2388       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2389       <require condition="ARMCM7 CMSIS"/>
2390       <require condition="GCC"/>
2391     </condition>
2392
2393     <condition id="ARMCM23 CMSIS">
2394       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2395       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2396       <require Cclass="CMSIS" Cgroup="CORE"/>
2397     </condition>
2398     <condition id="ARMCM23 CMSIS GCC">
2399       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2400       <require condition="ARMCM23 CMSIS"/>
2401       <require condition="GCC"/>
2402     </condition>
2403
2404     <condition id="ARMCM33 CMSIS">
2405       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2406       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2407       <require Cclass="CMSIS" Cgroup="CORE"/>
2408     </condition>
2409     <condition id="ARMCM33 CMSIS GCC">
2410       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2411       <require condition="ARMCM33 CMSIS"/>
2412       <require condition="GCC"/>
2413     </condition>
2414
2415     <condition id="ARMCM35P CMSIS">
2416       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2417       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2418       <require Cclass="CMSIS" Cgroup="CORE"/>
2419     </condition>
2420     <condition id="ARMCM35P CMSIS GCC">
2421       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core requiring GCC</description>
2422       <require condition="ARMCM35P CMSIS"/>
2423       <require condition="GCC"/>
2424     </condition>
2425
2426     <condition id="ARMSC000 CMSIS">
2427       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2428       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2429       <require Cclass="CMSIS" Cgroup="CORE"/>
2430     </condition>
2431     <condition id="ARMSC000 CMSIS GCC">
2432       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2433       <require condition="ARMSC000 CMSIS"/>
2434       <require condition="GCC"/>
2435     </condition>
2436
2437     <condition id="ARMSC300 CMSIS">
2438       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2439       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2440       <require Cclass="CMSIS" Cgroup="CORE"/>
2441     </condition>
2442     <condition id="ARMSC300 CMSIS GCC">
2443       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2444       <require condition="ARMSC300 CMSIS"/>
2445       <require condition="GCC"/>
2446     </condition>
2447
2448     <condition id="ARMv8MBL CMSIS">
2449       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2450       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2451       <require Cclass="CMSIS" Cgroup="CORE"/>
2452     </condition>
2453     <condition id="ARMv8MBL CMSIS GCC">
2454       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2455       <require condition="ARMv8MBL CMSIS"/>
2456       <require condition="GCC"/>
2457     </condition>
2458
2459     <condition id="ARMv8MML CMSIS">
2460       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2461       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2462       <require Cclass="CMSIS" Cgroup="CORE"/>
2463     </condition>
2464     <condition id="ARMv8MML CMSIS GCC">
2465       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2466       <require condition="ARMv8MML CMSIS"/>
2467       <require condition="GCC"/>
2468     </condition>
2469
2470     <condition id="ARMv81MML CMSIS">
2471       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2472       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2473       <require Cclass="CMSIS" Cgroup="CORE"/>
2474     </condition>
2475     <condition id="ARMv81MML CMSIS GCC">
2476       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2477       <require condition="ARMv81MML CMSIS"/>
2478       <require condition="GCC"/>
2479     </condition>
2480
2481     <condition id="ARMCA5 CMSIS">
2482       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2483       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2484       <require Cclass="CMSIS" Cgroup="CORE"/>
2485     </condition>
2486
2487     <condition id="ARMCA7 CMSIS">
2488       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2489       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2490       <require Cclass="CMSIS" Cgroup="CORE"/>
2491     </condition>
2492
2493     <condition id="ARMCA9 CMSIS">
2494       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2495       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2496       <require Cclass="CMSIS" Cgroup="CORE"/>
2497     </condition>
2498
2499     <!-- CMSIS DSP -->
2500     <condition id="CMSIS DSP">
2501       <description>Components required for DSP</description>
2502       <require condition="ARMv6_7_8-M Device"/>
2503       <require condition="ARMCC GCC IAR"/>
2504       <require Cclass="CMSIS" Cgroup="CORE"/>
2505     </condition>
2506
2507     <!-- CMSIS NN -->
2508     <condition id="CMSIS NN">
2509       <description>Components required for NN</description>
2510       <require condition="CMSIS DSP"/>
2511     </condition>
2512
2513     <!-- RTOS RTX -->
2514     <condition id="RTOS RTX">
2515       <description>Components required for RTOS RTX</description>
2516       <require condition="ARMv6_7-M Device"/>
2517       <require condition="ARMCC GCC IAR"/>
2518       <require Cclass="Device" Cgroup="Startup"/>
2519       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2520     </condition>
2521     <condition id="RTOS RTX IFX">
2522       <description>Components required for RTOS RTX IFX</description>
2523       <require condition="ARMv6_7-M Device"/>
2524       <require condition="ARMCC GCC IAR"/>
2525       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2526       <require Cclass="Device" Cgroup="Startup"/>
2527       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2528     </condition>
2529     <condition id="RTOS RTX5">
2530       <description>Components required for RTOS RTX5</description>
2531       <require condition="ARMv6_7_8-M Device"/>
2532       <require condition="ARMCC GCC IAR"/>
2533       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2534     </condition>
2535     <condition id="RTOS2 RTX5">
2536       <description>Components required for RTOS2 RTX5</description>
2537       <require condition="ARMv6_7_8-M Device"/>
2538       <require condition="ARMCC GCC IAR"/>
2539       <require Cclass="CMSIS"  Cgroup="CORE"/>
2540       <require Cclass="Device" Cgroup="Startup"/>
2541     </condition>
2542     <condition id="RTOS2 RTX5 v7-A">
2543       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2544       <require condition="ARMv7-A Device"/>
2545       <require condition="ARMCC GCC IAR"/>
2546       <require Cclass="CMSIS"  Cgroup="CORE"/>
2547       <require Cclass="Device" Cgroup="Startup"/>
2548       <require Cclass="Device" Cgroup="OS Tick"/>
2549       <require Cclass="Device" Cgroup="IRQ Controller"/>
2550     </condition>
2551     <condition id="RTOS2 RTX5 Lib">
2552       <description>Components required for RTOS2 RTX5 Library</description>
2553       <require condition="ARMv6_7_8-M Device"/>
2554       <require condition="ARMCC GCC IAR"/>
2555       <require Cclass="CMSIS"  Cgroup="CORE"/>
2556       <require Cclass="Device" Cgroup="Startup"/>
2557     </condition>
2558     <condition id="RTOS2 RTX5 NS">
2559       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2560       <require condition="ARMv8-M TZ Device"/>
2561       <require condition="ARMCC GCC IAR"/>
2562       <require Cclass="CMSIS"  Cgroup="CORE"/>
2563       <require Cclass="Device" Cgroup="Startup"/>
2564     </condition>
2565
2566     <!-- OS Tick -->
2567     <condition id="OS Tick PTIM">
2568       <description>Components required for OS Tick Private Timer</description>
2569       <require condition="CA5_CA9"/>
2570       <require Cclass="Device" Cgroup="IRQ Controller"/>
2571     </condition>
2572
2573     <condition id="OS Tick GTIM">
2574       <description>Components required for OS Tick Generic Physical Timer</description>
2575       <require condition="CA7"/>
2576       <require Cclass="Device" Cgroup="IRQ Controller"/>
2577     </condition>
2578
2579   </conditions>
2580
2581   <components>
2582     <!-- CMSIS-Core component -->
2583     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.2.0"  condition="ARMv6_7_8-M Device" >
2584       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2585       <files>
2586         <!-- CPU independent -->
2587         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2588         <file category="include" name="CMSIS/Core/Include/"/>
2589         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2590         <!-- Code template -->
2591         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2592         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2593       </files>
2594     </component>
2595
2596     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.3"  condition="ARMv7-A Device" >
2597       <description>CMSIS-CORE for Cortex-A</description>
2598       <files>
2599         <!-- CPU independent -->
2600         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2601         <file category="include" name="CMSIS/Core_A/Include/"/>
2602       </files>
2603     </component>
2604
2605     <!-- CMSIS-Startup components -->
2606     <!-- Cortex-M0 -->
2607     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM0 CMSIS">
2608       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2609       <files>
2610         <!-- include folder / device header file -->
2611         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2612         <!-- startup / system file -->
2613         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2614         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.1.0" attr="config" condition="GCC"/>
2615         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2616         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2617         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2618       </files>
2619     </component>
2620     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM0 CMSIS GCC">
2621       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2622       <files>
2623         <!-- include folder / device header file -->
2624         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2625         <!-- startup / system file -->
2626         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.1.0" attr="config" condition="GCC"/>
2627         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2628         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2629       </files>
2630     </component>
2631
2632     <!-- Cortex-M0+ -->
2633     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM0+ CMSIS">
2634       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2635       <files>
2636         <!-- include folder / device header file -->
2637         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2638         <!-- startup / system file -->
2639         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2640         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.1.0" attr="config" condition="GCC"/>
2641         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2642         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2643         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2644       </files>
2645     </component>
2646     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM0+ CMSIS GCC">
2647       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2648       <files>
2649         <!-- include folder / device header file -->
2650         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2651         <!-- startup / system file -->
2652         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.1.0" attr="config" condition="GCC"/>
2653         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2654         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2655       </files>
2656     </component>
2657
2658     <!-- Cortex-M1 -->
2659     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM1 CMSIS">
2660       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2661       <files>
2662         <!-- include folder / device header file -->
2663         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2664         <!-- startup / system file -->
2665         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2666         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.1.0" attr="config" condition="GCC"/>
2667         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2668         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2669         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2670       </files>
2671     </component>
2672     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM1 CMSIS GCC">
2673       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2674       <files>
2675         <!-- include folder / device header file -->
2676         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2677         <!-- startup / system file -->
2678         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.1.0" attr="config" condition="GCC"/>
2679         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2680         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2681       </files>
2682     </component>
2683
2684     <!-- Cortex-M3 -->
2685     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM3 CMSIS">
2686       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2687       <files>
2688         <!-- include folder / device header file -->
2689         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2690         <!-- startup / system file -->
2691         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2692         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.1.0" attr="config" condition="GCC"/>
2693         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2694         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2695         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2696       </files>
2697     </component>
2698     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM3 CMSIS GCC">
2699       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2700       <files>
2701         <!-- include folder / device header file -->
2702         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2703         <!-- startup / system file -->
2704         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.1.0" attr="config" condition="GCC"/>
2705         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2706         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2707       </files>
2708     </component>
2709
2710     <!-- Cortex-M4 -->
2711     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM4 CMSIS">
2712       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2713       <files>
2714         <!-- include folder / device header file -->
2715         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2716         <!-- startup / system file -->
2717         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2718         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.1.0" attr="config" condition="GCC"/>
2719         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2720         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2721         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2722       </files>
2723     </component>
2724     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM4 CMSIS GCC">
2725       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2726       <files>
2727         <!-- include folder / device header file -->
2728         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2729         <!-- startup / system file -->
2730         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.1.0" attr="config" condition="GCC"/>
2731         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2732         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2733       </files>
2734     </component>
2735
2736     <!-- Cortex-M7 -->
2737     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM7 CMSIS">
2738       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2739       <files>
2740         <!-- include folder / device header file -->
2741         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2742         <!-- startup / system file -->
2743         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2744         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.1.0" attr="config" condition="GCC"/>
2745         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2746         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2747         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2748       </files>
2749     </component>
2750     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM7 CMSIS GCC">
2751       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2752       <files>
2753         <!-- include folder / device header file -->
2754         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2755         <!-- startup / system file -->
2756         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.1.0" attr="config" condition="GCC"/>
2757         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2758         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2759       </files>
2760     </component>
2761
2762     <!-- Cortex-M23 -->
2763     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2764       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2765       <files>
2766         <!-- include folder / device header file -->
2767         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2768         <!-- startup / system file -->
2769         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2770         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.1.0" attr="config" condition="GCC"/>
2771         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2772         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2773         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2774         <!-- SAU configuration -->
2775         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2776       </files>
2777     </component>
2778     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2779       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2780       <files>
2781         <!-- include folder / device header file -->
2782         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2783         <!-- startup / system file -->
2784         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.1.0" attr="config" condition="GCC"/>
2785         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2786         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2787         <!-- SAU configuration -->
2788         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2789       </files>
2790     </component>
2791
2792     <!-- Cortex-M33 -->
2793     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2794       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2795       <files>
2796         <!-- include folder / device header file -->
2797         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2798         <!-- startup / system file -->
2799         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2800         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.1.0" attr="config" condition="GCC"/>
2801         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2802         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2803         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2804         <!-- SAU configuration -->
2805         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2806       </files>
2807     </component>
2808     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2809       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2810       <files>
2811         <!-- include folder / device header file -->
2812         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2813         <!-- startup / system file -->
2814         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.1.0" attr="config" condition="GCC"/>
2815         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2816         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2817         <!-- SAU configuration -->
2818         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2819       </files>
2820     </component>
2821
2822     <!-- Cortex-M35P -->
2823     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM35P CMSIS">
2824       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2825       <files>
2826         <!-- include folder / device header file -->
2827         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2828         <!-- startup / system file -->
2829         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2830         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
2831         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2832         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="IAR"/>
2833         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2834         <!-- SAU configuration -->
2835         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2836       </files>
2837     </component>
2838     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM35P CMSIS GCC">
2839       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2840       <files>
2841         <!-- include folder / device header file -->
2842         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2843         <!-- startup / system file -->
2844         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.c"         version="1.0.0" attr="config" condition="GCC"/>
2845         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2846         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2847         <!-- SAU configuration -->
2848         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2849       </files>
2850     </component>
2851
2852     <!-- Cortex-SC000 -->
2853     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMSC000 CMSIS">
2854       <description>System and Startup for Generic Arm SC000 device</description>
2855       <files>
2856         <!-- include folder / device header file -->
2857         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2858         <!-- startup / system file -->
2859         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2860         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.1.0" attr="config" condition="GCC"/>
2861         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2862         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2863         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2864       </files>
2865     </component>
2866     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMSC000 CMSIS GCC">
2867       <description>System and Startup for Generic Arm SC000 device</description>
2868       <files>
2869         <!-- include folder / device header file -->
2870         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2871         <!-- startup / system file -->
2872         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.1.0" attr="config" condition="GCC"/>
2873         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2874         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2875       </files>
2876     </component>
2877
2878     <!-- Cortex-SC300 -->
2879     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMSC300 CMSIS">
2880       <description>System and Startup for Generic Arm SC300 device</description>
2881       <files>
2882         <!-- include folder / device header file -->
2883         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2884         <!-- startup / system file -->
2885         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2886         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.1.0" attr="config" condition="GCC"/>
2887         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2888         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2889         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2890       </files>
2891     </component>
2892     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMSC300 CMSIS GCC">
2893       <description>System and Startup for Generic Arm SC300 device</description>
2894       <files>
2895         <!-- include folder / device header file -->
2896         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2897         <!-- startup / system file -->
2898         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.1.0" attr="config" condition="GCC"/>
2899         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2900         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2901       </files>
2902     </component>
2903
2904     <!-- ARMv8MBL -->
2905     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2906       <description>System and Startup for Generic Armv8-M Baseline device</description>
2907       <files>
2908         <!-- include folder / device header file -->
2909         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2910         <!-- startup / system file -->
2911         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2912         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.1.0" attr="config" condition="GCC"/>
2913         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2914         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2915         <!-- SAU configuration -->
2916         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2917       </files>
2918     </component>
2919     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2920       <description>System and Startup for Generic Armv8-M Baseline device</description>
2921       <files>
2922         <!-- include folder / device header file -->
2923         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2924         <!-- startup / system file -->
2925         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.1.0" attr="config" condition="GCC"/>
2926         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2927         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2928         <!-- SAU configuration -->
2929         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2930       </files>
2931     </component>
2932
2933     <!-- ARMv8MML -->
2934     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2935       <description>System and Startup for Generic Armv8-M Mainline device</description>
2936       <files>
2937         <!-- include folder / device header file -->
2938         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2939         <!-- startup / system file -->
2940         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2941         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.1.0" attr="config" condition="GCC"/>
2942         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2943         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2944         <!-- SAU configuration -->
2945         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2946       </files>
2947     </component>
2948     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2949       <description>System and Startup for Generic Armv8-M Mainline device</description>
2950       <files>
2951         <!-- include folder / device header file -->
2952         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2953         <!-- startup / system file -->
2954         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.1.0" attr="config" condition="GCC"/>
2955         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2956         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2957         <!-- SAU configuration -->
2958         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2959       </files>
2960     </component>
2961
2962     <!-- ARMv81MML -->
2963     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv81MML CMSIS">
2964       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2965       <files>
2966         <!-- include folder / device header file -->
2967         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2968         <!-- startup / system file -->
2969         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="1.1.0" attr="config"/>
2970         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML.sct"               version="1.0.0" attr="config" condition="ARMCC6"/>
2971         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2972         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2973         <!-- SAU configuration -->
2974         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2975       </files>
2976     </component>
2977
2978     <!-- Cortex-A5 -->
2979     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2980       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2981       <files>
2982         <!-- include folder / device header file -->
2983         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2984         <!-- startup / system / mmu files -->
2985         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2986         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2987         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2988         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2989         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2990         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2991         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2992         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2993         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2994         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2995         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2996         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2997
2998       </files>
2999     </component>
3000
3001     <!-- Cortex-A7 -->
3002     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3003       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3004       <files>
3005         <!-- include folder / device header file -->
3006         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3007         <!-- startup / system / mmu files -->
3008         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3009         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3010         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3011         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3012         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3013         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3014         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3015         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3016         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3017         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
3018         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
3019         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
3020       </files>
3021     </component>
3022
3023     <!-- Cortex-A9 -->
3024     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3025       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3026       <files>
3027         <!-- include folder / device header file -->
3028         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3029         <!-- startup / system / mmu files -->
3030         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3031         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3032         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3033         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3034         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3035         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3036         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3037         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3038         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3039         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
3040         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
3041         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
3042       </files>
3043     </component>
3044
3045     <!-- IRQ Controller -->
3046     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3047       <description>IRQ Controller implementation using GIC</description>
3048       <files>
3049         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3050       </files>
3051     </component>
3052
3053     <!-- OS Tick -->
3054     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3055       <description>OS Tick implementation using Private Timer</description>
3056       <files>
3057         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3058       </files>
3059     </component>
3060
3061     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3062       <description>OS Tick implementation using Generic Physical Timer</description>
3063       <files>
3064         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3065       </files>
3066     </component>
3067
3068     <!-- CMSIS-DSP component -->
3069     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.6.0" isDefaultVariant="true" condition="CMSIS DSP">
3070       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3071       <files>
3072         <!-- CPU independent -->
3073         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3074         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3075
3076         <!-- CPU and Compiler dependent -->
3077         <!-- ARMCC -->
3078         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3079         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3080         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3081         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3082         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3083         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3084         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3085         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3086         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3087         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3088         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3089         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3090         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3091         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3092         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3093         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3094
3095         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3096         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3097         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3098         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3099         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3100         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3101         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3102         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3103         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3104         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3105         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3106         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3107         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3108         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3109         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3110         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3111
3112         <!-- GCC -->
3113         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3114         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3115         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3116         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3117         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3118         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3119         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3120         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3121
3122         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3123         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3124         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3125         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3126         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3127         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3128         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3129         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3130         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3131         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3132         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3133         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3134         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3135         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3136         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3137         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3138
3139         <!-- IAR -->
3140         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3141         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3142         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3143         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3144         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3145         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3146         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3147         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3148         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3149         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3150         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3151         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3152         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3153         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3154         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3155         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3156
3157         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3158         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3159         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3160         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3161         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3162         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3163         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3164         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3165         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3166         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3167         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3168         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3169         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3170         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3171         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3172         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3173
3174       </files>
3175     </component>
3176     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.6.0" condition="CMSIS DSP">
3177       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3178       <files>
3179         <!-- CPU independent -->
3180         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3181         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3182
3183         <!-- DSP sources (core) -->
3184         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3185         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3186         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3187         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3188         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3189         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3190         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3191         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3192         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3193         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3194
3195       </files>
3196     </component>
3197
3198     <!-- CMSIS-NN component -->
3199     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
3200       <description>CMSIS-NN Neural Network Library</description>
3201       <files>
3202         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3203         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3204
3205         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3206         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3207         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3208         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3209
3210         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3211         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3212         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3213         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3214         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3215         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3216         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3217         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3218         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3219         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3220         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3221         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3222
3223         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3224         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3225         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3226         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3227         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3228         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3229
3230         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3231         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3232         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3233         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3234         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3235
3236         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3237
3238         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3239         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3240       </files>
3241     </component>
3242
3243     <!-- CMSIS-RTOS Keil RTX component -->
3244     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3245       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3246       <RTE_Components_h>
3247         <!-- the following content goes into file 'RTE_Components.h' -->
3248         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3249         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3250       </RTE_Components_h>
3251       <files>
3252         <!-- CPU independent -->
3253         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3254         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3255         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3256
3257         <!-- RTX templates -->
3258         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3259         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3260         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3261         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3262         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3263         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3264         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3265         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3266         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3267         <!-- tool-chain specific template file -->
3268         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3269         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3270         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3271
3272         <!-- CPU and Compiler dependent -->
3273         <!-- ARMCC -->
3274         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3275         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3276         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3277         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3278         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3279         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3280         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3281         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3282         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3283         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3284         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3285         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3286         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3287         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3288         <!-- GCC -->
3289         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3290         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3291         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3292         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3293         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3294         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3295         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3296         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3297         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3298         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3299         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3300         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3301         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3302         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3303         <!-- IAR -->
3304         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3305         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3306         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3307         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3308         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3309         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3310         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3311         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3312         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3313         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3314         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3315         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3316         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3317         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3318       </files>
3319     </component>
3320     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3321     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3322       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3323       <RTE_Components_h>
3324         <!-- the following content goes into file 'RTE_Components.h' -->
3325         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3326         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3327       </RTE_Components_h>
3328       <files>
3329         <!-- CPU independent -->
3330         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3331         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3332         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3333
3334         <!-- RTX templates -->
3335         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3336         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3337         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3338         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3339         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3340         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3341         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3342         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3343         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3344         <!-- tool-chain specific template file -->
3345         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3346         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3347         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3348
3349         <!-- CPU and Compiler dependent -->
3350         <!-- ARMCC -->
3351         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3352         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3353         <!-- GCC -->
3354         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3355         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3356         <!-- IAR -->
3357       </files>
3358     </component>
3359
3360     <!-- CMSIS-RTOS Keil RTX5 component -->
3361     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.1" Capiversion="1.0.0" condition="RTOS RTX5">
3362       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3363       <RTE_Components_h>
3364         <!-- the following content goes into file 'RTE_Components.h' -->
3365         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3366         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3367       </RTE_Components_h>
3368       <files>
3369         <!-- RTX header file -->
3370         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3371         <!-- RTX compatibility module for API V1 -->
3372         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3373       </files>
3374     </component>
3375
3376     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3377     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3378       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3379       <RTE_Components_h>
3380         <!-- the following content goes into file 'RTE_Components.h' -->
3381         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3382         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3383       </RTE_Components_h>
3384       <files>
3385         <!-- RTX documentation -->
3386         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3387
3388         <!-- RTX header files -->
3389         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3390
3391         <!-- RTX configuration -->
3392         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3393         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3394
3395         <!-- RTX templates -->
3396         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3397         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3398         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3399         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3400         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3401         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3402         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3403         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3404         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3405         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3406
3407         <!-- RTX library configuration -->
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3409
3410         <!-- RTX libraries (CPU and Compiler dependent) -->
3411         <!-- ARMCC -->
3412         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3413         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3414         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3415         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3416         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3417         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3418         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3419         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3420         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3421         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3422         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3423         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3424         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3425         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3426         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3427         <!-- GCC -->
3428         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3429         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3430         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3431         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3432         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3434         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3435         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3436         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3437         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3438         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3439         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3440         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3441         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3442         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3443         <!-- IAR -->
3444         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3445         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3446         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3447         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3448         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3449         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3450         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3451         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3452         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3453         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3454         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3455         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3456         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3457         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3459       </files>
3460     </component>
3461     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3462       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3463       <RTE_Components_h>
3464         <!-- the following content goes into file 'RTE_Components.h' -->
3465         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3466         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3467         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3468       </RTE_Components_h>
3469       <files>
3470         <!-- RTX documentation -->
3471         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3472
3473         <!-- RTX header files -->
3474         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3475
3476         <!-- RTX configuration -->
3477         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3478         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3479
3480         <!-- RTX templates -->
3481         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3482         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3483         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3484         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3485         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3486         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3487         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3488         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3489         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3490         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3491
3492         <!-- RTX library configuration -->
3493         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3494
3495         <!-- RTX libraries (CPU and Compiler dependent) -->
3496         <!-- ARMCC -->
3497         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3498         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3499         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3500         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3502         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3503         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3504         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3505         <!-- GCC -->
3506         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3508         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3509         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3514         <!-- IAR -->
3515         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3523       </files>
3524     </component>
3525     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5">
3526       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3527       <RTE_Components_h>
3528         <!-- the following content goes into file 'RTE_Components.h' -->
3529         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3530         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3531         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3532       </RTE_Components_h>
3533       <files>
3534         <!-- RTX documentation -->
3535         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3536
3537         <!-- RTX header files -->
3538         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3539
3540         <!-- RTX configuration -->
3541         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3542         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3543
3544         <!-- RTX templates -->
3545         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3546         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3547         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3548         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3549         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3550         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3551         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3552         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3553         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3554         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3555
3556         <!-- RTX sources (core) -->
3557         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3558         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3559         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3560         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3561         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3562         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3563         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3569         <!-- RTX sources (library configuration) -->
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3571         <!-- RTX sources (handlers ARMCC) -->
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3587         <!-- RTX sources (handlers GCC) -->
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3603         <!-- RTX sources (handlers IAR) -->
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3612         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3614         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3619         <!-- OS Tick (SysTick) -->
3620         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3621       </files>
3622     </component>
3623     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3624       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3625       <RTE_Components_h>
3626         <!-- the following content goes into file 'RTE_Components.h' -->
3627         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3628         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3629         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3630       </RTE_Components_h>
3631       <files>
3632         <!-- RTX documentation -->
3633         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3634
3635         <!-- RTX header files -->
3636         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3637
3638         <!-- RTX configuration -->
3639         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3640         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3641
3642         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3643
3644         <!-- RTX templates -->
3645         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3646         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3647         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3648         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3649         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3650         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3651         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3652         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3653         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3654         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3655
3656         <!-- RTX sources (core) -->
3657         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3658         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3659         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3661         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3663         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3669         <!-- RTX sources (library configuration) -->
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3671         <!-- RTX sources (handlers ARMCC) -->
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3674         <!-- RTX sources (handlers GCC) -->
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3676         <!-- RTX sources (handlers IAR) -->
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3678       </files>
3679     </component>
3680     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3681       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3682       <RTE_Components_h>
3683         <!-- the following content goes into file 'RTE_Components.h' -->
3684         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3685         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3686         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3687         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3688       </RTE_Components_h>
3689       <files>
3690         <!-- RTX documentation -->
3691         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3692
3693         <!-- RTX header files -->
3694         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3695
3696         <!-- RTX configuration -->
3697         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3698         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3699
3700         <!-- RTX templates -->
3701         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3702         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3703         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3704         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3705         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3706         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3707         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3708         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3709         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3710         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3711
3712         <!-- RTX sources (core) -->
3713         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3714         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3715         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3716         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3717         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3718         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3719         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3720         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3721         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3725         <!-- RTX sources (library configuration) -->
3726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3727         <!-- RTX sources (ARMCC handlers) -->
3728         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3729         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3730         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3731         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3732         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3734         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3736         <!-- RTX sources (GCC handlers) -->
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3738         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3739         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3745         <!-- RTX sources (IAR handlers) -->
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3754         <!-- OS Tick (SysTick) -->
3755         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3756       </files>
3757     </component>
3758
3759     <!-- CMSIS-Driver Custom components -->
3760     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3761       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3762       <files>
3763         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3764         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3765       </files>
3766     </component>
3767     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3768       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3769       <files>
3770         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3771         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3772       </files>
3773     </component>
3774     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3775       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3776       <files>
3777         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3778         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3779       </files>
3780     </component>
3781     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3782       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3783       <files>
3784         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3785         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3786       </files>
3787     </component>
3788     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3789       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3790       <files>
3791         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3792         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3793       </files>
3794     </component>
3795     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3796       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3797       <files>
3798         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3799         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3800       </files>
3801     </component>
3802     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3803       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3804       <files>
3805         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3806         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3807       </files>
3808     </component>
3809     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3810       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3811       <files>
3812         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3813         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3814       </files>
3815     </component>
3816     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3817       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3818       <files>
3819         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3820         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3821         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3822         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3823       </files>
3824     </component>
3825     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3826       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3827       <files>
3828         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3829         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3830       </files>
3831     </component>
3832     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3833       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3834       <files>
3835         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3836         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3837       </files>
3838     </component>
3839     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3840       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3841       <files>
3842         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3843         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3844       </files>
3845     </component>
3846     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3847       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3848       <files>
3849         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3850         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3851       </files>
3852     </component>
3853     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0-beta" Capiversion="1.0.0-beta">
3854       <description>Access to #include Driver_WiFi.h file</description>
3855       <files>
3856         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3857         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3858       </files>
3859     </component>
3860   </components>
3861
3862   <boards>
3863     <board name="uVision Simulator" vendor="Keil">
3864       <description>uVision Simulator</description>
3865       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3866       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3867       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3868       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3869       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3870       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3871       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3872       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3873       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3874       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3875       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3876       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3877       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3878       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3883       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3884       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3885       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3886       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3887       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3889     </board>
3890
3891     <board name="EWARM Simulator" vendor="IAR">
3892       <description>EWARM Simulator</description>
3893       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3894       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3895       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3896       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3897       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3898       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3899       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3900       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3901       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3902       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3904       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3905       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3906       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3907       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3908       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3911       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3912       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3913       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3914       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3915       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3916       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3917     </board>
3918   </boards>
3919
3920   <examples>
3921     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3922       <description>DSP_Lib Class Marks example</description>
3923       <board name="uVision Simulator" vendor="Keil"/>
3924       <project>
3925         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3926       </project>
3927       <attributes>
3928         <component Cclass="CMSIS" Cgroup="CORE"/>
3929         <component Cclass="CMSIS" Cgroup="DSP"/>
3930         <component Cclass="Device" Cgroup="Startup"/>
3931         <category>Getting Started</category>
3932       </attributes>
3933     </example>
3934
3935     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3936       <description>DSP_Lib Convolution example</description>
3937       <board name="uVision Simulator" vendor="Keil"/>
3938       <project>
3939         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3940       </project>
3941       <attributes>
3942         <component Cclass="CMSIS" Cgroup="CORE"/>
3943         <component Cclass="CMSIS" Cgroup="DSP"/>
3944         <component Cclass="Device" Cgroup="Startup"/>
3945         <category>Getting Started</category>
3946       </attributes>
3947     </example>
3948
3949     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3950       <description>DSP_Lib Dotproduct example</description>
3951       <board name="uVision Simulator" vendor="Keil"/>
3952       <project>
3953         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3954       </project>
3955       <attributes>
3956         <component Cclass="CMSIS" Cgroup="CORE"/>
3957         <component Cclass="CMSIS" Cgroup="DSP"/>
3958         <component Cclass="Device" Cgroup="Startup"/>
3959         <category>Getting Started</category>
3960       </attributes>
3961     </example>
3962
3963     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3964       <description>DSP_Lib FFT Bin example</description>
3965       <board name="uVision Simulator" vendor="Keil"/>
3966       <project>
3967         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3968       </project>
3969       <attributes>
3970         <component Cclass="CMSIS" Cgroup="CORE"/>
3971         <component Cclass="CMSIS" Cgroup="DSP"/>
3972         <component Cclass="Device" Cgroup="Startup"/>
3973         <category>Getting Started</category>
3974       </attributes>
3975     </example>
3976
3977     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3978       <description>DSP_Lib FIR example</description>
3979       <board name="uVision Simulator" vendor="Keil"/>
3980       <project>
3981         <environment name="uv" load="arm_fir_example.uvprojx"/>
3982       </project>
3983       <attributes>
3984         <component Cclass="CMSIS" Cgroup="CORE"/>
3985         <component Cclass="CMSIS" Cgroup="DSP"/>
3986         <component Cclass="Device" Cgroup="Startup"/>
3987         <category>Getting Started</category>
3988       </attributes>
3989     </example>
3990
3991     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3992       <description>DSP_Lib Graphic Equalizer example</description>
3993       <board name="uVision Simulator" vendor="Keil"/>
3994       <project>
3995         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3996       </project>
3997       <attributes>
3998         <component Cclass="CMSIS" Cgroup="CORE"/>
3999         <component Cclass="CMSIS" Cgroup="DSP"/>
4000         <component Cclass="Device" Cgroup="Startup"/>
4001         <category>Getting Started</category>
4002       </attributes>
4003     </example>
4004
4005     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4006       <description>DSP_Lib Linear Interpolation example</description>
4007       <board name="uVision Simulator" vendor="Keil"/>
4008       <project>
4009         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4010       </project>
4011       <attributes>
4012         <component Cclass="CMSIS" Cgroup="CORE"/>
4013         <component Cclass="CMSIS" Cgroup="DSP"/>
4014         <component Cclass="Device" Cgroup="Startup"/>
4015         <category>Getting Started</category>
4016       </attributes>
4017     </example>
4018
4019     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4020       <description>DSP_Lib Matrix example</description>
4021       <board name="uVision Simulator" vendor="Keil"/>
4022       <project>
4023         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4024       </project>
4025       <attributes>
4026         <component Cclass="CMSIS" Cgroup="CORE"/>
4027         <component Cclass="CMSIS" Cgroup="DSP"/>
4028         <component Cclass="Device" Cgroup="Startup"/>
4029         <category>Getting Started</category>
4030       </attributes>
4031     </example>
4032
4033     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4034       <description>DSP_Lib Signal Convergence example</description>
4035       <board name="uVision Simulator" vendor="Keil"/>
4036       <project>
4037         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4038       </project>
4039       <attributes>
4040         <component Cclass="CMSIS" Cgroup="CORE"/>
4041         <component Cclass="CMSIS" Cgroup="DSP"/>
4042         <component Cclass="Device" Cgroup="Startup"/>
4043         <category>Getting Started</category>
4044       </attributes>
4045     </example>
4046
4047     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4048       <description>DSP_Lib Sinus/Cosinus example</description>
4049       <board name="uVision Simulator" vendor="Keil"/>
4050       <project>
4051         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4052       </project>
4053       <attributes>
4054         <component Cclass="CMSIS" Cgroup="CORE"/>
4055         <component Cclass="CMSIS" Cgroup="DSP"/>
4056         <component Cclass="Device" Cgroup="Startup"/>
4057         <category>Getting Started</category>
4058       </attributes>
4059     </example>
4060
4061     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4062       <description>DSP_Lib Variance example</description>
4063       <board name="uVision Simulator" vendor="Keil"/>
4064       <project>
4065         <environment name="uv" load="arm_variance_example.uvprojx"/>
4066       </project>
4067       <attributes>
4068         <component Cclass="CMSIS" Cgroup="CORE"/>
4069         <component Cclass="CMSIS" Cgroup="DSP"/>
4070         <component Cclass="Device" Cgroup="Startup"/>
4071         <category>Getting Started</category>
4072       </attributes>
4073     </example>
4074
4075     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4076       <description>Neural Network CIFAR10 example</description>
4077       <board name="uVision Simulator" vendor="Keil"/>
4078       <project>
4079         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4080       </project>
4081       <attributes>
4082         <component Cclass="CMSIS" Cgroup="CORE"/>
4083         <component Cclass="CMSIS" Cgroup="DSP"/>
4084         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4085         <component Cclass="Device" Cgroup="Startup"/>
4086         <category>Getting Started</category>
4087       </attributes>
4088     </example>
4089
4090     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4091       <description>Neural Network CIFAR10 example</description>
4092       <board name="EWARM Simulator" vendor="IAR"/>
4093       <project>
4094         <environment name="iar" load="NN-example-cifar10.ewp"/>
4095       </project>
4096       <attributes>
4097         <component Cclass="CMSIS" Cgroup="CORE"/>
4098         <component Cclass="CMSIS" Cgroup="DSP"/>
4099         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4100         <component Cclass="Device" Cgroup="Startup"/>
4101         <category>Getting Started</category>
4102       </attributes>
4103     </example>
4104
4105     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4106       <description>Neural Network GRU example</description>
4107       <board name="uVision Simulator" vendor="Keil"/>
4108       <project>
4109         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4110       </project>
4111       <attributes>
4112         <component Cclass="CMSIS" Cgroup="CORE"/>
4113         <component Cclass="CMSIS" Cgroup="DSP"/>
4114         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4115         <component Cclass="Device" Cgroup="Startup"/>
4116         <category>Getting Started</category>
4117       </attributes>
4118     </example>
4119
4120     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4121       <description>Neural Network GRU example</description>
4122       <board name="EWARM Simulator" vendor="IAR"/>
4123       <project>
4124         <environment name="iar" load="NN-example-gru.ewp"/>
4125       </project>
4126       <attributes>
4127         <component Cclass="CMSIS" Cgroup="CORE"/>
4128         <component Cclass="CMSIS" Cgroup="DSP"/>
4129         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4130         <component Cclass="Device" Cgroup="Startup"/>
4131         <category>Getting Started</category>
4132       </attributes>
4133     </example>
4134
4135     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4136       <description>CMSIS-RTOS2 Blinky example</description>
4137       <board name="uVision Simulator" vendor="Keil"/>
4138       <project>
4139         <environment name="uv" load="Blinky.uvprojx"/>
4140       </project>
4141       <attributes>
4142         <component Cclass="CMSIS" Cgroup="CORE"/>
4143         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4144         <component Cclass="Device" Cgroup="Startup"/>
4145         <category>Getting Started</category>
4146       </attributes>
4147     </example>
4148
4149     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4150       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4151       <board name="uVision Simulator" vendor="Keil"/>
4152       <project>
4153         <environment name="uv" load="Blinky.uvprojx"/>
4154       </project>
4155       <attributes>
4156         <component Cclass="CMSIS" Cgroup="CORE"/>
4157         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4158         <component Cclass="Device" Cgroup="Startup"/>
4159         <category>Getting Started</category>
4160       </attributes>
4161     </example>
4162
4163     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4164       <description>CMSIS-RTOS2 Message Queue Example</description>
4165       <board name="uVision Simulator" vendor="Keil"/>
4166       <project>
4167         <environment name="uv" load="MsqQueue.uvprojx"/>
4168       </project>
4169       <attributes>
4170         <component Cclass="CMSIS" Cgroup="CORE"/>
4171         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4172         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4173         <component Cclass="Device" Cgroup="Startup"/>
4174         <category>Getting Started</category>
4175       </attributes>
4176     </example>
4177
4178     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4179       <description>CMSIS-RTOS2 Memory Pool Example</description>
4180       <board name="uVision Simulator" vendor="Keil"/>
4181       <project>
4182         <environment name="uv" load="MemPool.uvprojx"/>
4183       </project>
4184       <attributes>
4185         <component Cclass="CMSIS" Cgroup="CORE"/>
4186         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4187         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4188         <component Cclass="Device" Cgroup="Startup"/>
4189         <category>Getting Started</category>
4190       </attributes>
4191     </example>
4192
4193     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4194       <description>Bare-metal secure/non-secure example without RTOS</description>
4195       <board name="uVision Simulator" vendor="Keil"/>
4196       <project>
4197         <environment name="uv" load="NoRTOS.uvmpw"/>
4198       </project>
4199       <attributes>
4200         <component Cclass="CMSIS" Cgroup="CORE"/>
4201         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4202         <component Cclass="Device" Cgroup="Startup"/>
4203         <category>Getting Started</category>
4204       </attributes>
4205     </example>
4206
4207     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4208       <description>Secure/non-secure RTOS example with thread context management</description>
4209       <board name="uVision Simulator" vendor="Keil"/>
4210       <project>
4211         <environment name="uv" load="RTOS.uvmpw"/>
4212       </project>
4213       <attributes>
4214         <component Cclass="CMSIS" Cgroup="CORE"/>
4215         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4216         <component Cclass="Device" Cgroup="Startup"/>
4217         <category>Getting Started</category>
4218       </attributes>
4219     </example>
4220
4221     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4222       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4223       <board name="uVision Simulator" vendor="Keil"/>
4224       <project>
4225         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4226       </project>
4227       <attributes>
4228         <component Cclass="CMSIS" Cgroup="CORE"/>
4229         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4230         <component Cclass="Device" Cgroup="Startup"/>
4231         <category>Getting Started</category>
4232       </attributes>
4233     </example>
4234
4235   </examples>
4236
4237 </package>