]> begriffs open source - freertos/blob - portable/IAR/ARM_CM33/secure/secure_context_port_asm.s
Remove "1 tab == 4 spaces!" line from files that still contain it.
[freertos] / portable / IAR / ARM_CM33 / secure / secure_context_port_asm.s
1 /*\r
2  * FreeRTOS Kernel <DEVELOPMENT BRANCH>\r
3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
4  *\r
5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
6  * this software and associated documentation files (the "Software"), to deal in\r
7  * the Software without restriction, including without limitation the rights to\r
8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
10  * subject to the following conditions:\r
11  *\r
12  * The above copyright notice and this permission notice shall be included in all\r
13  * copies or substantial portions of the Software.\r
14  *\r
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
21  *\r
22  * https://www.FreeRTOS.org\r
23  * https://github.com/FreeRTOS\r
24  *\r
25  */\r
26 \r
27         SECTION .text:CODE:NOROOT(2)\r
28         THUMB\r
29 \r
30         PUBLIC SecureContext_LoadContextAsm\r
31         PUBLIC SecureContext_SaveContextAsm\r
32 /*-----------------------------------------------------------*/\r
33 \r
34 SecureContext_LoadContextAsm:\r
35         /* xSecureContextHandle value is in r0. */\r
36         mrs r1, ipsr                                                    /* r1 = IPSR. */\r
37         cbz r1, load_ctx_therad_mode                    /* Do nothing if the processor is running in the Thread Mode. */\r
38         ldmia r0!, {r1, r2}                                             /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */\r
39 #if ( configENABLE_MPU == 1 )\r
40         ldmia r1!, {r3}                                                 /* Read CONTROL register value from task's stack. r3 = CONTROL. */\r
41         msr control, r3                                                 /* CONTROL = r3. */\r
42 #endif /* configENABLE_MPU */\r
43         msr psplim, r2                                                  /* PSPLIM = r2. */\r
44         msr psp, r1                                                             /* PSP = r1. */\r
45 \r
46         load_ctx_therad_mode:\r
47                 bx lr\r
48 /*-----------------------------------------------------------*/\r
49 \r
50 SecureContext_SaveContextAsm:\r
51         /* xSecureContextHandle value is in r0. */\r
52         mrs r1, ipsr                                                    /* r1 = IPSR. */\r
53         cbz r1, save_ctx_therad_mode                    /* Do nothing if the processor is running in the Thread Mode. */\r
54         mrs r1, psp                                                             /* r1 = PSP. */\r
55 #if ( configENABLE_FPU == 1 )\r
56         vstmdb r1!, {s0}                                                /* Trigger the defferred stacking of FPU registers. */\r
57         vldmia r1!, {s0}                                                /* Nullify the effect of the pervious statement. */\r
58 #endif /* configENABLE_FPU */\r
59 #if ( configENABLE_MPU == 1 )\r
60         mrs r2, control                                                 /* r2 = CONTROL. */\r
61         stmdb r1!, {r2}                                                 /* Store CONTROL value on the stack. */\r
62 #endif /* configENABLE_MPU */\r
63         str r1, [r0]                                                    /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */\r
64         movs r1, #0                                                             /* r1 = securecontextNO_STACK. */\r
65         msr psplim, r1                                                  /* PSPLIM = securecontextNO_STACK. */\r
66         msr psp, r1                                                             /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */\r
67 \r
68         save_ctx_therad_mode:\r
69                 bx lr\r
70 /*-----------------------------------------------------------*/\r
71 \r
72         END\r