Make debugging command work

[meson-cross] / armv7m / gdb.conf.in

tar ext :3333
set remote hardware-breakpoint-limit @CROSS_NUM_BREAKPOINTS@
set remote hardware-watchpoint-limit @CROSS_NUM_WATCHPOINTS@
monitor arm semihosting enable

echo Loading ARMv7M GDB macros.\n

define reset_halt
        mon reset halt
        load
        mon gdb_sync
        stepi
        info thr
end

define faultstate
        set $icsr  = *(unsigned *)0xe000ed04
        set $vect  = $icsr & 0x1ff
        set $pend  = ($icsr & 0x1ff000) >> 12
        set $shcsr = *(unsigned *)0xe000ed24
        set $cfsr  = *(unsigned *)0xe000ed28
        set $mmfsr = $cfsr & 0xff
        set $bfsr  = ($cfsr >> 8) & 0xff
        set $ufsr  = ($cfsr >> 16) & 0xffff
        set $hfsr  = *(unsigned *)0xe000ed2c
        set $bfar  = *(unsigned *)0xe000ed38
        set $mmfar = *(unsigned *)0xe000ed34

        if $vect < 15

                if $hfsr != 0
                        printf "HardFault:"
                        if $hfsr & (1<<1)
                                printf " due to vector table read fault\n"
                        end
                        if $hfsr & (1<<30)
                                printf " forced due to escalated or disabled configurable fault (see below)\n"
                        end
                        if $hfsr & (1<<31)
                                printf " due to an unexpected debug event\n"
                        end
                end
                if $mmfsr != 0
                        printf "MemManage:"
                        if $mmfsr & (1<<5)
                                printf " during lazy FP state save"
                        end
                        if $mmfsr & (1<<4)
                                printf " during exception entry"
                        end
                        if $mmfsr & (1<<3)
                                printf " during exception return"
                        end
                        if $mmfsr & (1<<1)
                                printf " during data access"
                        end
                        if $mmfsr & (1<<0)
                                printf " during instruction prefetch"
                        end
                        if $mmfsr & (1<<7)
                                printf " accessing 0x%08x", $mmfar
                        end
                        printf "\n"
                end
                if $bfsr != 0
                        printf "BusFault:"
                        if $bfsr & (1<<2)
                                printf " (imprecise)"
                        end
                        if $bfsr & (1<<1)
                                printf " (precise)"
                        end
                        if $bfsr & (1<<5)
                                printf " during lazy FP state save"
                        end
                        if $bfsr & (1<<4)
                                printf " during exception entry"
                        end
                        if $bfsr & (1<<3)
                                printf " during exception return"
                        end
                        if $bfsr & (1<<0)
                                printf " during instruction prefetch"
                        end
                        if $bfsr & (1<<7)
                                printf " accessing 0x%08x", $bfar
                        end
                        printf "\n"
                end
                if $ufsr != 0
                        printf "UsageFault"
                        if $ufsr & (1<<9)
                                printf " due to divide-by-zero"
                        end
                        if $ufsr & (1<<8)
                                printf " due to unaligned memory access"
                        end
                        if $ufsr & (1<<3)
                                printf " due to access to disabled/absent coprocessor"
                        end
                        if $ufsr & (1<<2)
                                printf " due to a bad EXC_RETURN value"
                        end
                        if $ufsr & (1<<1)
                                printf " due to bad T or IT bits in EPSR"
                        end
                        if $ufsr & (1<<0)
                                printf " due to executing an undefined instruction"
                        end
                        printf "\n"
                end
        else
                if $vect >= 15
                        printf "Handling vector %u\n", $vect
                end
        end

        echo \nSelect relevant thread, and run "prefault" to restore state prior to fault.\n\n

        info thr
end

define prefault
        if (($lr & 0xffffff00) == 0xffffff00) && (($lr & 0x1) == 0x1)
                # save register values so they can be restored
                set $sp_post = $sp
                set $lr_post = $lr
                set $pc_post = $pc
                set $r0_post = $r0
                set $r1_post = $r1
                set $r2_post = $r2
                set $r3_post = $r3
                set $r12_post = $r12

                if $lr & 0x4
                        echo Stack was in PSP:\n
                        set $stack = (uint32_t*)$psp
                else
                        echo Stack was in MSP:\n
                        set $stack = (uint32_t*)$msp
                end

        # retrieve prior register states from the eight
                # 32-bit words the MCU pushed on the stack
                set $r0_pre = $stack[0]
                set $r1_pre = $stack[1]
                set $r2_pre = $stack[2]
                set $r3_pre = $stack[3]
                set $r12_pre = $stack[4]
                set $lr_pre = $stack[5]
                set $pc_pre = $stack[6]
                set $psr_pre = $stack[7]

                set $stack_offset_cpu = 4*8

                # exception stack alignment. this is constant across CPUs
                if (unsigned int)$psr_pre & 0x200
                        set $stack_offset_exception_align = 4
                else
                        set $stack_offset_exception_align = 0
                end

                # reset SP to pre-fault stack frame
                set $sp = $stack + $stack_offset_cpu + $stack_offset_exception_align

                # reset other core regs to pre-fault values
                set $r0 = $r0_pre
                set $r1 = $r1_pre
                set $r2 = $r2_pre
                set $r3 = $r3_pre
                set $r12 = $r12_pre
                set $lr = $lr_pre
                set $pc = $pc_pre
                set $psr = $psr_pre

                echo \nRestored registers to pre-fault status.\n
                echo The "postfault" command returns to the fault handler.\n

                bt
        else
                echo \nDid not detect fault status. Doing nothing.\n
        end
end

define postfault
        if $pc_post
                echo \nRestoring core registers.\n
                set $sp = $sp_post
                set $lr = $lr_post
                set $pc = $pc_post
                set $r0 = $r0_post
                set $r1 = $r1_post
                set $r2 = $r2_post
                set $r3 = $r3_post
                set $r12 = $r12_post

                # clear sentinel to prevent repated Calls
                set $pc_post = 0
        else
                echo \nNo post-fault state to restore.\n
        end
end